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1. 发明授权

US09998105B2 Programmable switched capacitor block 有权
公开(公告)号：US09998105B2
公开(公告)日：2018-06-12
申请号：US14493635
申请日：2014-09-23
申请人： Cypress Semiconductor Corporation
发明人： Eashwar Thiagarajan , Harold Kutz , Jaskarn Singh Johal , Erhan Hancioglu , Hans Klein , Bruce Byrkett , Mark Hastings , Dennis Seguine , Kendall Castor-Perry , Monte Mar , Gajender Rohilla
IPC分类号： H03M1/12 , H03K17/00 , H03M1/44 , H03M1/46 , H03M1/06
CPC分类号： H03K17/00 , H03H19/00 , H03M1/007 , H03M1/068 , H03M1/18 , H03M1/442 , H03M1/468 , H03M1/70
摘要： A first analog block includes a first plurality of switched capacitors and a second analog block includes a second plurality of switched capacitors. A switch associated with the first plurality of switched capacitors as well as a switch associated with the second plurality of switched capacitors may be configured based on one or more analog functions. The configuring of the first analog and the second analog block may include the configuring of the switch associated with the first plurality of switched capacitors when the analog function is associated with a first single ended signal and the configuring of both the switch associated with the first plurality of switched capacitors and the switch associated with the second plurality of switched capacitors when the analog function is associated with a differential signal.

2. 发明授权

US08781025B2 Discrete digital transmitter 失效
标题翻译：离散数字发射机
公开(公告)号：US08781025B2
公开(公告)日：2014-07-15
申请号：US13241451
申请日：2011-09-23
申请人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
发明人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
IPC分类号： H04L27/12 , H04B1/04
CPC分类号： H04B1/001 , H03H19/00 , H03H2015/007 , H04B1/0028
摘要： A transmitter includes a conversion module, a sample and hold module, and a discrete time bandpass filter module. The conversion module is operable to convert an outbound baseband signal into outbound frequency domain pulse signal. The sample and hold module is operable to sample and hold the outbound frequency domain pulse signal to produce a frequency domain sample pulse train, wherein the sample and hold module is clocked at a rate corresponding to a frequency component of an outbound wireless signal. The discrete time bandpass filter module is operable to bandpass filter the frequency domain sample pulse train to produce the outbound wireless signal.
摘要翻译：发射机包括转换模块，采样和保持模块以及离散时间带通滤波器模块。转换模块可操作以将出站基带信号转换为出站频域脉冲信号。采样和保持模块可操作以采样和保持出站频域脉冲信号以产生频域采样脉冲串，其中采样和保持模块以对应于出站无线信号的频率分量的速率计时。离散时间带通滤波器模块可用于对频域采样脉冲串进行带通滤波，以产生出站无线信号。

3. 发明授权

US08619888B2 Multiple path discrete digital receiver 有权
标题翻译：多路分立数字接收机
公开(公告)号：US08619888B2
公开(公告)日：2013-12-31
申请号：US13241425
申请日：2011-09-23
申请人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
发明人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
IPC分类号： H04L27/14 , H04B1/06
CPC分类号： H04B1/001 , H03H19/00 , H03H2015/007 , H04B1/0028
摘要： A receiver includes a bandpass filter module, a sample and hold module, first and second discrete time filter modules, and first and second conversion modules. The bandpass filter module is operable to filter an inbound wireless signal. The sample and hold module is operable to sample and hold the filtered inbound wireless signal to produce a frequency domain sample pulse train. The first discrete time filter module is operable to filter the frequency domain sample pulse train to produce a first filtered sample pulse. The second discrete time filter module is operable to filter the frequency domain sample pulse train to produce a second filtered sample pulse. The first conversion module is operable to convert the first filtered sample pulse into a first inbound baseband signal. The second conversion module is operable to convert the second filtered sample pulse into a second inbound baseband signal.
摘要翻译：接收机包括带通滤波器模块，采样和保持模块，第一和第二离散时间滤波器模块以及第一和第二转换模块。带通滤波器模块可操作以过滤入站无线信号。采样和保持模块可操作以采样和保持滤波的入站无线信号以产生频域采样脉冲串。第一离散时间滤波器模块可操作以对频域采样脉冲串进行滤波以产生第一滤波采样脉冲。第二离散时间滤波器模块可操作以对频域采样脉冲串进行滤波以产生第二滤波采样脉冲。第一转换模块可操作以将第一滤波后的采样脉冲转换成第一入站基带信号。第二转换模块可操作以将第二滤波采样脉冲转换成第二入站基带信号。

4. 发明授权

US08488700B2 Discrete digital receiver with sample memory 失效
标题翻译：具有采样存储器的离散数字接收机
公开(公告)号：US08488700B2
公开(公告)日：2013-07-16
申请号：US13241438
申请日：2011-09-23
申请人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
发明人： Ahmadreza (Reza) Rofougaran , Hooman Darabi
IPC分类号： H04L27/14 , H04B1/06
CPC分类号： H04B1/001 , H03H19/00 , H03H2015/007 , H04B1/0028
摘要： A receiver includes a sample and hold module, sample memory, a discrete time filter module, and a conversion module. The sample and hold module is operable to sample and hold an inbound wireless signal to produce a frequency domain sample pulse train. The sample memory is operable to store sample pulses of the frequency domain sample pulse train to produce a stored sample pulse train. The discrete time filter module is operable to filter the stored sample pulse train to produce a filtered sample pulse. The conversion module is operable to convert the filtered sample pulse into an inbound baseband signal.
摘要翻译：接收机包括采样和保持模块，采样存储器，离散时间滤波器模块和转换模块。采样和保持模块可操作以采样和保持入站无线信号以产生频域采样脉冲串。采样存储器可操作地存储频域采样脉冲串的采样脉冲以产生存储的采样脉冲串。离散时间滤波器模块可操作以对存储的采样脉冲序列进行滤波以产生滤波后的采样脉冲。转换模块可操作以将滤波的采样脉冲转换成入站基带信号。

5. 发明申请

US20130028362A1 MULTIPLE PATH DISCRETE DIGITAL RECEIVER 有权
标题翻译：多路径数字接收机
公开(公告)号：US20130028362A1
公开(公告)日：2013-01-31
申请号：US13241425
申请日：2011-09-23
申请人： AHMADREZA (REZA) ROFOUGARAN , HOOMAN DARABI
发明人： AHMADREZA (REZA) ROFOUGARAN , HOOMAN DARABI
IPC分类号： H04B1/10
CPC分类号： H04B1/001 , H03H19/00 , H03H2015/007 , H04B1/0028
摘要： A receiver includes a bandpass filter module, a sample and hold module, first and second discrete time filter modules, and first and second conversion modules. The bandpass filter module is operable to filter an inbound wireless signal. The sample and hold module is operable to sample and hold the filtered inbound wireless signal to produce a frequency domain sample pulse train. The first discrete time filter module is operable to filter the frequency domain sample pulse train to produce a first filtered sample pulse. The second discrete time filter module is operable to filter the frequency domain sample pulse train to produce a second filtered sample pulse. The first conversion module is operable to convert the first filtered sample pulse into a first inbound baseband signal. The second conversion module is operable to convert the second filtered sample pulse into a second inbound baseband signal.
摘要翻译：接收机包括带通滤波器模块，采样和保持模块，第一和第二离散时间滤波器模块以及第一和第二转换模块。带通滤波器模块可操作以过滤入站无线信号。采样和保持模块可操作以采样和保持滤波的入站无线信号以产生频域采样脉冲串。第一离散时间滤波器模块可操作以对频域采样脉冲串进行滤波以产生第一滤波采样脉冲。第二离散时间滤波器模块可操作以对频域采样脉冲串进行滤波以产生第二滤波采样脉冲。第一转换模块可操作以将第一滤波后的采样脉冲转换成第一入站基带信号。第二转换模块可操作以将第二滤波采样脉冲转换成第二入站基带信号。

6. 发明授权

US08111741B2 Sampling filter apparatus and wireless communication apparatus 有权
标题翻译：采样滤波装置和无线通信装置
公开(公告)号：US08111741B2
公开(公告)日：2012-02-07
申请号：US12373860
申请日：2007-10-15
申请人： Kentaro Miyano , Yoshifumi Hosokawa , Katsuaki Abe , Akihiko Matsuoka , Noriaki Saito
发明人： Kentaro Miyano , Yoshifumi Hosokawa , Katsuaki Abe , Akihiko Matsuoka , Noriaki Saito
IPC分类号： H03H7/30
CPC分类号： H03H15/00 , G11C27/024 , H03H19/00
摘要： The present invention has an object to provide a sampling filter apparatus and a wireless communication apparatus, which are capable of changing a filter characteristic without employing complex waveforms as control signals, and also, capable of performing filtering process operations without performing a decimation, while utilizing a wide frequency space. A sampling filter apparatus 100 includes a controller 140, a plurality of integrators 150 to 154, a plurality of switches 130, 160 to 164, 170 to 174, 180 to 184, and a plurality of voltage/current converters 120 to 123. An inputted current is stored in four pieces of integrators selected among the plurality of integrators 150 to 154 by one clock, and electric charges which have been stored from four preceding clocks up to one preceding clock are added to each other so as to output the added electric charges from the remaining one integrator. When electric charges are stored in the integrators 150 to 154 in each clock, since the inputted current is switched, the electric charges to be outputted can be weighted, and thus, a filter characteristic is changed.
摘要翻译：本发明的目的是提供一种采样滤波器装置和无线通信装置，其能够在不使用复杂波形作为控制信号的情况下改变滤波器特性，并且还可以在不执行抽取的情况下执行滤波处理操作，同时利用宽频率空间。采样滤波器装置100包括控制器140，多个积分器150至154，多个开关130,160至164,170至174,180至184以及多个电压/电流转换器120至123.输入将电流存储在多个积分器150至154中选择的四个积分器中一个时钟，并且从四个先前时钟直到一个先前时钟存储的电荷彼此相加，以便输出相加的电荷从剩下的一个积分器。当在每个时钟中积分器150至154中存储电荷时，由于输入的电流被切换，所以要输出的电荷可被加权，从而改变滤波器特性。

7. 发明授权

US07555273B2 Bandpass filter with carrier frequency reduction 有权
标题翻译：具有载波频率降低的带通滤波器
公开(公告)号：US07555273B2
公开(公告)日：2009-06-30
申请号：US11330275
申请日：2006-01-11
申请人： Dominique Morche
发明人： Dominique Morche
IPC分类号： H04B1/16
CPC分类号： H03H19/00 , H03D7/166
摘要： A bandpass filtering method in which two frequency transpositions are performed in parallel on an input signal (SE) for filtering using respective first and second upstream mixing signals (SM1, SM2). A common oscillator (LO) is used which is coupled with a first phase shifter (MTM) to produce upstream mixing signals and which is coupled with a second phase shifter (MTV) to produce downstream mixing signals. Phase shifters are used in opposite manner on first and second signals so that each of said first and second signals (VT1, VT2) receives the phase-advanced output signal from one of the two phase shifters and the phase-delayed output signal from the other of the two phase shifters.
摘要翻译：一种带通滤波方法，其中使用相应的第一和第二上游混合信号（SM1，SM2）对输入信号（SE）并行执行两次频率转换以进行滤波。使用与第一移相器（MTM）耦合以产生上游混频信号并与第二移相器（MTV）耦合以产生下游混频信号的公共振荡器（LO）。移相器在第一和第二信号上以相反的方式使用，使得所述第一和第二信号（VT1，VT2）中的每一个从两个移相器之一接收相位超前的输出信号，并从另一个移相器接收相位延迟的输出信号的两个移相器。

8. 发明授权

US07203859B2 Variable clock configuration for switched op-amp circuits 有权
标题翻译：开关运算放大器电路的可变时钟配置
公开(公告)号：US07203859B2
公开(公告)日：2007-04-10
申请号：US09932891
申请日：2001-08-20
申请人： Jens Sauerbrey , Martin Wittig , Roland Thewes
发明人： Jens Sauerbrey , Martin Wittig , Roland Thewes
IPC分类号： G06F1/04
CPC分类号： H03H19/00 , H03K5/1515 , H03K5/249
摘要： A clock configuration for driving switched op-amp circuits operated in opposite phases is presented in which a common off-phase of variable length is inserted between the on-phases of the individual operational amplifiers. The length of the off-phase can be adapted to the transient response of the operational amplifiers used. The clock configuration according to the invention can be used for further reducing the power consumption of switched op-amp circuits.
摘要翻译：提出了用于驱动以相反相位操作的开关运算放大器电路的时钟配置，其中在各个运算放大器的同相之间插入可变长度的公共截止相位。离相的长度可以适应所使用的运算放大器的瞬态响应。根据本发明的时钟配置可用于进一步降低开关式运算放大器电路的功耗。

9. 发明授权

US07142834B2 Noise removing circuit 失效
标题翻译：去噪电路
公开(公告)号：US07142834B2
公开(公告)日：2006-11-28
申请号：US10500065
申请日：2002-12-10
申请人： Hiroshi Miyagi
发明人： Hiroshi Miyagi
IPC分类号： H04B1/10
CPC分类号： H03H19/00 , H03H11/26 , H03H19/004 , H03K5/1252
摘要： An object is to provide a noise removing circuit that can be integrally formed on a semiconductor substrate and can improve the accuracy of noise component removal. The noise removing circuit comprises a highpass filter detecting a noise component included in an input signal, a pulse generating circuit generating a pulse signal corresponding to the detected noise component, an analog delaying circuit 252 delaying the input signal, and an outputting circuit removing the noise component included in the delayed signal according to the output timing of the pulse signal. The analog delaying circuit 252 delays the output timing of the input signal by making switches 51 to 56 electrically continuous in a sequential order, by holding the voltage of the input signal at each time point in a plurality of capacitors 81 to 86, and by extracting the held voltage before being updated by making switches 61 to 66 electrically continuous.
摘要翻译：本发明的目的是提供一种能够整体形成在半导体衬底上的噪声消除电路，并能提高噪声成分去除的精度。噪声消除电路包括检测包括在输入信号中的噪声分量的高通滤波器，产生对应于检测到的噪声分量的脉冲信号的脉冲发生电路，延迟输入信号的模拟延迟电路252以及去除噪声的输出电路根据脉冲信号的输出定时包括在延迟信号中的分量。模拟延迟电路252通过在多个电容器81至86中的每个时间点保持输入信号的电压，并通过提取开关51使电流连续的顺序来延迟输入信号的输出定时通过使开关61至66电连续地更新之前的保持电压。

10. 发明授权

US07079823B1 Band-pass filter with carrier frequency reduction 有权
标题翻译：具有载波频率降低的带通滤波器
公开(公告)号：US07079823B1
公开(公告)日：2006-07-18
申请号：US09980027
申请日：2000-05-26
申请人： Dominique Morche
发明人： Dominique Morche
IPC分类号： H04B1/16
CPC分类号： H03H19/00 , H03D7/166
摘要： The invention provides a bandpass filtering method in which two frequency transpositions are performed in parallel on an input signal for filtering using respective first and second upstream mixing signals that are substantially in phase quadrature, and two respective downstream mixing signals, and the sum or the difference of the two signals obtained in this way is taken, the frequency of the downstream mixing signals is selected to be different from the frequency of the first and second mixing signals so that the output signal is transposed into a desired frequency range, the method being characterized in that a common oscillator is used which is coupled with a first phase shifter to produce the upstream mixing signals and which is coupled with a second phase shifter to produce the downstream mixing signals, and in that the phase shifters are used in opposite manner on the first and second signals so that each of said first and second signals receives the phase-advanced output signal from one of the two phase shifters and the phase-delayed output signal from the other of the two phase shifters.
摘要翻译：本发明提供了一种带通滤波方法，其中使用相当于相位正交的各自的第一和第二上游混合信号以及两个相应的下游混合信号并行地对并行地输入两个频率转换，以这种方式获得的两个信号中，下游混合信号的频率被选择为不同于第一和第二混合信号的频率，使得输出信号被转置到期望的频率范围内，该方法被表征因为使用与第一移相器耦合的公共振荡器以产生上游混频信号，并且与第二移相器耦合以产生下游混频信号，并且移相器以相反的方式在第一和第二信号，使得所述第一和第二信号中的每一个接收相位超前输出信号来自两个移相器中的一个和来自两个移相器中的另一个的相位延迟的输出信号。

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