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    • 4. 发明授权
    • Digitally tuned, integrated baluns with enhanced linearity for multi-band radio applications
    • 数字调谐,集成巴伦,具有增强的线性度,适用于多频段无线电应用
    • US07688158B2
    • 2010-03-30
    • US11904865
    • 2007-09-28
    • Nader RohaniHongtao XuYulin Tan
    • Nader RohaniHongtao XuYulin Tan
    • H03H11/32H01P5/10H04B1/50
    • H03H11/34H03H7/46H03H11/48
    • An integrated balun includes a low pass filter and a high pass filter that are formed on a semiconductor chip using tunable reactive elements. The outputs of the low pass filter and the high pass filter are tied together to form the single ended output of the balun. The inputs of the low pass filter and the high pass filter form the differential inputs of the balun. The low pass filter and the high pass filter each include a number of tunable networks for achieving the tunable reactive elements. Each tunable network includes at least one switching transistor and at least one fixed value reactive elements. In at least one embodiment, dynamic biasing circuitry may be provided to improve the linearity and reduce the insertion loss of the balun.
    • 集成的平衡 - 不平衡变压器包括使用可调谐的无功元件形成在半导体芯片上的低通滤波器和高通滤波器。 低通滤波器和高通滤波器的输出端连接在一起形成平衡 - 不平衡转换器的单端输出。 低通滤波器和高通滤波器的输入形成了平衡 - 不平衡变换器的差分输入。 低通滤波器和高通滤波器各自包括用于实现可调谐无功元件的多个可调谐网络。 每个可调谐网络包括至少一个开关晶体管和至少一个固定值的无功元件。 在至少一个实施例中,可以提供动态偏置电路以改善线性并减小巴伦的插入损耗。
    • 6. 发明授权
    • Dual-band, dual-mode power amplifier with reduced power loss
    • 双频双模功率放大器,功耗降低
    • US06188877B1
    • 2001-02-13
    • US09177233
    • 1998-10-22
    • Ronald D. BoeschRonald C. Meadows
    • Ronald D. BoeschRonald C. Meadows
    • H04Q732
    • H04B1/005H03H11/30H03H11/34H04B1/0458H04B1/406
    • A power amplifier circuit has a driver amplifier stage including a low band driver amplifier and a high band driver amplifier. A final amplifier stage includes a linear mode amplifier for amplifying digitally modulated signals and a saturated (nonlinear) mode amplifier for amplifying frequency modulated (analog) signals. A switching network interconnects the driver amplifier stage and the final amplifier stage. Depending on the desired mode of operation, an appropriate driver amplifier can be coupled to an appropriate final amplifier to most effectively and efficiently amplify analog or digital RF signals in either of a plurality of frequency bands. A matching circuit is coupled to the linear mode final amplifier for impedance matching and for separating D-AMPS (800 MHz band) and PCS (1900 MHz band) digital signals. A power impedance matching circuit is coupled to the output of the saturated mode final amplifier. In one embodiment, an isolator is coupled to the output of one or more of the low band or high band outputs of the duplex matching circuit. In the low band analog path, a duplexer is provided ahead of the coupling means for reducing the RF power requirements on the coupling means. The switching network and input filter stage may precede a driver amplifier stage.
    • 功率放大器电路具有包括低频带驱动放大器和高频带驱动放大器的驱动放大器级。 最终的放大器级包括用于放大数字调制信号的线性模式放大器和用于放大调频(模拟)信号的饱和(非线性)模式放大器。 开关网络将驱动放大器级和最终的放大级相互连接。 根据期望的操作模式,适当的驱动放大器可以耦合到适当的最终放大器,以最有效和高效地放大多个频带中的任一个中的模拟或数字RF信号。 匹配电路耦合到线性模式最终放大器用于阻抗匹配和用于分离D-AMPS(800MHz频带)和PCS(1900MHz频带)数字信号。 功率阻抗匹配电路耦合到饱和模式最终放大器的输出。 在一个实施例中,隔离器耦合到双工匹配电路的一个或多个低频带或高频带输出的输出端。 在低频带模拟路径中,在耦合装置之前提供双工器以减少对耦合装置的RF功率要求。 开关网络和输入滤波器级可以在驱动器放大器级之前。
    • 8. 发明授权
    • Frequency band dividing filter using delay-line filter
    • 使用延迟线滤波器的频带分频滤波器
    • US4238744A
    • 1980-12-09
    • US940644
    • 1978-09-06
    • Makoto Iwahara
    • Makoto Iwahara
    • H03H11/34H03H15/00H03H7/46
    • H03H15/00H03H11/34
    • A frequency band dividing filter comprises a delay-line filter which is supplied with an input signal and produces a divided frequency band signal as an output, a circuit for deriving a delayed signal in which the input signal has been delayed by a predetermined amount of time, and a circuit for substantially performing subtraction of the delayed signal output signal of the delay-line filter, and producing another divided frequency band output signal. The delay-line filter comprises a plurality of delay circuits cascade connected, coefficient multipliers respectively supplied with the input signal and the output signal of the delay circuits and for multiplying specific coefficients to the signals thus supplied, and an adder for adding output signals of each of the coefficient multipliers.
    • 频带分割滤波器包括延迟线滤波器,该延迟线滤波器被提供有输入信号并产生分频频带信号作为输出,用于导出其中输入信号已被延迟预定时间量的延迟信号的电路 以及用于基本上执行延迟线滤波器的延迟信号输出信号的减法并产生另一个分频频带输出信号的电路。 延迟线滤波器包括串联连接的多个延迟电路,分别提供有输入信号的系数乘法器和延迟电路的输出信号,并将特定系数与这样提供的信号相乘;以及加法器,用于将每个 的系数乘数。