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1. 发明授权

US07737790B1 Cascode amplifier and method for controlling current of cascode amplifier 有权
标题翻译：串级放大器和共源共栅放大器电流控制方法
公开(公告)号：US07737790B1
公开(公告)日：2010-06-15
申请号：US12421615
申请日：2009-04-09
申请人： Yen-Horng Chen , Yu-Hsin Lin
发明人： Yen-Horng Chen , Yu-Hsin Lin
IPC分类号： H03F3/04
CPC分类号： H03F1/223
摘要： A cascode amplifier includes a first transistor, a second transistor, a third transistor, a fourth transistor and a bias circuit. Each of the transistors has a gate electrode, a first electrode and a second electrode, a first electrode of the first transistor is coupled to a second electrode of the second transistor, a first electrode of the third transistor is coupled to a second electrode of the fourth transistor, and gate electrodes of the third and the fourth transistors are coupled to gate electrodes of the first and the second transistors, respectively. The bias circuit is coupled to the first electrode of the fourth transistor, and is used for biasing a voltage level at the first electrode of the fourth transistor to make the second and the fourth transistors operate in a same region.
摘要翻译：级联放大器包括第一晶体管，第二晶体管，第三晶体管，第四晶体管和偏置电路。每个晶体管具有栅电极，第一电极和第二电极，第一晶体管的第一电极耦合到第二晶体管的第二电极，第三晶体管的第一电极耦合到第二晶体管的第二电极第四晶体管和第三和第四晶体管的栅电极分别耦合到第一和第二晶体管的栅电极。偏置电路耦合到第四晶体管的第一电极，并且用于偏置第四晶体管的第一电极处的电压电平，以使第二和第四晶体管在相同的区域中工作。

2. 发明授权

US08863613B2 Control module mounted on handlebar of bicycle 有权
标题翻译：控制模块安装在自行车车把上
公开(公告)号：US08863613B2
公开(公告)日：2014-10-21
申请号：US13569421
申请日：2012-08-08
申请人： Yu-Hsin Lin
发明人： Yu-Hsin Lin
IPC分类号： B62K21/26 , B62K23/06 , B60T11/04 , B60T7/10
CPC分类号： B62K23/06 , B60T7/102 , B60T11/046 , B62K21/12 , B62K21/26 , Y10T74/2028 , Y10T74/20828
摘要： A control module, which is mounted on a handlebar of a bicycle, includes a base, a grip, a control bar, and a bolt. The base has a hole, and the hole has a first section and a second section, wherein the second section is bigger than the first section. The base is fitted to the handlebar whereby a sidewall of the first section touches the handlebar. The grip is fitted to the handlebar, and has a portion received in the second section of the hole of the base. The control bar is provided on the base to control a brake module or a derailleur module. The bolt is provided on the base, wherein both the base and the grip are fixed to the handlebar at the same time by tightening the bolt.
摘要翻译：安装在自行车的车把上的控制模块包括底座，把手，控制杆和螺栓。基部具有孔，孔具有第一部分和第二部分，其中第二部分大于第一部分。底座安装在把手上，由此第一部分的侧壁与把手接触。把手被装配到把手上，并且具有容纳在基座的孔的第二部分中的部分。控制杆设置在基座上，用于控制制动模块或拨链器模块。螺栓设置在基座上，其中基座和把手通过拧紧螺栓同时固定在车把上。

3. 发明授权

US08638250B2 Amplifier, fully-differential amplifier and delta-sigma modulator 有权
标题翻译：放大器，全差分放大器和Δ-Σ调制器
公开(公告)号：US08638250B2
公开(公告)日：2014-01-28
申请号：US13590491
申请日：2012-08-21
申请人： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
发明人： Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
IPC分类号： H03M3/00
CPC分类号： H03F1/0205 , H03F3/265 , H03F3/30 , H03F3/3023 , H03F3/45071 , H03F3/45179 , H03F3/45183 , H03F3/45475 , H03F2200/18 , H03F2203/30021 , H03F2203/30033 , H03F2203/45022 , H03F2203/45134 , H03F2203/45138 , H03M3/39 , H03M3/50
摘要： An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.
摘要翻译：公开了放大器，全差分放大器和Δ-Σ调制器。所公开的放大器包括前端增益级，AC耦合推挽输出级和补偿电路。补偿电路耦合在前端增益级与放大器的输出端之间。交流耦合推挽输出级使用交流耦合电容器（其是无源双端电气元件而不是晶体管的杂散或寄生电容），以将前端增益级耦合到顶部的栅极或引入到AC耦合推挽输出级中的推挽结构的底部晶体管，并且使用电阻分量将顶部或底部晶体管的栅极（取决于耦合到AC耦合电容器的栅极）耦合到偏置电压电平。

4. 发明申请

US20120154045A1 PUSH-PULL LOW NOISE AMPLIFIER WITH VARIABLE GAIN, PUSH-PULL LOW NOISE AMPLIFIER WITH COMMON GATE BIAS CIRCUIT AND AMPLIFIER WITH AUXILIARY MATCHING 有权
标题翻译：推拉低噪声放大器与可变增益，推拉低噪声放大器与普通门偏置电路和放大器与辅助匹配
公开(公告)号：US20120154045A1
公开(公告)日：2012-06-21
申请号：US13109000
申请日：2011-05-17
申请人： Ming-Da Tsai , Yu-Hsin Lin
发明人： Ming-Da Tsai , Yu-Hsin Lin
IPC分类号： H03F3/45 , H03F1/38 , H03F3/26
CPC分类号： H03F3/3022 , H03F3/45179 , H03F3/45242 , H03F3/45475 , H03F3/72 , H03F2200/294 , H03F2203/45386 , H03F2203/45521 , H03F2203/7236 , H03G1/0088
摘要： A push-pull low noise amplifier (LNA) includes at least one amplifier block. Each amplifier block includes a bypass stage and at least one gain cell. The bypass stage has a first node and a second node. The gain cell has an input terminal and an output terminal, comprising a loading stage and a driving stage. When the push-pull LNA is in a first gain mode, the loading stage is enabled and the bypassing stage is disabled; and when the push-pull LNA is in a second gain mode, the loading stage is disabled and the bypassing stage is enabled.
摘要翻译：推挽式低噪声放大器（LNA）包括至少一个放大器块。每个放大器块包括旁路级和至少一个增益单元。旁路级具有第一节点和第二节点。增益单元具有输入端子和输出端子，包括负载级和驱动级。当推挽LNA处于第一增益模式时，加载阶段被使能，旁路级被禁止; 并且当推挽LNA处于第二增益模式时，加载阶段被禁用并且旁路级被使能。

5. 发明授权

US08058133B2 Method of fabrication of metal oxide semiconductor field effect transistor 有权
标题翻译：金属氧化物半导体场效应晶体管的制造方法
公开(公告)号：US08058133B2
公开(公告)日：2011-11-15
申请号：US12273517
申请日：2008-11-18
申请人： Chen-Hua Tsai , Bang-Chiang Lan , Yu-Hsin Lin , Yi-Cheng Liu , Cheng-Tzung Tsai
发明人： Chen-Hua Tsai , Bang-Chiang Lan , Yu-Hsin Lin , Yi-Cheng Liu , Cheng-Tzung Tsai
IPC分类号： H01L21/336
CPC分类号： H01L29/7848 , H01L21/823807 , H01L29/6656 , H01L29/66636 , H01L29/7834 , Y10S438/931 , Y10S438/933 , Y10S438/938
摘要： A method of fabrication of a metal oxide semiconductor field effect transistor includes first providing a substrate on which a gate structure is formed. Afterwards, a portion of the substrate is removed to form a first recess in the substrate at both ends of the gate structure. Additionally, a source/drain extension layer is deposited in the first recess and a number of spacers are formed at both ends of the gate structure. Subsequently, a portion of the source/drain extension and the substrate are removed to form a second recess in the source/drain extension and a portion of the substrate outside of the spacer. In addition, a source/drain layer is deposited in the second recess. Because the source/drain extension and the source/drain layer have specific materials and structures, short channel effect is improved and the efficiency of the metal oxide semiconductor field effect transistor is improved.
摘要翻译：制造金属氧化物半导体场效应晶体管的方法包括首先提供其上形成有栅极结构的衬底。之后，去除衬底的一部分以在栅极结构的两端形成衬底中的第一凹槽。另外，源极/漏极延伸层沉积在第一凹槽中，并且在栅极结构的两端形成多个间隔物。随后，去除源极/漏极延伸部分和衬底的一部分以在源极/漏极延伸部中形成第二凹部，并且在衬垫的外部形成衬底的一部分。另外，源极/漏极层沉积在第二凹部中。由于源极/漏极延伸部和源极/漏极层具有特定的材料和结构，因此提高了沟道效应，提高了金属氧化物半导体场效应晶体管的效率。

6. 发明授权

US07935590B2 Method of manufacturing metal oxide semiconductor and complementary metal oxide semiconductor 有权
标题翻译：制造金属氧化物半导体和互补金属氧化物半导体的方法
公开(公告)号：US07935590B2
公开(公告)日：2011-05-03
申请号：US11382916
申请日：2006-05-11
申请人： Bang-Chiang Lan , Chen-Hua Tsai , Yu-Hsin Lin , Tsung-Lung Tsai , Cheng-Tzung Tsai
发明人： Bang-Chiang Lan , Chen-Hua Tsai , Yu-Hsin Lin , Tsung-Lung Tsai , Cheng-Tzung Tsai
IPC分类号： H01L21/8238
CPC分类号： H01L21/823814 , H01L21/823864 , H01L29/165 , H01L29/6653 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： A method of manufacturing a metal oxide semiconductor is provided. The method includes forming an offset spacer and a disposable spacer around the offset spacer. Then, forming a plurality of epitaxial layers outside the disposable spacer and removing the disposable spacer. In addition, the method includes forming a plurality of source/drain extension areas in the substrate outside the offset spacer and the epitaxial layers. Because the source/drain extension areas are formed after the selective epitaxial growth process, the thermal of the selective epitaxial growth process does not damage the source/drain extension areas.
摘要翻译：提供一种制造金属氧化物半导体的方法。该方法包括在偏移间隔物周围形成偏移间隔物和一次性间隔物。然后，在一次性间隔件外部形成多个外延层并且去除一次性间隔件。此外，该方法包括在偏移间隔物和外延层外部的衬底中形成多个源极/漏极扩展区域。因为在选择性外延生长工艺之后形成源极/漏极延伸区域，所以选择性外延生长工艺的热量不会损害源极/漏极扩展区域。

7. 发明授权

US07919293B2 Nanoparticles for protein drug delivery 有权
公开(公告)号：US07919293B2
公开(公告)日：2011-04-05
申请号：US12381091
申请日：2009-03-06
申请人： Hsing-Wen Sung , Mei-Chin Chen , Yu-Hsin Lin , Hsiang-Fa Liang , Hosheng Tu
发明人： Hsing-Wen Sung , Mei-Chin Chen , Yu-Hsin Lin , Hsiang-Fa Liang , Hosheng Tu
IPC分类号： C12N11/04
CPC分类号： A61K9/5146 , A61K9/19 , A61K9/4891 , A61K9/5161 , A61K31/13 , A61K31/445 , A61K31/55 , A61K47/61
摘要： The invention discloses the nanoparticles composed of chitosan, poly-glutamic acid, and at least one protein drug or bioactive agent characterized with a positive surface charge and their enhanced permeability for paracellular protein drug and bioactive agent delivery.

8. 发明授权

US07858596B2 Nanoparticles for protein drug delivery 有权
标题翻译：用于蛋白质药物递送的纳米颗粒
公开(公告)号：US07858596B2
公开(公告)日：2010-12-28
申请号：US12315611
申请日：2008-12-04
申请人： Hsing-Wen Sung , Mei-Chin Chen , Yu-Hsin Lin , Hsiang-Fa Liang , Hosheng Tu
发明人： Hsing-Wen Sung , Mei-Chin Chen , Yu-Hsin Lin , Hsiang-Fa Liang , Hosheng Tu
IPC分类号： A01N43/04
CPC分类号： A61K9/5146 , A61K9/19 , A61K9/4891 , A61K9/5161 , A61K31/13 , A61K31/445 , A61K31/55 , A61K47/61
摘要： The invention discloses the nanoparticles composed of chitosan, poly-glutamic acid, and at least one protein drug or bioactive agent characterized with a positive surface charge and their enhanced permeability for paracellular protein drug and bioactive agent delivery.
摘要翻译：本发明公开了由壳聚糖，聚谷氨酸和至少一种蛋白质药物或生物活性剂组成的纳米颗粒，其特征在于具有阳性表面电荷并且其对细胞外蛋白质药物和生物活性剂递送的增强的渗透性。

9. 发明授权

US07795975B2 Class AB amplifier 有权
标题翻译： AB类放大器
公开(公告)号：US07795975B2
公开(公告)日：2010-09-14
申请号：US12038122
申请日：2008-02-27
申请人： Yu-Hsin Lin , Hsueh-Kun Liao
发明人： Yu-Hsin Lin , Hsueh-Kun Liao
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/3022 , H03F2203/30084 , H03F2203/30117 , H03F2203/45668
摘要： An amplifier is disclosed. An input transistor receives an input voltage. An impedance unit is coupled to a first electrode of the input transistor. A current source is coupled to a second electrode of the input transistor. A push-pull output circuit comprises a PMOS transistor and a NMOS transistor electrically connected in series to output an output voltage. The first electrode of the input transistor is coupled to a control terminal of the NMOS transistor. A level shifting unit is coupled between the first electrode of the input transistor and the push-pull output circuit, for shifting a voltage of the first electrode of the input transistor and providing a shifted voltage corresponding to the voltage of the first electrode of the input transistor to the control terminal of the PMOS transistor.
摘要翻译：公开了放大器。输入晶体管接收输入电压。阻抗单元耦合到输入晶体管的第一电极。电流源耦合到输入晶体管的第二电极。推挽输出电路包括串联电连接以输出输出电压的PMOS晶体管和NMOS晶体管。输入晶体管的第一电极耦合到NMOS晶体管的控制端。电平移位单元耦合在输入晶体管的第一电极和推挽输出电路之间，用于移位输入晶体管的第一电极的电压，并提供与输入的第一电极的电压相对应的移位电压晶体管连接到PMOS晶体管的控制端。

10. 发明授权

US07737775B2 Low-noise DC offset calibration circuit and related receiver stage 有权
标题翻译：低噪声直流偏移校准电路及相关接收器级
公开(公告)号：US07737775B2
公开(公告)日：2010-06-15
申请号：US12168159
申请日：2008-07-07
申请人： Chi-Lun Lo , Yu-Hsin Lin
发明人： Chi-Lun Lo , Yu-Hsin Lin
IPC分类号： H03F1/02
CPC分类号： H04B1/30 , H04L25/0296
摘要： A receiver stage has an operational amplifier, a feedback resistor coupled between an output of the operational amplifier and an input of the operational amplifier, and a DC offset calibration circuit. The DC offset calibration circuit includes a plurality of resistors and a plurality of switches. Each resistor has a first end coupled to a supply voltage. First ends of each of the switches are coupled to second ends of each of the resistors, respectively, and second ends of the switches are coupled to the input of the operational amplifier.
摘要翻译：接收机级具有运算放大器，耦合在运算放大器的输出端和运算放大器的输入端之间的反馈电阻器以及DC偏置校准电路。 DC偏移校准电路包括多个电阻器和多个开关。每个电阻器具有耦合到电源电压的第一端。每个开关的第一端分别耦合到每个电阻器的第二端，并且开关的第二端耦合到运算放大器的输入端。

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