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    • 7. 发明申请
    • TRACK AND HOLD CIRCUIT AND RELATED RECEIVING DEVICE WITH TRACK AND HOLD CIRCUIT EMPLOYED THEREIN
    • 跟踪和保持电路跟踪和相关接收设备跟踪并保持已使用的电路
    • US20110181334A1
    • 2011-07-28
    • US12695164
    • 2010-01-28
    • Hung-Chieh TsaiYu-Hsin LinChi-Lun LoJong-Woei Chen
    • Hung-Chieh TsaiYu-Hsin LinChi-Lun LoJong-Woei Chen
    • H03L5/00
    • H03G3/3052H03G1/0088
    • An operational circuit includes: a gain control circuit arranged to provide a gain value upon an input signal according to a set of control signals, wherein the gain control circuit includes a first resistor-based network and a second resistor-based network; an operational amplifier coupled to the gain control circuit and arranged to generate an output signal according to the input signal and the gain value; and a first capacitor coupled to the operational amplifier and arranged to hold the output signal between a first input terminal and a first output terminal of the operational amplifier, wherein when the operational circuit is operating, a first terminal of the first capacitor is consistently coupled to the first input terminal of the operational amplifier, and a second terminal of the first capacitor is consistently coupled to the first output terminal of the operational amplifier.
    • 运算电路包括:增益控制电路,被配置为根据一组控制信号在输入信号上提供增益值,其中所述增益控制电路包括第一电阻器网络和第二电阻器网络; 运算放大器,耦合到所述增益控制电路并被布置成根据所述输入信号和所述增益值产生输出信号; 以及耦合到所述运算放大器并被布置成将所述输出信号保持在所述运算放大器的第一输入端和所述第一输出端之间的第一电容器,其中当所述运算电路运行时,所述第一电容器的第一端始终耦合到 运算放大器的第一输入端和第一电容器的第二端一致地耦合到运算放大器的第一输出端。
    • 10. 发明申请
    • BANDGAP REFERENCE CIRCUIT WITH LOW OPERATING VOLTAGE
    • 具有低工作电压的带宽参考电路
    • US20090237150A1
    • 2009-09-24
    • US12051989
    • 2008-03-20
    • Hung-Chieh TsaiYu-Hsin Lin
    • Hung-Chieh TsaiYu-Hsin Lin
    • G05F1/10H03F3/16
    • H03F3/45183G05F3/30H03F3/345H03F2200/456
    • A bandgap reference circuit comprising a current mirror, an operational amplifier, first and second BJT transistors is disclosed. The current mirror comprises a first input terminal, a second input terminal and at least one output terminal. The operational amplifier is coupled to the current mirror, wherein a first transistor and a second transistor respectively coupled to the first and the second input terminals have a zero or near zero threshold voltage. The first and second BJT transistors are coupled to two input terminals of the operational amplifier respectively, wherein at least one of the first and second BJT transistors is coupled to the output terminal of the current mirror through a conductive path.
    • 公开了一种带隙参考电路,其包括电流镜,运算放大器,第一和第二BJT晶体管。 电流镜包括第一输入端,第二输入端和至少一个输出端。 运算放大器耦合到电流镜,其中分别耦合到第一和第二输入端的第一晶体管和第二晶体管具有零或接近零的阈值电压。 第一和第二BJT晶体管分别耦合到运算放大器的两个输入端,其中第一和第二BJT晶体管中的至少一个通过导电路径耦合到电流镜的输出端。