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    • 4. 发明授权
    • Method for producing group III nitride semiconductor and template substrate
    • 制备III族氮化物半导体和模板衬底的方法
    • US08680581B2
    • 2014-03-25
    • US12654562
    • 2009-12-23
    • Naoyuki NakadaKoji OkunoYasuhisa Ushida
    • Naoyuki NakadaKoji OkunoYasuhisa Ushida
    • H01L29/20
    • H01L29/2003H01L21/0237H01L21/0242H01L21/02433H01L21/02458H01L21/0254H01L21/0262H01L21/02636H01L21/02639H01L21/02647H01L29/045
    • The present invention provides a method for producing a Group III nitride semiconductor. The method includes forming a groove in a surface of a growth substrate through etching; forming a buffer film on the groove-formed surface of the growth substrate through sputtering; heating, in an atmosphere containing hydrogen and ammonia, the substrate to a temperature at which a Group III nitride semiconductor of interest is grown; and epitaxially growing the Group III nitride semiconductor on side surfaces of the groove at the growth temperature. The thickness of the buffer film or the growth temperature is regulated so that the Group III nitride semiconductor is grown primarily on the side surfaces of the groove in a direction parallel to the main surface of the growth substrate. The thickness of the buffer film is regulated to be smaller than that of a buffer film which is employed for epitaxially growing the Group III nitride semiconductor on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is regulated to be lower than a temperature at which the Group III nitride semiconductor is epitaxially grown on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is preferably 1,020 to 1,100° C. The buffer film employed is an AlN film having a thickness of 150 Å or less.
    • 本发明提供一种III族氮化物半导体的制造方法。 该方法包括通过蚀刻在生长衬底的表面上形成凹槽; 通过溅射在生长衬底的槽形表面上形成缓冲膜; 在含有氢和氨的气氛中将衬底加热到​​生长所关注的III族氮化物半导体的温度; 并在生长温度下在槽的侧表面外延生长III族氮化物半导体。 调节缓冲膜的厚度或生长温度,使得III族氮化物半导体主要在平行于生长衬底主表面的方向上在槽的侧表面上生长。 缓冲膜的厚度被调节为小于在平面生长衬底上沿垂直于生长衬底的方向均匀地外延生长III III族氮化物半导体的缓冲膜的厚度。 生长温度被调节为低于在平面生长衬底上沿垂直于生长衬底的方向均匀地外延生长III族氮化物半导体的温度。 生长温度优选为1020〜1100℃。所使用的缓冲膜是厚度为150以下的AlN膜。
    • 6. 发明授权
    • Group III nitride-based compound semiconductor device
    • III族氮化物类化合物半导体器件
    • US07948061B2
    • 2011-05-24
    • US12219695
    • 2008-07-25
    • Yoshiki SaitoYasuhisa Ushida
    • Yoshiki SaitoYasuhisa Ushida
    • H01L29/04
    • H01L33/32H01L33/02H01L33/16H01L33/20H01L33/382
    • A characteristic feature of the invention is to form, in a Group III nitride-based compound semiconductor device, a negative electrode on a surface other than a Ga-polar C-plane. In a Group III nitride-based compound semiconductor light-emitting device, there are formed, on an R-plane sapphire substrate, an n-contact layer, a layer for improving static breakdown voltage, an n-cladding layer made of a multi-layer structure having ten stacked sets of an undoped In0.1Ga0.9N layer, an undoped GaN layer, and a silicon (Si)-doped GaN layer, a multi-quantum well (MQW) light-emitting layer made of a combination of In0.25Ga0.75N well layers and GaN barrier layers stacked alternatingly, a p-cladding layer made of a multi-layer structure including a p-type Al0.3Ga0.7N layer and a p-In0.08Ga0.92N layer, and a p-contact layer (thickness: about 80 nm) made of a stacked structure including two p-GaN layers having different magnesium concentrations. Through etching, the n-contact layer having a thickness direction along the c-axis is provided with stripe-patterned microditches each having side walls, which assume a C-plane, whereby ohmic contact is established between a negative electrode and each C-plane side wall.
    • 本发明的特征在于,在III族氮化物系化合物半导体装置中,在Ga极C面以外的表面上形成负极。 在III族氮化物系化合物半导体发光元件中,在R面蓝宝石衬底上形成n接触层,用于提高静电击穿电压的层,由多层结构形成的n包层, 具有未堆积的In0.1Ga0.9N层,未掺杂的GaN层和硅(Si)掺杂的GaN层的十个堆叠组的多层结构,由In0组合的多量子阱(MQW)发光层 0.25Ga0.75N阱层和GaN势垒层交替堆叠,由包括p型Al0.3Ga0.7N层和p-In0.08Ga0.92N层的多层结构制成的p型包层,p - 接触层(厚度:约80nm),其由包括具有不同镁浓度的两个p-GaN层的堆叠结构制成。 通过蚀刻,具有沿着c轴的厚度方向的n接触层设置有条形图案化的每个具有侧壁的微阵列,其呈现C面,由此在负极和每个C面之间建立欧姆接触 侧墙。
    • 7. 发明申请
    • Group III nitride compound semiconductor light emitting element and manufacturing method thereof
    • III族氮化物化合物半导体发光元件及其制造方法
    • US20100244042A1
    • 2010-09-30
    • US12659763
    • 2010-03-19
    • Yoshiki SaitoYasuhisa Ushida
    • Yoshiki SaitoYasuhisa Ushida
    • H01L33/44H01L33/30H01L21/20
    • H01L33/24H01L33/08H01L33/32
    • A group III nitride compound semiconductor light emitting element comprising: a first layer which is a single crystal layer of a group III nitride compound semiconductor, the first layer formed on the buffer layer and including a threading dislocation; a second layer of a group III nitride compound semiconductor formed on the first layer, the second layer including a pit and a flat portion, wherein the pit continuing from the threading dislocations and having a cross section parallel to the substrate expanding in a growth direction of the second layer; a luminescent layer including a flat portion and a pit corresponding to those of the second layer. The indium concentration in the pit of the luminescent layer is smaller than that in the flat portion of the luminescent layer. A luminescent spectrum width of thereof is expanded as compared to a case where the pit does not exist.
    • 一种III族氮化物化合物半导体发光元件,包括:第一层,其是III族氮化物化合物半导体的单晶层,所述第一层形成在所述缓冲层上并且包括穿透位错; 形成在第一层上的第III族氮化物化合物半导体的第二层,第二层包括凹坑和平坦部分,其中所述凹坑从穿透位错继续并且具有平行于基板沿其生长方向扩展的横截面 第二层; 包括平坦部分和与第二层相对应的凹坑的发光层。 发光层的凹坑中的铟浓度比发光层的平坦部的铟浓度小。 与不存在凹坑的情况相比,其发光光谱宽度扩大。
    • 8. 发明申请
    • Method for producing group III nitride semiconductor and template substrate
    • 制备III族氮化物半导体和模板衬底的方法
    • US20100102360A1
    • 2010-04-29
    • US12654562
    • 2009-12-23
    • Naoyuki NakadaKoji OkunoYasuhisa Ushida
    • Naoyuki NakadaKoji OkunoYasuhisa Ushida
    • H01L29/20H01L21/203H01L29/06
    • H01L29/2003H01L21/0237H01L21/0242H01L21/02433H01L21/02458H01L21/0254H01L21/0262H01L21/02636H01L21/02639H01L21/02647H01L29/045
    • The present invention provides a method for producing a Group III nitride semiconductor. The method includes forming a groove in a surface of a growth substrate through etching; forming a buffer film on the groove-formed surface of the growth substrate through sputtering; heating, in an atmosphere containing hydrogen and ammonia, the substrate to a temperature at which a Group III nitride semiconductor of interest is grown; and epitaxially growing the Group III nitride semiconductor on side surfaces of the groove at the growth temperature. The thickness of the buffer film or the growth temperature is regulated so that the Group III nitride semiconductor is grown primarily on the side surfaces of the groove in a direction parallel to the main surface of the growth substrate. The thickness of the buffer film is regulated to be smaller than that of a buffer film which is employed for epitaxially growing the Group III nitride semiconductor on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is regulated to be lower than a temperature at which the Group III nitride semiconductor is epitaxially grown on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is preferably 1,020 to 1,100° C. The buffer film employed is an AlN film having a thickness of 150 Å or less.
    • 本发明提供一种III族氮化物半导体的制造方法。 该方法包括通过蚀刻在生长衬底的表面上形成凹槽; 通过溅射在生长衬底的槽形表面上形成缓冲膜; 在含有氢和氨的气氛中将衬底加热到​​生长所关注的III族氮化物半导体的温度; 并且在生长温度下在槽的侧表面外延生长III族氮化物半导体。 调节缓冲膜的厚度或生长温度,使得III族氮化物半导体主要在平行于生长衬底主表面的方向上在槽的侧表面上生长。 缓冲膜的厚度被调节为小于在平面生长衬底上沿垂直于生长衬底的方向均匀地外延生长III III族氮化物半导体的缓冲膜的厚度。 生长温度被调节为低于在平面生长衬底上沿垂直于生长衬底的方向均匀地外延生长III族氮化物半导体的温度。 生长温度优选为1020〜1100℃。所使用的缓冲膜是厚度为150以下的AlN膜。