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1. 发明授权

US08558299B2 Semiconductor device with gate electrode stack including low resistivity tungsten and method of forming 有权
标题翻译：具有包括低电阻率钨的栅电极堆叠的半导体器件和形成方法
公开(公告)号：US08558299B2
公开(公告)日：2013-10-15
申请号：US13157164
申请日：2011-06-09
申请人： Yong Cao , Xianmin Tang , Srinivas Gandikota , Wei D. Wang , Zhendong Liu , Kevin Moraes , Muhammad M. Rasheed , Thanh X. Nguyen , Ananthkrishna Jupudi
发明人： Yong Cao , Xianmin Tang , Srinivas Gandikota , Wei D. Wang , Zhendong Liu , Kevin Moraes , Muhammad M. Rasheed , Thanh X. Nguyen , Ananthkrishna Jupudi
IPC分类号： H01L29/788
CPC分类号： H01L21/28079 , C23C14/165 , C23C14/345 , C23C14/35 , H01L21/28088 , H01L21/2855 , H01L29/4966 , H01L29/517 , H01L29/78
摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.
摘要翻译：本文所述的实施例提供了一种半导体器件及其形成方法和装置。半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。栅极电极堆叠包括在栅极介电层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

2. 发明申请

US20110303960A1 LOW RESISTIVITY TUNGSTEN PVD WITH ENHANCED IONIZATION AND RF POWER COUPLING 有权
标题翻译：具有增强离子化和射频功率耦合的低电阻TUNGSTEN PVD
公开(公告)号：US20110303960A1
公开(公告)日：2011-12-15
申请号：US13157164
申请日：2011-06-09
申请人： YONG CAO , Xianmin Tang , Srinivas Gandikota , Wei D. Wang , Zhendong Liu , Kevin Moraes , Muhammad M. Rasheed , Thanh X. Nguyen , Ananthkrishna Jupudi
发明人： YONG CAO , Xianmin Tang , Srinivas Gandikota , Wei D. Wang , Zhendong Liu , Kevin Moraes , Muhammad M. Rasheed , Thanh X. Nguyen , Ananthkrishna Jupudi
IPC分类号： H01L29/788 , H01L21/283 , C23C14/34 , H01L21/3205
CPC分类号： H01L21/28079 , C23C14/165 , C23C14/345 , C23C14/35 , H01L21/28088 , H01L21/2855 , H01L29/4966 , H01L29/517 , H01L29/78
摘要： Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.
摘要翻译：本文所述的实施例提供了一种半导体器件及其形成方法和装置。半导体器件包括在源极和漏极区域之间的衬底上具有源极和漏极区域以及栅电极堆叠的衬底。栅极电极堆叠包括在栅极电介质层上的导电膜层，导电膜层上的难熔金属氮化物膜层，难熔金属氮化物膜层上的含硅膜层，以及硅 - 含有膜层。在一个实施例中，该方法包括将衬底定位在处理室内，其中衬底包括源极和漏极区域，源极和漏极区域之间的栅极介电层以及栅极电介质层上的导电膜层。该方法还包括在导电膜层上沉积难熔金属氮化物膜层，在难熔金属氮化物膜层上沉积含硅膜层，并在含硅膜层上沉积钨膜层。

3. 发明申请

US20100252416A1 Sputtering Target for PVD Chamber 有权
标题翻译： PVD室的溅射靶
公开(公告)号：US20100252416A1
公开(公告)日：2010-10-07
申请号：US12723199
申请日：2010-03-12
申请人： Zhendong Liu , Rongjun Wang , Xianmin Tang , Srinivas Gandikota , Tza-Jing Gung , Muhammad M. Rasheed
发明人： Zhendong Liu , Rongjun Wang , Xianmin Tang , Srinivas Gandikota , Tza-Jing Gung , Muhammad M. Rasheed
IPC分类号： C23C14/34
CPC分类号： C23C14/3407 , H01J37/342 , H01J37/3423
摘要： Target assemblies and PVD chambers including target assemblies are disclosed. The target assembly includes a target that has a concave shaped target. When used in a PVD chamber, the concave target provides more radially uniform deposition on a substrate disposed in the sputtering chamber.
摘要翻译：公开了包括目标组件的目标组件和PVD室。目标组件包括具有凹形目标的目标。当在PVD室中使用时，凹目标在设置在溅射室中的基板上提供更径向均匀的沉积。

4. 发明授权

US09752228B2 Sputtering target for PVD chamber 有权
公开(公告)号：US09752228B2
公开(公告)日：2017-09-05
申请号：US12723199
申请日：2010-03-12
申请人： Zhendong Liu , Rongjun Wang , Xianmin Tang , Srinivas Gandikota , Tza-Jing Gung , Muhammad M. Rasheed
发明人： Zhendong Liu , Rongjun Wang , Xianmin Tang , Srinivas Gandikota , Tza-Jing Gung , Muhammad M. Rasheed
IPC分类号： C23C14/34 , H01J37/34
CPC分类号： C23C14/3407 , H01J37/342 , H01J37/3423
摘要： Target assemblies and PVD chambers including target assemblies are disclosed. The target assembly includes a target that has a concave shaped target. When used in a PVD chamber, the concave target provides more radially uniform deposition on a substrate disposed in the sputtering chamber.

5. 发明申请

US20100252417A1 HIGH PRESSURE RF-DC SPUTTERING AND METHODS TO IMPROVE FILM UNIFORMITY AND STEP-COVERAGE OF THIS PROCESS 审中-公开
标题翻译：高压RF-DC溅射和改善膜过程的均匀性和步骤的方法
公开(公告)号：US20100252417A1
公开(公告)日：2010-10-07
申请号：US12754473
申请日：2010-04-05
申请人： Adolph Miller Allen , Lara Hawrylchak , Zhigang Xie , Muhammad M. Rasheed , Rongjun Wang , Xianmin Tang , Zhendong Liu , Tza-Jing Gung , Srinivas Gandikota , Mei Chang , Michael S. Cox , Donny Young , Kirankumar Savandaiah , Zhenbin Ge
发明人： Adolph Miller Allen , Lara Hawrylchak , Zhigang Xie , Muhammad M. Rasheed , Rongjun Wang , Xianmin Tang , Zhendong Liu , Tza-Jing Gung , Srinivas Gandikota , Mei Chang , Michael S. Cox , Donny Young , Kirankumar Savandaiah , Zhenbin Ge
IPC分类号： C23C14/34
CPC分类号： C23C14/564 , C23C14/345 , C23C14/3492 , C23C14/35 , C23C14/548 , H01J37/32642 , H01J37/3405 , H01J37/3408 , H01J37/3441 , H01J37/3455
摘要： Embodiments of the invention generally provide a processing chamber used to perform a physical vapor deposition (PVD) process and methods of depositing multi-compositional films. The processing chamber may include: an improved RF feed configuration to reduce any standing wave effects; an improved magnetron design to enhance RF plasma uniformity, deposited film composition and thickness uniformity; an improved substrate biasing configuration to improve process control; and an improved process kit design to improve RF field uniformity near the critical surfaces of the substrate. The method includes forming a plasma in a processing region of a chamber using an RF supply coupled to a multi-compositional target, translating a magnetron relative to the multi-compositional target, wherein the magnetron is positioned in a first position relative to a center point of the multi-compositional target while the magnetron is translating and the plasma is formed, and depositing a multi-compositional film on a substrate in the chamber.
摘要翻译：本发明的实施例通常提供用于执行物理气相沉积（PVD）工艺的处理室和沉积多组分膜的方法。处理室可以包括：改进的RF馈送配置以减少任何驻波效应; 改进的磁控管设计，以增强RF等离子体均匀性，沉积膜组成和厚度均匀性; 改进的衬底偏置结构以改善工艺控制; 以及改进的工艺组件设计，以改善衬底临界表面附近的RF场均匀性。该方法包括使用耦合到多组分靶的RF电源在室的处理区域中形成等离子体，相对于多组分靶物平移磁控管，其中磁控管相对于中心点位于第一位置的多组分靶，同时磁控管正在平移并且形成等离子体，并且在腔室中的基底上沉积多组分膜。

6. 发明授权

US08580094B2 Magnetron design for RF/DC physical vapor deposition 有权
标题翻译：用于RF / DC物理气相沉积的磁控管设计
公开(公告)号：US08580094B2
公开(公告)日：2013-11-12
申请号：US13163817
申请日：2011-06-20
申请人： Rongjun Wang , Sally Lou , Muhammad Rasheed , Jianxin Lei , Xianmin Tang , Srinivas Gandikota , Ryan Hanson , Tza-Jing Gung , Keith A. Miller , Thanh X. Nguyen
发明人： Rongjun Wang , Sally Lou , Muhammad Rasheed , Jianxin Lei , Xianmin Tang , Srinivas Gandikota , Ryan Hanson , Tza-Jing Gung , Keith A. Miller , Thanh X. Nguyen
IPC分类号： C23C14/35
CPC分类号： C23C14/35 , H01J37/3408 , H01J37/345 , H01J37/3461
摘要： Methods and apparatus to improve target life and deposition uniformity in PVD chambers are provided herein. In some embodiments, a magnetron assembly includes a shunt plate having a central axis, the shunt plate rotatable about the central axis, a first open loop magnetic pole arc coupled to the shunt plate at a first radius from the central axis, and a second open loop magnetic pole arc coupled the shunt plate at a first distance from the first open loop magnetic pole arc, wherein at least one of the first radius varies along the first open loop magnetic pole arc or the first distance varies along the second open loop magnetic pole arc. In some embodiments, a first polarity of the first open loop magnetic pole arc opposes a second polarity of the second open loop magnetic pole arc.
摘要翻译：本文提供了改善PVD室中的目标寿命和沉积均匀性的方法和装置。在一些实施例中，磁控管组件包括具有中心轴线的分流板，分流板可围绕中心轴线旋转，第一开环磁极电弧在与中心轴线成第一半径处耦合到分流板，第二开路环形磁极以与第一开环磁极弧成第一距离的方式将分流板电弧耦合，其中第一半径中的至少一个沿第一开环磁极弧变化，或者第一距离沿第二开环磁极变化弧。在一些实施例中，第一开环磁极的第一极性与第二开环磁极的第二极性相反。

7. 发明授权

US08637390B2 Metal gate structures and methods for forming thereof 有权
标题翻译：金属门结构及其形成方法
公开(公告)号：US08637390B2
公开(公告)日：2014-01-28
申请号：US13116794
申请日：2011-05-26
申请人： Seshadri Ganguli , Sang Ho Yu , Sang-Hyeob Lee , Hyoung-Chan Ha , Wei Ti Lee , Hoon Kim , Srinivas Gandikota , Yu Lei , Kevin Moraes , Xianmin Tang
发明人： Seshadri Ganguli , Sang Ho Yu , Sang-Hyeob Lee , Hyoung-Chan Ha , Wei Ti Lee , Hoon Kim , Srinivas Gandikota , Yu Lei , Kevin Moraes , Xianmin Tang
IPC分类号： H01L21/4763
CPC分类号： H01L21/28079 , H01L21/28088 , H01L21/32051 , H01L29/49
摘要： Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode.
摘要翻译：本文提供了金属门结构及其形成方法。在一些实施例中，在具有形成在高k电介质层中的特征的衬底上形成金属栅极结构的方法可以包括在电介质层顶部的特征内沉积第一层; 在所述特征内在所述第一层顶部沉积包含钴或镍的第二层; 以及在第二层顶部沉积包括特征内的金属的第三层以填充该特征，其中第一层或第二层中的至少一层形成润湿层以形成后续沉积层的成核层，其中第一层第二层或第三层形成功函数层，并且其中第三层形成栅电极。

8. 发明授权

US08129280B2 Substrate device having a tuned work function and methods of forming thereof 有权
标题翻译：具有调谐功能的基板装置及其形成方法
公开(公告)号：US08129280B2
公开(公告)日：2012-03-06
申请号：US12508820
申请日：2009-07-24
申请人： Rongjun Wang , Xianmin Tang , Dengliang Yang , Zhendong Liu , Srinivas Gandikota
发明人： Rongjun Wang , Xianmin Tang , Dengliang Yang , Zhendong Liu , Srinivas Gandikota
IPC分类号： H01L21/311
CPC分类号： H01L29/4966 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/517
摘要： Substrate devices having tuned work functions and methods of forming thereof are provided. In some embodiments, forming devices on substrates may include depositing a dielectric layer atop a substrate having a conductivity well; depositing a work function layer comprising titanium aluminum or titanium aluminum nitride having a first nitrogen composition atop the dielectric layer; etching the work function layer to selectively remove at least a portion of the work function layer from atop the dielectric layer; depositing a layer comprising titanium aluminum or titanium aluminum nitride having a second nitrogen composition atop the work function layer and the substrate, wherein at least one of the work function layer or the layer comprises nitrogen; etching the layer and the dielectric layer to selectively remove a portion of the layer and the dielectric layer from atop the substrate; and annealing the substrate at a temperature less than about 1500 degrees Celsius.
摘要翻译：提供具有调谐功能的衬底器件及其形成方法。在一些实施例中，在衬底上形成器件可以包括在具有导电性的衬底顶上淀积介电层; 在所述电介质层的顶部沉积包含具有第一氮组成的钛铝或氮化铝钛的功函数层; 蚀刻功函数层以从电介质层顶部选择性地去除功函数层的至少一部分; 在所述功函数层和所述衬底的顶部上沉积包含具有第二氮组成的钛铝或氮化铝钛的层，其中所述功函数层或所述层中的至少一个包含氮; 蚀刻所述层和所述介电层以从所述衬底顶部选择性地去除所述层和所述电介质层的一部分; 并在低于约1500摄氏度的温度下退火衬底。

9. 发明申请

US20100032289A1 METHOD FOR ULTRA-UNIFORM SPUTTER DEPOSITION USING SIMULTANEOUS RF AND DC POWER ON TARGET 有权
标题翻译：使用同步射频和直流电源对目标进行超均匀溅射沉积的方法
公开(公告)号：US20100032289A1
公开(公告)日：2010-02-11
申请号：US12188937
申请日：2008-08-08
申请人： RONGJUN WANG , Xianmin Tang , Zhendong Liu , Tza-Jing Gung , Maurice E. Ewert
发明人： RONGJUN WANG , Xianmin Tang , Zhendong Liu , Tza-Jing Gung , Maurice E. Ewert
IPC分类号： C23C14/00
CPC分类号： C23C14/54 , C23C14/3492 , C23C14/35 , C23C14/542 , H01J37/32027 , H01J37/32091 , H01J37/34 , H01J37/347 , H01L21/02266
摘要： In a plasma-enhanced physical vapor deposition reactor, uniformity of radial distribution of the deposition rate across the workpiece is enhanced by applying both RF and D.C. power to the target and adjusting the power levels of the RF and D.C. power independently. Further optimization is obtained by adjusting the height of the magnet above the target, adjusting the radius of the orbital motion of the magnet above the target and providing an angle edge surface of the target.
摘要翻译：在等离子体增强的物理气相沉积反应器中，通过将RF和DCC功率施加到目标并且独立地调节RF和DC电源的功率电平来增强穿过工件的沉积速率的径向分布的均匀性。通过调整磁体在目标上方的高度，调整磁体在目标上方的轨道运动的半径，并提供目标的角度边缘表面，可获得进一步优化。

10. 发明授权

US09834840B2 Process kit shield for improved particle reduction 有权
公开(公告)号：US09834840B2
公开(公告)日：2017-12-05
申请号：US13106392
申请日：2011-05-12
申请人： Muhammad Rasheed , Rongjun Wang , Zhendong Liu , Xinyu Fu , Xianmin Tang
发明人： Muhammad Rasheed , Rongjun Wang , Zhendong Liu , Xinyu Fu , Xianmin Tang
IPC分类号： C23C14/35 , C23C14/56 , H01J37/32 , H01J37/34
CPC分类号： C23C14/35 , C23C14/564 , H01J37/32853 , H01J37/32871 , H01J37/34 , H01J37/3411
摘要： Apparatus for improved particle reduction are provided herein. In some embodiments, an apparatus may include a process kit shield comprising a one-piece metal body having an upper portion and a lower portion and having an opening disposed through the one-piece metal body, wherein the upper portion includes an opening-facing surface configured to be disposed about and spaced apart from a target of a physical vapor deposition chamber and wherein the opening-facing surface is configured to limit particle deposition on an upper surface of the upper portion of the one-piece metal body during sputtering of a target material from the target of the physical vapor deposition chamber.

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