专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06240033B1 Antifuse circuitry for post-package DRAM repair 有权
标题翻译：用于后封装DRAM修复的防漏电路
公开(公告)号：US06240033B1
公开(公告)日：2001-05-29
申请号：US09479665
申请日：2000-01-10
申请人： Woodward Yang , Joo Sun Choi , Jae Kyung Wee , Young Ho Seol , Jin Keun Oh , Phil Jung Kim , Ho Youe Cho
发明人： Woodward Yang , Joo Sun Choi , Jae Kyung Wee , Young Ho Seol , Jin Keun Oh , Phil Jung Kim , Ho Youe Cho
IPC分类号： G11C700
CPC分类号： G11C29/781 , G11C17/18
摘要： The anti-fuse circuit includes three sub-blocks: a multiplexer having inputs of control signals and addresses and yielding the activation of a programming signal and program addresses; a programming voltage generator consisting of an oscillator and a charge pump; and an anti-fuse unit circuits for the program/read of anti-fuse states. For an anti-fuse program at the special test mode, a program address generation circuit having inputs of control signals and addresses activates the programming voltage generator and makes a special or program address for selection of anti-fuse. In the normal mode, the program address generation circuit and an internal power generator remain at an inactive state. In anti-fuse unit circuit, the program address and the programming voltage signal from the programming voltage generator serve to switch the terminal of the anti-fuse up to a programming voltage level when the anti-fuse is selected for programming of anti-fuse elements.
摘要翻译：反熔丝电路包括三个子块：具有控制信号和地址的输入并产生编程信号和程序地址的激活的多路复用器; 由振荡器和电荷泵组成的编程电压发生器; 以及用于编程/读取反熔丝状态的反熔丝单元电路。对于在特殊测试模式下的反熔丝程序，具有控制信号和地址的输入的程序地址产生电路激活编程电压发生器，并产生用于选择反熔丝的特殊或程序地址。在正常模式中，程序地址产生电路和内部发电机保持在非工作状态。在反熔丝单元电路中，编程电压发生器的程序地址和编程电压信号用于在反熔丝被选择用于编程抗熔丝元件时将反熔丝的端子切换到编程电压电平。

2. 发明授权

US07546517B2 Error-correcting circuit for high density memory 有权
标题翻译：高密度存储器的纠错电路
公开(公告)号：US07546517B2
公开(公告)日：2009-06-09
申请号：US11195077
申请日：2005-08-02
申请人： Elaine Ou , Woodward Yang
发明人： Elaine Ou , Woodward Yang
IPC分类号： H03M13/00
CPC分类号： H03M13/19
摘要： This invention relates to a circuit technique for rapidly and efficiently correcting for read and write data errors in a digital semiconductor memory. More generally, this can also be in any type of digital memory or digital communication channel. As semiconductor memories get smaller and smaller, the memory cells are subject to higher rates of manufacturing defects and soft errors. Correction of manufacturing defects is achieved through extensive testing and use of redundant memory cells to replace defective memory cells. Soft errors are very difficult to detect and correct and only the simplest parity check codes have been implemented. The cost in terms of delay time and computational complexity are barriers to the implementation of ECC. This invention represents a device that introduces very little delay and requires minimal hardware complexity to implement.
摘要翻译：本发明涉及用于快速有效地校正数字半导体存储器中的读和写数据错误的电路技术。更一般地，这也可以是任何类型的数字存储器或数字通信通道。随着半导体存储器越来越小，存储器单元的制造缺陷和软错误的发生率就越高。通过广泛的测试和使用冗余存储单元来代替有缺陷的存储单元来实现制造缺陷的纠正。软错误非常难以检测和纠正，只有最简单的奇偶校验码已被实现。在延迟时间和计算复杂性方面的成本是实现ECC的障碍。本发明代表一种引入很少延迟并且实现最少的硬件复杂度的设备。

3. 发明授权

US06184055B2 CMOS image sensor with equivalent potential diode and method for fabricating the same 有权
标题翻译：具有等效电位二极管的CMOS图像传感器及其制造方法
公开(公告)号：US06184055B2
公开(公告)日：2001-02-06
申请号：US09258814
申请日：1999-02-26
申请人： Woodward Yang , Ju Il Lee , Nan Yi Lee
发明人： Woodward Yang , Ju Il Lee , Nan Yi Lee
IPC分类号： H01L2100
CPC分类号： H01L27/14609 , H01L27/1443
摘要： A CMOS image sensor according to the present invention has a low-voltage photodiode which is fully depleted at a bias of 1.2-4.5V. The photodiode comprises: a P-epi layer; a field oxide layer dividing the P-epi layer into a field region and an active region; a N− region formed within the P-epi layer, wherein the first impurity region is apart from the isolation layer; and a P0 region of the conductive type formed beneath a surface of the P-epi layer and on the N− region, wherein a width of the P0 region is wider than that of the N− region so that a portion of the P0 region is formed on the P-epi layer, whereby the P0 region has the same potential as the P-epi layer.
摘要翻译：根据本发明的CMOS图像传感器具有在1.2-4.5V的偏压下完全耗尽的低电压光电二极管。光电二极管包括：P-epi层; 将所述P外延层划分为场区域和有源区域的场氧化物层; 形成在所述P外延层内的N-区域，其中所述第一杂质区域与所述隔离层分离; 以及形成在P外延层的表面的N区域的下方的导电类型的P0区域，其中P0区域的宽度比N区域宽，使得P0区域的一部分为形成在P外延层上，由此P0区域具有与P外延层相同的电位。

4. 发明申请

US20060010183A1 Random number generation 审中-公开
标题翻译：随机数生成
公开(公告)号：US20060010183A1
公开(公告)日：2006-01-12
申请号：US10887713
申请日：2004-07-09
申请人： Michael Rabin , Woodward Yang , Hanming Rao
发明人： Michael Rabin , Woodward Yang , Hanming Rao
IPC分类号： G06F1/02
CPC分类号： H04L9/0866 , G06F1/03 , G06F7/588
摘要： Sensor elements each of which occupies one of at least two states at a given time, are exposed to an external influence capable of switching a state of at least a random one of the elements. After the exposing has occurred, information identifying the sensor elements, the states of which have been switched, is used to generate random numbers.
摘要翻译：在给定时间，每个占据至少两个状态中的一个的传感器元件暴露于能够切换至少一个元件的至少一个状态的外部影响。在发生曝光之后，使用识别传感器元件的信息，其状态已被切换，用于产生随机数。

5. 发明授权

US06180969B2 CMOS image sensor with equivalent potential diode 有权
标题翻译：具有等效电位二极管的CMOS图像传感器
公开(公告)号：US06180969B2
公开(公告)日：2001-01-30
申请号：US09258307
申请日：1999-02-26
申请人： Woodward Yang , Ju Il Lee , Nan Yi Lee
发明人： Woodward Yang , Ju Il Lee , Nan Yi Lee
IPC分类号： H01L31062
CPC分类号： H01L27/14609 , H01L27/1443
摘要： A CMOS image sensor according to the present invention has a low-voltage photodiode which is fully depleted at a bias of 1.2-4.5V. The photodiode comprises: a P-epi layer; a field oxide layer dividing the P-epi layer into a field region and an active region; a N− region formed within the P-epi layer, wherein the first impurity region is apart from the isolation layer; and a P0 region of the conductive type formed beneath a surface of the P-epi layer and on the N− region, wherein a width of the P0 region is wider than that of the N− region so that a portion of the P0 region is formed on the P-epi layer, whereby the P0 region has the same potential as the P-epi layer.
摘要翻译：根据本发明的CMOS图像传感器具有在1.2-4.5V的偏压下完全耗尽的低电压光电二极管。光电二极管包括：P-epi层; 将所述P外延层划分为场区域和有源区域的场氧化物层; 形成在所述P外延层内的N-区域，其中所述第一杂质区域与所述隔离层分离; 以及形成在P外延层的表面的N区域的下方的导电类型的P0区域，其中P0区域的宽度比N区域宽，使得P0区域的一部分为形成在P外延层上，由此P0区域具有与P外延层相同的电位。

6. 发明授权

US5214274A Image sensor array with threshold voltage detectors and charged storage capacitors 失效
标题翻译：具有阈值电压检测器和充电存储电容器的图像传感器阵列
公开(公告)号：US5214274A
公开(公告)日：1993-05-25
申请号：US919771
申请日：1992-07-24
申请人： Woodward Yang
发明人： Woodward Yang
IPC分类号： G01J1/44 , H04N5/335 , H04N5/355 , H04N5/372
CPC分类号： H04N5/335 , G01J1/44 , G01J2001/4426 , G01J2001/448
摘要： A wide dynamic range sensor employing simple sensing circuitry formed on a single chip provides accurate measurements of an incoming signal capable of varying of a wide dynamic range. Responsive to an incoming signal, the sensor generates output pulses having a frequency which is representative of a property of the incoming signal. By measuring the output pulse frequency, an accurate indication of a property of the incoming signal capable of varying over a range of 10.sup.5 or more is possible over the entire signal range. A plurality of sensors can be colocated on a single chip for providing a wide dynamic range sensor array.
摘要翻译：采用在单个芯片上形成的简单感测电路的宽动态范围传感器可提供能够改变宽动态范围的输入信号的精确测量。响应于输入信号，传感器产生具有代表输入信号的特性的频率的输出脉冲。通过测量输出脉冲频率，可以在整个信号范围内精确指示能够在105或更大范围内变化的输入信号的特性。多个传感器可以共同定位在单个芯片上，以提供宽的动态范围传感器阵列。

7. 发明申请

US20060031741A1 Error-correcting circuit for high density memory 有权
公开(公告)号：US20060031741A1
公开(公告)日：2006-02-09
申请号：US11195077
申请日：2005-08-02
申请人： Elaine Ou , Woodward Yang
发明人： Elaine Ou , Woodward Yang
IPC分类号： H03M13/00
CPC分类号： H03M13/19
摘要： This invention relates to a circuit technique for rapidly and efficiently correcting for read and write data errors in a digital semiconductor memory. More generally, this can also be in any type of digital memory or digital communication channel. As semiconductor memories get smaller and smaller, the memory cells are subject to higher rates of manufacturing defects and soft errors. Correction of manufacturing defects is achieved through extensive testing and use of redundant memory cells to replace defective memory cells. Soft errors are very difficult to detect and correct and only the simplest parity check codes have been implemented. The cost in terms of delay time and computational complexity are barriers to the implementation of ECC. This invention represents a device that introduces very little delay and requires minimal hardware complexity to implement.

8. 发明授权

US06633335B1 CMOS image sensor with testing circuit for verifying operation thereof 有权
标题翻译： CMOS图像传感器，具有用于验证其操作的测试电路
公开(公告)号：US06633335B1
公开(公告)日：2003-10-14
申请号：US09258448
申请日：1999-02-26
申请人： Oh Bong Kwon , Woodward Yang , Suk Joong Lee , Gyu Tae Hwang
发明人： Oh Bong Kwon , Woodward Yang , Suk Joong Lee , Gyu Tae Hwang
IPC分类号： H04N314
CPC分类号： H03M1/1071 , G01R31/318502 , H03M1/1023 , H03M1/123 , H03M1/56 , H04N17/002
摘要： The present invention relates to a picture display using CMOS (Complementary Metal Oxide Semiconductor) image sensor; and, more particularly, to a CMOS image sensor having a testing circuit embedded therein and a method for verifying operation of the CMOS image sensor using the testing circuit. The CMOS image sensor according to the present invention includes a control/interface unit for controlling its operation sensor using a state machine and for interfacing the CMOS image sensor with an external system; a pixel array including a plurality of pixels sensing images from an object and generating analogue signals according to an amount of incident light; a converter for converting the analogue signals into digital signals to be processed in a digital logic circuit; and a testing circuit for verifying operations of the converter and the control/interface unit, by controlling the converter.
摘要翻译：本发明涉及使用CMOS（互补金属氧化物半导体）图像传感器的图像显示器; 更具体地，涉及具有嵌入其中的测试电路的CMOS图像传感器以及使用该测试电路验证CMOS图像传感器的操作的方法。根据本发明的CMOS图像传感器包括：控制/接口单元，用于使用状态机控制其操作传感器并将CMOS图像传感器与外部系统接口; 像素阵列，其包括感测来自对象的图像的多个像素，并且根据入射光的量产生模拟信号; 用于将模拟信号转换成数字逻辑电路中要处理的数字信号的转换器; 以及通过控制转换器来验证转换器和控制/接口单元的操作的测试电路。

9. 发明授权

US5838272A Error correcting sigma-delta modulation decoding 失效
标题翻译：纠错Σ-Δ调制解码
公开(公告)号：US5838272A
公开(公告)日：1998-11-17
申请号：US838056
申请日：1997-04-17
申请人： Philip Steiner , Woodward Yang
发明人： Philip Steiner , Woodward Yang
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/38 , H03M3/43
摘要： The performance of sigma delta analog to digital conversion systems is enhanced by instrumenting the modulator with an observation circuit which provides quantized estimates of the modulator's state values. These state estimates are filtered separately and the result is added to the output of the decimator. This technique lowers the noise floor of the signal band and achieves performances better than those predicted by the spectrum of the modulator output. Error Correcting is particularly well suited to very low oversampling ratios. Finally, the correction is calculated and added in the digital domain so that this technique can be employed with existing architectures with only minor modifications.
摘要翻译：通过使用提供调制器状态值的量化估计的观察电路来调制调制器，增强了Σ-Δ模拟到数字转换系统的性能。这些状态估计被分别过滤，结果被添加到抽取器的输出。这种技术降低了信号频带的本底噪声，并且能够比调制器输出频谱预测的性能更好。错误校正特别适用于非常低的过采样比。最后，校正被计算并添加到数字域中，使得该技术可以与现有架构一起使用，只进行微小的修改。

10. 发明授权

US06545624B2 Image sensor with analog-to-digital converter that generates a variable slope ramp signal 有权
标题翻译：具有模拟 - 数字转换器的图像传感器，可生成可变斜率斜坡信号
公开(公告)号：US06545624B2
公开(公告)日：2003-04-08
申请号：US09780944
申请日：2001-02-08
申请人： Kang-Jin Lee , Chan-Ki Kim , Jae-Won Eom , Woodward Yang
发明人： Kang-Jin Lee , Chan-Ki Kim , Jae-Won Eom , Woodward Yang
IPC分类号： H03M112
CPC分类号： H04N5/378
摘要： A programmable analog-to-digital converter (ADC) for use in a CMOS imaging system, the CMOS imaging system having an array of pixels, and the ADC configured to provide a enhanced conversion resolution for pixels providing a low analog voltage level and a relatively coarser conversion resolution for pixels providing a relatively higher analog voltage level.
摘要翻译：一种用于CMOS成像系统的可编程模数转换器（ADC），具有像素阵列的CMOS成像系统，以及配置成为提供低模拟电压电平的像素提供增强的转换分辨率的ADC 对于提供相对较高的模拟电压电平的像素的较粗的转换分辨率。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式