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1. 发明申请

US20050093136A1 Thermal dissipating element of a chip 审中-公开
标题翻译：芯片的散热元件
公开(公告)号：US20050093136A1
公开(公告)日：2005-05-05
申请号：US10698476
申请日：2003-11-03
申请人： Wei-Chi Liu , Wei-Feng Lin , Chung-Ju Wu
发明人： Wei-Chi Liu , Wei-Feng Lin , Chung-Ju Wu
IPC分类号： H01L23/10 , H01L23/433
CPC分类号： H01L23/4334 , H01L2224/49175 , H01L2924/16152 , H01L2924/181 , H01L2924/00012
摘要： The present invention relates to a thermal dissipating element of a chip to dissipate heat producing by operating the chip. The thermal dissipating element includes a cover and a lump. The cover includes a top plate and a side plate, wherein the top plate curves and extendedly connects to the side plate. The lump is fastened between the chip and the top plate of the cover.
摘要翻译：本发明涉及一种芯片的散热元件，用于散发通过操作芯片产生的热量。散热元件包括盖和块。该盖包括顶板和侧板，其中顶板弯曲并且延伸地连接到侧板。该块被固定在芯片和盖板的顶板之间。

2. 发明授权

US06882037B2 Die paddle for receiving an integrated circuit die in a plastic substrate 失效
标题翻译：用于在塑料基板中接收集成电路管芯的模板
公开(公告)号：US06882037B2
公开(公告)日：2005-04-19
申请号：US10213077
申请日：2002-08-07
申请人： Wei-Feng Lin , Wei-Chi Liu , Chung-Ju Wu
发明人： Wei-Feng Lin , Wei-Chi Liu , Chung-Ju Wu
IPC分类号： H01L21/58 , H01L23/498 , H01L23/48
CPC分类号： H01L24/83 , H01L23/49838 , H01L24/29 , H01L2224/2919 , H01L2224/8319 , H01L2224/8385 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/00
摘要： A die paddle for receiving an integrated circuit die in a plastic substrate. The die paddle is defined by a copper film on the plastic substrate and comprises a plurality of via holes through the plastic substrate, a plurality of opening through the copper film, and a gold-containing ring formed on the peripheral portion of the copper film. The outermost openings (and/or the outermost via holes) and the gold-containing ring are separated by a distance of about 1 to about 20 mils.
摘要翻译：一种用于在塑料基板中接收集成电路管芯的裸片。模板由塑料基板上的铜膜限定，并且包括穿过塑料基板的多个通孔，穿过铜膜的多个开口以及形成在铜膜周边部分上的含金环。最外面的开口（和/或最外通孔）和含金环分开约1至约20密耳的距离。

3. 发明申请

US20050093135A1 Thermal dissipating element of a chip 审中-公开
标题翻译：芯片的散热元件
公开(公告)号：US20050093135A1
公开(公告)日：2005-05-05
申请号：US10697099
申请日：2003-10-31
申请人： Wei-Chi Liu , Wei-Feng Lin , Chung-Ju Wu
发明人： Wei-Chi Liu , Wei-Feng Lin , Chung-Ju Wu
IPC分类号： H01L23/433 , H01L23/10 , H01L23/34
CPC分类号： H01L23/4334 , H01L2224/32245 , H01L2924/16152 , H01L2924/1815
摘要： The present invention relates to a thermal dissipating element of a chip to dissipate heat producing by operating the chip. The thermal dissipating element includes a top plate and a side plate, wherein the top plate curves and extends to be the side plate. The top plate includes a sink contacting with the chip.
摘要翻译：本发明涉及一种芯片的散热元件，用于散发通过操作芯片产生的热量。散热元件包括顶板和侧板，其中顶板弯曲并延伸成侧板。顶板包括与芯片接触的接收器。

4. 发明授权

US06765301B2 Integrated circuit bonding device and manufacturing method thereof 有权
标题翻译：集成电路接合装置及其制造方法
公开(公告)号：US06765301B2
公开(公告)日：2004-07-20
申请号：US10212106
申请日：2002-08-06
申请人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
发明人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
IPC分类号： H01L2348
CPC分类号： H01L23/49838 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05553 , H01L2224/45147 , H01L2224/48091 , H01L2224/49 , H01L2924/00014 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/3025 , H01L2224/05599
摘要： An integrated circuit device. The substrate includes a signal connection point and two shielding connection points set at the two sides of the signal connection point. The chip is set on the substrate. There are a signal pad and two shielding pads set at the two sides of the signal pad on the edge of the chip. The signal wire bonding is coupled to the signal connection point and the signal pad. Two shielding wire bondings are coupled to the shielding connection points and the shielding pads and extend along both sides of the signal wire bonding. The signal trace line is set on the substrate and coupled to the signal connection point. The power ring circuit is set on the substrate and coupled to the shielding connection points. The power circuit includes two shielding lines extending along both sides of the signal trace line.
摘要翻译：集成电路器件。基板包括设置在信号连接点两侧的信号连接点和两个屏蔽连接点。芯片设置在基板上。信号焊盘和两个屏蔽焊盘设置在芯片边缘的信号焊盘两侧。信号线接合耦合到信号连接点和信号焊盘。两个屏蔽线接合耦合到屏蔽连接点和屏蔽焊盘，并沿着信号线接合的两侧延伸。信号跟踪线设置在基板上并耦合到信号连接点。电源环电路设置在基板上并耦合到屏蔽连接点。电源电路包括沿着信号迹线的两侧延伸的两条屏蔽线。

5. 发明授权

US06524942B2 Bond pad structure and its method of fabricating 失效
公开(公告)号：US06524942B2
公开(公告)日：2003-02-25
申请号：US10056004
申请日：2002-01-28
申请人： Chen-Wen Tsai , Chung-Ju Wu , Wei-Feng Lin
发明人： Chen-Wen Tsai , Chung-Ju Wu , Wei-Feng Lin
IPC分类号： H01L2144
CPC分类号： H01L24/05 , H01L24/03 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05001 , H01L2224/05083 , H01L2224/05093 , H01L2224/05095 , H01L2224/05096 , H01L2224/05554 , H01L2224/05555 , H01L2224/05624 , H01L2224/45124 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48724 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/04941 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A bond pad structure and a method of fabricating such structure are disclosed in the invention. The bond pad structure is formed over a predetermined area defined on a semiconductor substrate. The bond pad structure includes at least two metal layers formed over the predetermined area and at least one sub-structure combination layer which each is formed over the predetermined area and formed between two corresponding first metal layers. Each sub-structure combination layer includes a dielectric layer formed over the predetermined area, formed-through via openings with special disposition on the dielectric layer, a first diffusion barrier layer formed over the dielectric layer and the sidewalls and bottom of the via openings, a metal material filled into the via openings to form via plugs, and a second diffusion barrier layer formed over the first diffusion barrier layer and via plugs. Due to special disposition of via plugs and well adhesion between metal layer and diffusion barrier layers, the bond pad structure, according to the invention, can prevent form damage possibly induced during subsequent probe test procedure and wire bonding process.

6. 发明授权

US06744128B2 Integrated circuit package capable of improving signal quality 有权
标题翻译：集成电路封装，能够提高信号质量
公开(公告)号：US06744128B2
公开(公告)日：2004-06-01
申请号：US10262958
申请日：2002-10-03
申请人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
发明人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
IPC分类号： H01L2302
CPC分类号： H01L23/49833 , H01L23/642 , H01L2924/0002 , H01L2924/15311 , H01L2924/19105 , H01L2924/00
摘要： An integrated circuit package capable of improving signal quality is disclosed. The integrated circuit package comprises a first substrate, an integrated circuit chip attached on the first surface of the first substrate. This integrated circuit package further comprises a plurality of external terminals mounted on the first substrate and a plurality of first bonding pads mounted on the edge portion of the first surface of the first substrate and respectively connected to the corresponding external terminals. Also, the integrated circuit package further comprises a second substrate and a plurality of second bonding pads mounted on the second surface of the second substrate and connected to the first bonding pads formed on the first substrate. Furthermore, this integrated circuit package further comprises a plurality of passive components disposed on the second substrate.
摘要翻译：公开了能够提高信号质量的集成电路封装。集成电路封装包括第一衬底，附接在第一衬底的第一表面上的集成电路芯片。该集成电路封装还包括安装在第一基板上的多个外部端子和安装在第一基板的第一表面的边缘部分上并分别连接到相应的外部端子的多个第一接合焊盘。此外，集成电路封装还包括第二衬底和安装在第二衬底的第二表面上并连接到形成在第一衬底上的第一焊盘的多个第二焊盘。此外，该集成电路封装还包括设置在第二基板上的多个无源部件。

7. 发明授权

US06509646B1 Apparatus for reducing an electrical noise inside a ball grid array package 有权
标题翻译：用于减少球栅阵列封装内的电噪声的装置
公开(公告)号：US06509646B1
公开(公告)日：2003-01-21
申请号：US09575637
申请日：2000-05-22
申请人： Wei-Feng Lin , Chung-Ju Wu , Chen-Wen Tsai
发明人： Wei-Feng Lin , Chung-Ju Wu , Chen-Wen Tsai
IPC分类号： H01L21302
CPC分类号： H01L23/50 , H01L23/49816 , H01L23/552 , H01L2924/0002 , H01L2924/15311 , H01L2924/19106 , H05K1/0231 , H05K3/321 , H05K2201/1053 , H05K2201/10636 , H05K2201/10734 , Y02P70/611 , H01L2924/00
摘要： An apparatus for reducing an electrical noise inside a ball grid array package is disclosed. The apparatus mainly comprises a substrate, a plurality of solder balls and a plurality of inside-connected capacitors. The substrate includes a contact layer, a power plane and a ground plane. The plurality of solder balls are fixed on the contact layer. The plurality of inside-connected capacitors are fixed on the contact layer, and a conductive glue is used to electrically connect the capacitors to the power plane and ground plane to reduce the electrical noise between the power plane and ground plane.
摘要翻译：公开了一种用于减小球栅阵列封装内的电噪声的装置。该装置主要包括基板，多个焊球和多个内部连接的电容器。基板包括接触层，电源平面和接地平面。多个焊球固定在接触层上。多个内部连接的电容器固定在接触层上，并且使用导电胶将电容器电连接到电源平面和接地平面，以减小电力平面和接地面之间的电气噪声。

8. 发明授权

US07209354B2 Ball grid array package with heat sink device 有权
标题翻译：具有散热装置的球栅阵列封装
公开(公告)号：US07209354B2
公开(公告)日：2007-04-24
申请号：US10724891
申请日：2003-12-02
申请人： Chung-Ju Wu , Wei-Feng Lin
发明人： Chung-Ju Wu , Wei-Feng Lin
IPC分类号： H05K7/20 , H01L23/36 , H05K1/18
CPC分类号： H01L23/4093 , H01L2924/15311 , H01L2924/16152
摘要： The present invention provides a heat sink device for the package device to improve the heat dissipating efficiency. The heat sink device includes a first heat sink assembly and a second heat sink assembly. The first heat sink assembly has a first heat dissipating structure, a second heat dissipating structure positioned above first the heat dissipating structure, at least two thermal supports on the backside of the first heat sink assembly and a thermal block on the backside of the first heat sink assembly. The second heat sink assembly has a protruding structure and at least the openings. The first heat sink assembly is fixed with the second heat sink assembly to form a heat sink device by the combination of the thermal supports and the openings. The first heat sink assembly and the second heat sink assembly are attached to the integrated circuit device separately by the thermal block and the protruding structure. This heat sink device provides several heat dissipating pathes by the second heat dissipating structure, the thermal supports, the thermal block, and protruding structure. Therefore, the heat dissipation efficiency of the heat sink device is improved.
摘要翻译：本发明提供了一种用于封装装置的散热装置，以提高散热效率。散热器装置包括第一散热器组件和第二散热器组件。第一散热器组件具有第一散热结构，位于第一散热结构之上的第二散热结构，在第一散热器组件的背面上的至少两个热支撑件和位于第一散热构件的背面的热块水槽组件。第二散热器组件具有突出结构并且至少具有开口。第一散热器组件与第二散热器组件固定以通过热支撑件和开口的组合形成散热装置。第一散热器组件和第二散热器组件通过热块和突出结构分别附接到集成电路设备。该散热装置通过第二散热结构，热支撑件，热块和突出结构提供多个散热孔。因此，散热器件的散热效率提高。

9. 发明授权

US06838756B2 Chip-packaging substrate 失效
标题翻译：芯片封装基板
公开(公告)号：US06838756B2
公开(公告)日：2005-01-04
申请号：US10227266
申请日：2002-08-26
申请人： Wei-Feng Lin , Chung-Ju Wu , Chen-Wen Tsai
发明人： Wei-Feng Lin , Chung-Ju Wu , Chen-Wen Tsai
IPC分类号： H01L23/13 , H01L23/495
CPC分类号： H01L23/13 , H01L2924/0002 , H01L2924/00
摘要： A chip-packaging substrate. The substrate is capable of reducing damage during packaging, shrinking its connecting portions so that the length of any of the gap slots between the packaging portion and the frame portion of the substrate is increased. Furthermore, a dummy layer is provided to one surface of the frame portion to flush the surface on the frame portion with that of the packaging portion as much as possible.
摘要翻译：芯片封装基板。该基板能够减少封装期间的损坏，使其连接部分收缩，使得封装部分和基板的框架部分之间的任何间隙的长度增加。此外，在框架部分的一个表面上设置虚拟层，以尽可能多地将框架部分的表面与包装部分的表面齐平。

10. 发明授权

US06747350B1 Flip chip package structure 有权
标题翻译：倒装芯片封装结构
公开(公告)号：US06747350B1
公开(公告)日：2004-06-08
申请号：US10455525
申请日：2003-06-06
申请人： Wei-Feng Lin , Yin-Chieh Hsueh , Chung-Ju Wu
发明人： Wei-Feng Lin , Yin-Chieh Hsueh , Chung-Ju Wu
IPC分类号： H01L2312
CPC分类号： H01L23/3128 , H01L21/563 , H01L23/49822 , H01L23/552 , H01L24/32 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/14 , H01L2924/15311 , H01L2924/16152 , H01L2924/166 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
摘要： A flip chip package structure. The structure includes a substrate, an IC chip electrically connected to the substrate through a plurality of conductive bumps, encapsulant between the substrate and IC chip, and an electrically protective device. The substrate has interior wiring, a plurality of first contacts arranged at a predetermined pitch among each other on a surface, and a trace line area beyond the first contacts on the surface. The electrically protective device has a protruding part covering the IC chip, and an extending part extending over the surface of the substrate with a gap as large as 40 mil. The extending part further covers the trace line area, and connects to the surface of the substrate using a fixing material.
摘要翻译：倒装芯片封装结构。该结构包括基板，通过多个导电凸块电连接到基板的IC芯片，基板和IC芯片之间的密封剂以及电保护装置。衬底具有内部布线，在表面上彼此以预定间距布置的多个第一触点以及超过表面上的第一触点的迹线区域。电保护装置具有覆盖IC芯片的突出部分和在基板的表面上延伸大约40密耳的间隙的延伸部分。延伸部分进一步覆盖迹线区域，并使用固定材料连接到基板的表面。

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