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1. 发明授权

US06765301B2 Integrated circuit bonding device and manufacturing method thereof 有权
标题翻译：集成电路接合装置及其制造方法
公开(公告)号：US06765301B2
公开(公告)日：2004-07-20
申请号：US10212106
申请日：2002-08-06
申请人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
发明人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
IPC分类号： H01L2348
CPC分类号： H01L23/49838 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05553 , H01L2224/45147 , H01L2224/48091 , H01L2224/49 , H01L2924/00014 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/3025 , H01L2224/05599
摘要： An integrated circuit device. The substrate includes a signal connection point and two shielding connection points set at the two sides of the signal connection point. The chip is set on the substrate. There are a signal pad and two shielding pads set at the two sides of the signal pad on the edge of the chip. The signal wire bonding is coupled to the signal connection point and the signal pad. Two shielding wire bondings are coupled to the shielding connection points and the shielding pads and extend along both sides of the signal wire bonding. The signal trace line is set on the substrate and coupled to the signal connection point. The power ring circuit is set on the substrate and coupled to the shielding connection points. The power circuit includes two shielding lines extending along both sides of the signal trace line.
摘要翻译：集成电路器件。基板包括设置在信号连接点两侧的信号连接点和两个屏蔽连接点。芯片设置在基板上。信号焊盘和两个屏蔽焊盘设置在芯片边缘的信号焊盘两侧。信号线接合耦合到信号连接点和信号焊盘。两个屏蔽线接合耦合到屏蔽连接点和屏蔽焊盘，并沿着信号线接合的两侧延伸。信号跟踪线设置在基板上并耦合到信号连接点。电源环电路设置在基板上并耦合到屏蔽连接点。电源电路包括沿着信号迹线的两侧延伸的两条屏蔽线。

2. 发明授权

US08916980B2 Pad and circuit layout for semiconductor devices 有权
标题翻译：半导体器件的焊盘和电路布局
公开(公告)号：US08916980B2
公开(公告)日：2014-12-23
申请号：US13398364
申请日：2012-02-16
申请人： Tiejun Dai , Kuei Chen Liang
发明人： Tiejun Dai , Kuei Chen Liang
IPC分类号： H01L23/48
CPC分类号： H01L27/14618 , H01L27/14632 , H01L2224/13
摘要： An apparatus includes an image sensor with a frontside and a backside. The image sensor includes an active circuit region and bonding pads. The active circuit region has a first shape that is substantially rectangular. The substantially rectangular first shape has first chamfered corners. A perimeter of the frontside of the image sensor has a second shape that is substantially rectangular. The second substantially rectangular shape has second chamfered corners. The bonding pads are disposed on the frontside of the image sensor. The bonding pads are disposed between the first chamfered corners and the second chamfered corners. The first shape is disposed inside the second shape.
摘要翻译：一种装置包括具有前侧和后侧的图像传感器。图像传感器包括有源电路区域和接合焊盘。有源电路区域具有大致矩形的第一形状。大致矩形的第一形状具有第一倒角。图像传感器的前侧的周边具有大致矩形的第二形状。第二基本矩形形状具有第二倒角。接合焊盘设置在图像传感器的前侧。接合焊盘设置在第一倒角和第二倒角之间。第一形状设置在第二形状的内部。

3. 发明申请

US20130214375A1 PAD AND CIRCUIT LAYOUT FOR SEMICONDUCTOR DEVICES 有权
标题翻译：半导体器件的PAD和电路布局
公开(公告)号：US20130214375A1
公开(公告)日：2013-08-22
申请号：US13398364
申请日：2012-02-16
申请人： Tiejun Dai , Kuei Chen Liang
发明人： Tiejun Dai , Kuei Chen Liang
IPC分类号： H01L31/0224 , H01L31/18 , H01L23/488
CPC分类号： H01L27/14618 , H01L27/14632 , H01L2224/13
摘要： An apparatus includes an image sensor with a frontside and a backside. The image sensor includes an active circuit region and bonding pads. The active circuit region has a first shape that is substantially rectangular. The substantially rectangular first shape has first chamfered corners. A perimeter of the frontside of the image sensor has a second shape that is substantially rectangular. The second substantially rectangular shape has second chamfered corners. The bonding pads are disposed on the frontside of the image sensor. The bonding pads are disposed between the first chamfered corners and the second chamfered corners. The first shape is disposed inside the second shape.
摘要翻译：一种装置包括具有前侧和后侧的图像传感器。图像传感器包括有源电路区域和接合焊盘。有源电路区域具有大致矩形的第一形状。大致矩形的第一形状具有第一倒角。图像传感器的前侧的周边具有大致矩形的第二形状。第二基本矩形形状具有第二倒角。接合焊盘设置在图像传感器的前侧。接合焊盘设置在第一倒角和第二倒角之间。第一形状设置在第二形状的内部。

4. 发明授权

US06933600B2 Substrate for semiconductor package 有权
标题翻译：半导体封装基板
公开(公告)号：US06933600B2
公开(公告)日：2005-08-23
申请号：US10152191
申请日：2002-05-20
申请人： Chung Ju Wu , Kuei Chen Liang , Wei Feng Lin
发明人： Chung Ju Wu , Kuei Chen Liang , Wei Feng Lin
IPC分类号： H01L21/56 , H01L23/48 , H01L23/485 , H01L23/528 , H01L23/552 , H01L31/00
CPC分类号： H01L24/06 , H01L23/5286 , H01L23/552 , H01L2224/05553 , H01L2224/05644 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/3025 , H01L2924/00014
摘要： The invention provides a semiconductor package substrate, which includes a substrate, a chip contact area, an inner pad portion, an outer pad portion and a conductive layer. The chip contact area, the inner pad portion, the outer pad portion and the conductive layer are formed on one side of the substrate, wherein the outer pad portion encloses the inner pad portion that surrounds the chip contact area in the center of the substrate. The inner pad portion and the outer pad portion contain a plurality of signal pads and a plurality of shielding pads respectively, while the conductive layer and each of the shielding pads are electrically connected.
摘要翻译：本发明提供一种半导体封装基板，其包括基板，芯片接触区域，内部焊盘部分，外部焊盘部分和导电层。芯片接触区域，内部焊盘部分，外部焊盘部分和导电层形成在基板的一侧上，其中外部焊盘部分包围围绕基板中心的芯片接触区域的内部焊盘部分。内部焊盘部分和外部焊盘部分分别包含多个信号焊盘和多个屏蔽焊盘，同时导电层和每个屏蔽焊盘电连接。

5. 发明申请

US20060226534A1 Structure and assembly method of integrated circuit package 审中-公开
标题翻译：集成电路封装的结构和组装方法
公开(公告)号：US20060226534A1
公开(公告)日：2006-10-12
申请号：US11378283
申请日：2006-03-20
申请人： Kuei-Chen Liang , Chung-Ju Wu , Chung-Yin Fang
发明人： Kuei-Chen Liang , Chung-Ju Wu , Chung-Yin Fang
IPC分类号： H01L23/04 , H01L21/44
CPC分类号： H01L24/29 , H01L23/3128 , H01L23/50 , H01L23/552 , H01L23/60 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L2223/6611 , H01L2224/05554 , H01L2224/27013 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/4554 , H01L2224/45565 , H01L2224/48091 , H01L2224/48227 , H01L2224/48237 , H01L2224/49175 , H01L2224/73265 , H01L2224/83051 , H01L2224/83192 , H01L2224/8385 , H01L2224/8592 , H01L2224/92 , H01L2224/92247 , H01L2924/00011 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/10161 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/3511 , H01L2924/00012 , H01L2924/00 , H01L2224/43
摘要： A packaging structure and an assembly method are disclosed. A packaging structure includes a substrate, a die, conductive wires, and conductively filled material. The substrate includes a conductive structure, and the conductive wires are insulator-coated. The die is mounted on the substrate, and the conductive wires are connected between the die and the conductive structure. The conductively filled material is formed among the conductive wires. In the assembly method, the die is firstly mounted on the substrate, followed by connecting the conductive wires between the die and the conductive structure, and finally forming the conductively filled material among the conductive wires.
摘要翻译：公开了一种包装结构和装配方法。封装结构包括基片，裸片，导线和导电填充材料。衬底包括导电结构，并且导电线被绝缘体涂覆。芯片安装在基板上，并且导线连接在管芯和导电结构之间。导电填充材料形成在导线之间。在组装方法中，首先将模具安装在基板上，然后将导线连接在管芯和导电结构之间，最后在导线之间形成导电填充材料。

6. 发明授权

US06744128B2 Integrated circuit package capable of improving signal quality 有权
标题翻译：集成电路封装，能够提高信号质量
公开(公告)号：US06744128B2
公开(公告)日：2004-06-01
申请号：US10262958
申请日：2002-10-03
申请人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
发明人： Chung-Ju Wu , Kuei-Chen Liang , Wei-Feng Lin
IPC分类号： H01L2302
CPC分类号： H01L23/49833 , H01L23/642 , H01L2924/0002 , H01L2924/15311 , H01L2924/19105 , H01L2924/00
摘要： An integrated circuit package capable of improving signal quality is disclosed. The integrated circuit package comprises a first substrate, an integrated circuit chip attached on the first surface of the first substrate. This integrated circuit package further comprises a plurality of external terminals mounted on the first substrate and a plurality of first bonding pads mounted on the edge portion of the first surface of the first substrate and respectively connected to the corresponding external terminals. Also, the integrated circuit package further comprises a second substrate and a plurality of second bonding pads mounted on the second surface of the second substrate and connected to the first bonding pads formed on the first substrate. Furthermore, this integrated circuit package further comprises a plurality of passive components disposed on the second substrate.
摘要翻译：公开了能够提高信号质量的集成电路封装。集成电路封装包括第一衬底，附接在第一衬底的第一表面上的集成电路芯片。该集成电路封装还包括安装在第一基板上的多个外部端子和安装在第一基板的第一表面的边缘部分上并分别连接到相应的外部端子的多个第一接合焊盘。此外，集成电路封装还包括第二衬底和安装在第二衬底的第二表面上并连接到形成在第一衬底上的第一焊盘的多个第二焊盘。此外，该集成电路封装还包括设置在第二基板上的多个无源部件。

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