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    • 2. 发明授权
    • Vacuum plasma processor method
    • 真空等离子体处理器方法
    • US06897156B2
    • 2005-05-24
    • US10347363
    • 2003-01-21
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • H05H1/46B01J3/00B01J19/08H01J37/32H01L21/3065H01L21/302
    • H01J37/321
    • 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
    • 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过在腔室的顶部处的电介质窗口向等离子体提供电磁场,从而激发腔室中的可电离气体到等离子体。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。
    • 3. 发明授权
    • Vacuum plasma processor apparatus and method
    • 真空等离子体处理装置及方法
    • US06531029B1
    • 2003-03-11
    • US09607326
    • 2000-06-30
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • H01L213065
    • H01J37/321
    • 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic; fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
    • 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过提供电磁而将腔室中的可电离气体激发到等离子体; 通过室顶部的电介质窗到等离子体的场。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。
    • 4. 发明授权
    • Method for improving uniformity and reducing etch rate variation of etching polysilicon
    • 改善蚀刻多晶硅的均匀性和降低蚀刻速率变化的方法
    • US06514378B1
    • 2003-02-04
    • US09540549
    • 2000-03-31
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. LinWenli Collison
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. LinWenli Collison
    • H05H100
    • H01J37/32642H01L21/32137
    • An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.
    • 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤:(a)将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上,(b)在室中保持真空,(c)通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并且激励蚀刻气体以在腔室中形成等离子体,(d)从腔室移除衬底; 并且(e)通过重复步骤(ad)连续地蚀刻腔室中的附加衬底,蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。
    • 5. 发明授权
    • High temperature tungsten etching process
    • 高温钨蚀刻工艺
    • US06461974B1
    • 2002-10-08
    • US09680320
    • 2000-10-06
    • Tuqiang NiKenji TakeshitaThomas Choi
    • Tuqiang NiKenji TakeshitaThomas Choi
    • H01L21302
    • H01L21/32139C23F4/00H01L21/31116H01L21/32136
    • A method of etching a tungsten film, comprising the steps of supporting a semiconductor substrate having a tungsten film thereon on a substrate support in an interior of a plasma etcher, supplying process gas to the interior of the plasma etcher, energizing the process gas into a plasma state, etching the tungsten film by exposing the substrate to the plasma, and heating the substrate to a temperature of at least 100° C. during the etching step. The etching step can include a low temperature main etch below 100° C. followed by a high temperature overetch above 100° C., the process gas including a fluorine containing gas during the main etch and a chlorine containing gas during the overetch. The tungsten film can be located over a dielectric film which serves as a stop layer during the etching step. The tungsten film can be pure tungsten and the dielectric layer can be a silicon oxide film having a thickness of 200 Å or less.
    • 一种蚀刻钨膜的方法,包括以下步骤:在等离子体蚀刻器内部的衬底支撑件上支撑其上具有钨膜的半导体衬底,将工艺气体供给到等离子体蚀刻器的内部,将工艺气体激励成 等离子体状态,通过将衬底暴露于等离子体来蚀刻钨膜,并且在蚀刻步骤期间将衬底加热至至少100℃的温度。 蚀刻步骤可以包括低于100℃的低温主蚀刻,然后高于100℃的高温过蚀刻,在主蚀刻期间工艺气体包括含氟气体,在过蚀刻期间包括含氯气体。 钨膜可以位于在蚀刻步骤期间用作停止层的电介质膜上。 钨膜可以是纯钨,并且电介质层可以是厚度为或以下的氧化硅膜。