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    • 1. 发明授权
    • Method for improving uniformity and reducing etch rate variation of etching polysilicon
    • 改善蚀刻多晶硅的均匀性和降低蚀刻速率变化的方法
    • US06514378B1
    • 2003-02-04
    • US09540549
    • 2000-03-31
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. LinWenli Collison
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. LinWenli Collison
    • H05H100
    • H01J37/32642H01L21/32137
    • An apparatus and method for consecutively processing a series of semiconductor substrates with minimal plasma etch rate variation following cleaning with fluorine-containing gas and/or seasoning of the plasma etch chamber. The method includes steps of (a) placing a semiconductor substrate on a substrate support in a plasma etching chamber, (b) maintaining a vacuum in the chamber, (c) etching an exposed surface of the substrate by supplying an etching gas to the chamber and energizing the etching gas to form a plasma in the chamber, (d) removing the substrate from the chamber; and (e) consecutively etching additional substrates in the chamber by repeating steps (a-d), the etching step being carried out by minimizing a recombination rate of H and Br on a silicon carbide edge ring surrounding the substrate at a rate sufficient to offset a rate at which Br is consumed across the substrate. The method can be carried out using pure HBr or combination of HBr with other gases.
    • 一种用于在用含氟气体清洁和/或等离子体蚀刻室的调节之后以最小等离子体蚀刻速率变化连续处理一系列半导体衬底的装置和方法。 该方法包括以下步骤:(a)将半导体衬底放置在等离子体蚀刻室中的衬底支撑件上,(b)在室中保持真空,(c)通过向腔室中提供蚀刻气体来蚀刻衬底的暴露表面 并且激励蚀刻气体以在腔室中形成等离子体,(d)从腔室移除衬底; 并且(e)通过重复步骤(ad)连续地蚀刻腔室中的附加衬底,蚀刻步骤通过使围绕衬底的碳化硅边缘环上的H和Br的复合速率以足以抵消速率 其中Br在基底上被消耗。 该方法可以使用纯HBr或HBr与其他气体的组合进行。
    • 2. 发明授权
    • Vacuum plasma processor method
    • 真空等离子体处理器方法
    • US06897156B2
    • 2005-05-24
    • US10347363
    • 2003-01-21
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • H05H1/46B01J3/00B01J19/08H01J37/32H01L21/3065H01L21/302
    • H01J37/321
    • 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
    • 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过在腔室的顶部处的电介质窗口向等离子体提供电磁场,从而激发腔室中的可电离气体到等离子体。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。
    • 3. 发明授权
    • Vacuum plasma processor apparatus and method
    • 真空等离子体处理装置及方法
    • US06531029B1
    • 2003-03-11
    • US09607326
    • 2000-06-30
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • Tuqiang NiKenji TakeshitaTom ChoiFrank Y. Lin
    • H01L213065
    • H01J37/321
    • 200 mm and 300 mm wafers are processed in vacuum plasma processing chambers that are the same or have the same geometry. Substantially planar excitation coils having different geometries for the wafers of different sizes excite ionizable gas in the chamber to a plasma by supplying electromagnetic; fields to the plasma through a dielectric window at the top of the chamber. Both coils include plural symmetrical, substantially circular turns coaxial with a center point of the coil and at least one turn that is asymmetrical with respect to the coil center point. Both coils include four turns, with r.f. excitation being applied to the turn that is closest to the coil center point. The turn that is third farthest from the center point is asymmetric in the coil used for 200 mm wafers. The two turns closest to the coil center point are asymmetric in the coil used for 300 mm wafers.
    • 200mm和300mm晶片在相同或具有相同几何形状的真空等离子体处理室中进行处理。 对于不同尺寸的晶片,具有不同几何形状的基本上平面的激励线圈通过提供电磁而将腔室中的可电离气体激发到等离子体; 通过室顶部的电介质窗到等离子体的场。 两个线圈包括与线圈的中心点同轴的多个对称的基本圆形的匝和至少一个相对于线圈中心点不对称的匝。 两个线圈包括四圈,r.f. 激励被施加到最接近线圈中心点的转弯。 距离中心点第三远的转弯在用于200 mm晶圆的线圈中是不对称的。 在线圈中心点最近的两个转弯在用于300毫米晶圆的线圈中是不对称的。
    • 5. 发明授权
    • Elevated stationary uniformity ring design
    • 高稳定均匀环设计
    • US06257168B1
    • 2001-07-10
    • US09346564
    • 1999-06-30
    • Tuqiang NiWenli Collison
    • Tuqiang NiWenli Collison
    • C23C1600
    • H01J37/32623H01J37/32642Y10S156/915
    • A plasma processing reactor for processing a semiconductor substrate is disclosed. The apparatus includes a chamber. Additionally, the chamber includes a bottom electrode that is configured for holding the substrate. The apparatus further includes a stationary uniformity ring that is configured to surround the periphery of the substrate. Furthermore, the stationary uniformity ring is coupled to a portion of the chamber and disposed above the bottom electrode in a spaced apart relationship to form a vertical space above the bottom electrode. Further, the vertical space is configured to provide room for ingress and egress of the substrate. Also, the stationary uniformity ring has a thickness that substantially reduces diffusion of a first species from outside the stationary uniformity ring toward an edge of the substrate.
    • 公开了一种用于处理半导体衬底的等离子体处理反应器。 该装置包括一个室。 此外,腔室包括被配置为保持衬底的底部电极。 该装置还包括固定均匀环,其被配置为围绕基底的周边。 此外,静止均匀环耦合到室的一部分并以间隔开的关系设置在底部电极上方,以在底部电极上方形成垂直空间。 此外,垂直空间被配置为提供衬底的进入和流出的空间。 此外,固定均匀性环具有基本上减少第一种类从固定均匀环外部朝向衬底边缘的扩散的厚度。
    • 6. 发明授权
    • Processing chamber with optical window cleaned using process gas
    • 使用工艺气体清洁光学窗口的处理室
    • US6052176A
    • 2000-04-18
    • US282519
    • 1999-03-31
    • Tuqiang NiWenli Collison
    • Tuqiang NiWenli Collison
    • H01L21/302G01B11/00G02B7/00H01L21/00H01L21/205H01L21/3065H01L21/31
    • G01N21/15
    • An apparatus is provided including a semiconductor processing chamber enclosed by a plurality of walls. Also included is a source of process gas that is required for processing a wafer within the processing chamber. Mounted on one of the walls of the processing chamber is a window. An inlet is positioned adjacent to the window and remains in communication with the processing chamber. The inlet is further coupled to the source of process gas to channel the process gas into the processing chamber for both preventing the deposition of byproducts on the window and further processing the wafer within the processing chamber. In another embodiment, a source of light, an analysis mechanism, and an optical transmission medium are provided. Such optical transmission medium is coupled between the source of light and the analysis mechanism and is further aligned with the window for directing light into the processing chamber and analyzing the wafer within the processing chamber. The window is configured to reflect the light received from the optical transmission medium at an angle so as to not interfere with light reflected from the wafer within the processing chamber.
    • 提供了包括由多个壁包围的半导体处理室的装置。 还包括处理处理室内的晶片所需的工艺气体源。 安装在处理室的一个壁上的是一个窗口。 入口邻近窗口定位并保持与处理室连通。 入口还进一步耦合到处理气体源,以将工艺气体引导到处理室中,以防止在窗口上沉积副产物,并进一步处理处理室内的晶片。 在另一个实施例中,提供光源,分析机构和光传输介质。 这种光传输介质耦合在光源和分析机构之间,并且进一步与窗口对准以将光引导到处理室中并分析处理室内的晶片。 窗口被配置为以一定角度反射从光传输介质接收的光,以便不干扰处理室内从晶片反射的光。