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1. 发明授权

US07312535B2 Semiconductor device having an anti-oxidizing layer that inhibits corrosion of an interconnect layer 有权
标题翻译：具有抑制互连层腐蚀的抗氧化层的半导体器件
公开(公告)号：US07312535B2
公开(公告)日：2007-12-25
申请号：US10803832
申请日：2004-03-18
申请人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
发明人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
IPC分类号： H01L23/48
CPC分类号： H01L21/76849 , H01L21/76867 , H01L21/76886 , H01L23/3192 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05147 , H01L2224/05166 , H01L2224/05551 , H01L2224/05567 , H01L2224/05624 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01051 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05552 , H01L2924/00014 , H01L2924/013 , H01L2924/01014
摘要： The objects of the present invention is to improve the impact resistance of the semiconductor device against the impact from the top surface direction, to improve the corrosion resistance of the surface of the top layer interconnect, to inhibit the crack occurred in the upper layer of the interconnect layer when the surface of the electrode pad is poked with the probe during the non-defective/defective screening, and to prevent the corrosion of the interconnect layer when the surface of electrode pad is poked with the probe during the non-defective/defective screening. A Ti film 116, a TiN film 115 and a pad metal film 117 are formed in this sequence on the upper surface of a Cu interconnect 112. The thermal annealing process is conducted within an inert gas atmosphere to form a Ti—Cu layer 113, and thereafter a polyimide film 118 is formed, and then a cover through hole is provided thereon to expose the surface of the pad metal film 117, and finally a solder ball 120 is joined thereto.
摘要翻译：本发明的目的是提高半导体器件的抗冲击性，以抵抗顶表面方向的冲击，提高顶层互连表面的耐腐蚀性，从而抑制上层发生的裂纹当在无缺陷/缺陷筛选期间当电极垫的表面被探针戳住时，并且当在无缺陷/缺陷期间电极垫的表面被探针戳戳时，防止互连层的腐蚀筛选在Cu互连112的上表面上依次形成Ti膜116，TiN膜115和垫金属膜117.热退火工艺在惰性气体气氛中进行以形成Ti-Cu层113，然后形成聚酰亚胺膜118，然后在其上设置盖通孔以露出垫金属膜117的表面，最后将焊球120接合到其上。

2. 发明申请

US20050067700A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050067700A1
公开(公告)日：2005-03-31
申请号：US10953454
申请日：2004-09-30
申请人： Toshiyuki Takewaki , Noriaki Oda
发明人： Toshiyuki Takewaki , Noriaki Oda
IPC分类号： H01L21/60 , H01L23/485 , H01L21/44 , H01L23/52
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/0401 , H01L2224/05017 , H01L2224/05018 , H01L2224/05093 , H01L2224/05096 , H01L2224/05556 , H01L2224/05557 , H01L2224/05558 , H01L2224/05571 , H01L2224/05647 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , Y10S438/927 , H01L2924/00014 , H01L2224/05552
摘要： There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening above Cu pad areas, is formed, and a barrier metal film is formed in the opening of the SiON film. Such constitution provides the structure, in which the upper portion of the interfaces between the Cu pad areas and the insulating areas are covered by the SiON film.
摘要翻译：提供了一种解决了在焊盘部分中粘附不良的问题，同时抑制焊盘部分的凹陷。形成覆盖绝缘区域并且具有Cu焊盘区域上方的开口的SiON膜，并且在SiON膜的开口中形成阻挡金属膜。这种结构提供了其中Cu焊盘区域和绝缘区域之间的界面的上部被SiON膜覆盖的结构。

3. 发明授权

US07846830B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07846830B2
公开(公告)日：2010-12-07
申请号：US11974389
申请日：2007-10-12
申请人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
发明人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , H01L21/76867 , H01L21/76886 , H01L23/3192 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05147 , H01L2224/05166 , H01L2224/05551 , H01L2224/05567 , H01L2224/05624 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01051 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05552 , H01L2924/00014 , H01L2924/013 , H01L2924/01014
摘要： The objects of the present invention is to improve the impact resistance of the semiconductor device against the impact from the top surface direction, to improve the corrosion resistance of the surface of the top layer interconnect, to inhibit the crack occurred in the upper layer of the interconnect layer when the surface of the electrode pad is poked with the probe during the non-defective/defective screening, and to prevent the corrosion of the interconnect layer when the surface of electrode pad is poked with the probe during the non-defective/defective screening. A Ti film 116, a TiN film 115 and a pad metal film 117 are formed in this sequence on the upper surface of a Cu interconnect 112. The thermal annealing process is conducted within an inert gas atmosphere to form a Ti—Cu layer 113, and thereafter a polyimide film 118 is formed, and then a cover through hole is provided thereon to expose the surface of the pad metal film 117, and finally a solder ball 120 is joined thereto.
摘要翻译：本发明的目的是提高半导体器件的抗冲击性，以抵抗顶表面方向的冲击，提高顶层互连表面的耐腐蚀性，从而抑制上层发生的裂纹当在无缺陷/缺陷筛选期间当电极垫的表面被探针戳住时，并且当在无缺陷/缺陷期间电极垫的表面被探针戳戳时，防止互连层的腐蚀筛选在Cu互连112的上表面上依次形成Ti膜116，TiN膜115和垫金属膜117.热退火工艺在惰性气体气氛中进行以形成Ti-Cu层113，然后形成聚酰亚胺膜118，然后在其上设置盖通孔以露出垫金属膜117的表面，最后将焊球120接合到其上。

4. 发明授权

US07692265B2 Fuse and seal ring 有权
标题翻译：保险丝和密封圈
公开(公告)号：US07692265B2
公开(公告)日：2010-04-06
申请号：US11094151
申请日：2005-03-31
申请人： Toshiyuki Takewaki , Noriaki Oda
发明人： Toshiyuki Takewaki , Noriaki Oda
IPC分类号： H01L29/00
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： There is provided a semiconductor device excellent in reliability. The semiconductor device is comprised of a semiconductor substrate, an insulating portion having a multilayer insulating film composed of an etch stopper film, an insulating film, an etch stopper film, an insulating film, an etch stopper film and an insulating film provided on an upper portion of the semiconductor, fuses provided on the insulating portion, and a seal ring composed of a copper containing metal film, a barrier metal film, a copper containing metal film and a barrier metal film embedded in the insulating portion so as to surround a region just below the fuses.
摘要翻译：提供了可靠性优异的半导体器件。半导体器件由半导体衬底，具有由蚀刻停止膜，绝缘膜，蚀刻停止膜，绝缘膜，蚀刻停止膜和设置在上部的绝缘膜构成的多层绝缘膜的绝缘部分半导体部分，设置在绝缘部分上的保险丝，以及由包含铜的金属膜，阻挡金属膜，含铜金属膜和嵌入绝缘部分中的阻挡金属膜构成的密封环，以围绕区域就在保险丝下面。

5. 发明申请

US20050218477A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050218477A1
公开(公告)日：2005-10-06
申请号：US11094151
申请日：2005-03-31
申请人： Toshiyuki Takewaki , Noriaki Oda
发明人： Toshiyuki Takewaki , Noriaki Oda
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L21/82 , H01L23/525 , H01L29/00
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： There is provided a semiconductor device excellent in reliability. The semiconductor device is comprised of a semiconductor substrate, an insulating portion having a multilayer insulating film composed of an etch stopper film, an insulating film, an etch stopper film, an insulating film, an etch stopper film and an insulating film provided on an upper portion of the semiconductor, fuses provided on the insulating portion, and a seal ring composed of a copper containing metal film, a barrier metal film, a copper containing metal film and a barrier metal film embedded in the insulating portion so as to surround a region just below the fuses.
摘要翻译：提供了可靠性优异的半导体器件。半导体器件由半导体衬底，具有由蚀刻停止膜，绝缘膜，蚀刻停止膜，绝缘膜，蚀刻停止膜和设置在上部的绝缘膜构成的多层绝缘膜的绝缘部分半导体部分，设置在绝缘部分上的保险丝，以及由包含铜的金属膜，阻挡金属膜，含铜金属膜和嵌入绝缘部分中的阻挡金属膜构成的密封环，以围绕区域就在保险丝下面。

6. 发明授权

US07508082B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07508082B2
公开(公告)日：2009-03-24
申请号：US11844381
申请日：2007-08-24
申请人： Toshiyuki Takewaki , Noriaki Oda
发明人： Toshiyuki Takewaki , Noriaki Oda
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/0401 , H01L2224/05017 , H01L2224/05018 , H01L2224/05093 , H01L2224/05096 , H01L2224/05556 , H01L2224/05557 , H01L2224/05558 , H01L2224/05571 , H01L2224/05647 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , Y10S438/927 , H01L2924/00014 , H01L2224/05552
摘要： There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening above Cu pad areas, is formed, and a barrier metal film is formed in the opening of the SiON film. Such constitution provides the structure, in which the upper portion of the interfaces between the Cu pad areas and the insulating areas are covered by the SiON film.
摘要翻译：提供了一种解决了在焊盘部分中粘附不良的问题，同时抑制焊盘部分的凹陷。形成覆盖绝缘区域并且具有Cu焊盘区域上方的开口的SiON膜，并且在SiON膜的开口中形成阻挡金属膜。这种结构提供了其中Cu焊盘区域和绝缘区域之间的界面的上部被SiON膜覆盖的结构。

7. 发明申请

US20080044997A1 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20080044997A1
公开(公告)日：2008-02-21
申请号：US11974389
申请日：2007-10-12
申请人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
发明人： Toshiyuki Takewaki , Noriaki Oda , Yorinobu Kunimune
IPC分类号： H01L21/44
CPC分类号： H01L21/76849 , H01L21/76867 , H01L21/76886 , H01L23/3192 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05147 , H01L2224/05166 , H01L2224/05551 , H01L2224/05567 , H01L2224/05624 , H01L2224/13007 , H01L2224/13022 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01018 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01046 , H01L2924/01051 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2224/05552 , H01L2924/00014 , H01L2924/013 , H01L2924/01014
摘要： The objects of the present invention is to improve the impact resistance of the semiconductor device against the impact from the top surface direction, to improve the corrosion resistance of the surface of the top layer interconnect, to inhibit the crack occurred in the upper layer of the interconnect layer when the surface of the electrode pad is poked with the probe during the non-defective/defective screening, and to prevent the corrosion of the interconnect layer when the surface of electrode pad is poked with the probe during the non-defective/defective screening. A Ti film 116, a TiN film 115 and a pad metal film 117 are formed in this sequence on the upper surface of a Cu interconnect 112. The thermal annealing process is conducted within an inert gas atmosphere to form a Ti—Cu layer 113, and thereafter a polyimide film 118 is formed, and then a cover through hole is provided thereon to expose the surface of the pad metal film 117, and finally a solder ball 120 is joined thereto.
摘要翻译：本发明的目的是提高半导体器件的抗冲击性，以抵抗顶表面方向的冲击，提高顶层互连表面的耐腐蚀性，从而抑制上层发生的裂纹当在无缺陷/缺陷筛选期间当电极垫的表面被探针戳住时，并且当在无缺陷/缺陷期间电极垫的表面被探针戳戳时，防止互连层的腐蚀筛选在Cu互连112的上表面上依次形成Ti膜116，TiN膜115和垫金属膜117.热退火工艺在惰性气体气氛中进行以形成Ti-Cu层113，然后形成聚酰亚胺膜118，然后在其上设置盖通孔以露出垫金属膜117的表面，最后将焊球120接合到其上。

8. 发明授权

US07327031B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07327031B2
公开(公告)日：2008-02-05
申请号：US10953454
申请日：2004-09-30
申请人： Toshiyuki Takewaki , Noriaki Oda
发明人： Toshiyuki Takewaki , Noriaki Oda
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/05 , H01L24/03 , H01L2224/0401 , H01L2224/05017 , H01L2224/05018 , H01L2224/05093 , H01L2224/05096 , H01L2224/05556 , H01L2224/05557 , H01L2224/05558 , H01L2224/05571 , H01L2224/05647 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , Y10S438/927 , H01L2924/00014 , H01L2224/05552
摘要： There is provided a solution to the problem of the poor adhesion in the pad portion while inhibiting the dishing in the pad portion. An SiON film, which covers insulating areas and has an opening above Cu pad areas, is formed, and a barrier metal film is formed in the opening of the SiON film. Such constitution provides the structure, in which the upper portion of the interfaces between the Cu pad areas and the insulating areas are covered by the SiON film.
摘要翻译：提供了一种解决了在焊盘部分中粘附不良的问题，同时抑制焊盘部分的凹陷。形成覆盖绝缘区域并且具有Cu焊盘区域上方的开口的SiON膜，并且在SiON膜的开口中形成阻挡金属膜。这种结构提供了其中Cu焊盘区域和绝缘区域之间的界面的上部被SiON膜覆盖的结构。

9. 发明申请

US20110049719A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110049719A1
公开(公告)日：2011-03-03
申请号：US12837069
申请日：2010-07-15
申请人： Noriaki Oda , Shinichi Chikaki
发明人： Noriaki Oda , Shinichi Chikaki
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/53295 , H01L21/76808 , H01L21/7682 , H01L21/76825 , H01L21/76828 , H01L21/76835 , H01L23/53238 , H01L23/5329 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： The semiconductor device includes a first interconnect layer insulating film, first copper interconnects that are embedded in the first interconnect layer insulating film, and an interlayer insulating film that is formed on the first copper interconnects and the first interconnect layer insulating film. The semiconductor device includes a second interconnect layer insulating film that is formed on the interlayer insulating film and second copper interconnects that are embedded in the second interconnect layer insulating film. The first and second interconnect layer insulating films include first and second low dielectric constant films, respectively. The interlayer insulating film has higher mechanical strength than the first and second interconnect layer insulating films.
摘要翻译：半导体器件包括第一互连层绝缘膜，嵌入在第一互连层绝缘膜中的第一铜互连以及形成在第一铜互连和第一互连层绝缘膜上的层间绝缘膜。半导体器件包括形成在层间绝缘膜上的第二互连层绝缘膜和嵌入第二互连层绝缘膜中的第二铜互连。第一和第二互连层绝缘膜分别包括第一和第二低介电常数膜。层间绝缘膜具有比第一和第二互连层绝缘膜更高的机械强度。

10. 发明申请

US20100314777A1 Semiconductor device and method for manufacturing same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20100314777A1
公开(公告)日：2010-12-16
申请号：US12662772
申请日：2010-05-03
申请人： Noriaki Oda
发明人： Noriaki Oda
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L23/5226 , H01L21/76804 , H01L21/76808 , H01L21/76831 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor substrate; an interlayer insulating film provided on the semiconductor substrate; an interconnect (second interconnect trench) composed of a metallic film provided in an interconnect trench (second copper interconnect) and a plug composed of a metallic film provided in a connection hole (via hole) coupled to the second interconnect trench, both of which are provided in the interlayer insulating film; a first sidewall provided on a side surface of the via hole; and a second sidewall provided on a side surface of the second interconnect trench, and a thickness of the first sidewall in vicinity of a bottom of the side surface of the via hole is larger than a thickness of the second sidewall in vicinity of a bottom of the second interconnect trench.
摘要翻译：半导体器件包括：半导体衬底; 设置在所述半导体基板上的层间绝缘膜; 由设置在互连沟槽（第二铜互连）中的金属膜构成的互连（第二互连沟槽）和由设置在耦合到第二互连沟槽的连接孔（通孔）中的金属膜构成的插塞，两者均为设置在层间绝缘膜中; 设置在所述通孔的侧面上的第一侧壁; 以及设置在所述第二互连沟槽的侧表面上的第二侧壁，并且所述通孔的所述侧表面的底部附近的所述第一侧壁的厚度大于所述第二侧壁附近的所述第二侧壁的厚度，第二互连沟槽。

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