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1. 发明授权

US06511620B1 Method of producing semiconductor devices having easy separability from a metal mold after molding 失效
标题翻译：在成型后具有与金属模具容易分离的半导体器件的制造方法
公开(公告)号：US06511620B1
公开(公告)日：2003-01-28
申请号：US09511496
申请日：2000-02-23
申请人： Toshimi Kawahara , Hirohisa Matsuki , Yasuhiro Shinma , Yoshiyuki Yoneda , Norio Fukasawa , Yuzo Hamanaka , Kenichi Nagashige , Takashi Hozumi
发明人： Toshimi Kawahara , Hirohisa Matsuki , Yasuhiro Shinma , Yoshiyuki Yoneda , Norio Fukasawa , Yuzo Hamanaka , Kenichi Nagashige , Takashi Hozumi
IPC分类号： B29C3318
CPC分类号： B29C33/0055 , B29C33/68 , B29C43/18 , B29C43/36 , B29C43/3642 , B29C43/56 , H01L21/566 , H01L2924/0002 , H01L2924/00
摘要： A method of producing semiconductor devices which have an excellent separability from a metal mold after resin encapsulation and thus eliminates the need to clean the metal mold. A metal mold for producing such semiconductor devices is also provided. According to the method of the present invention, the metal mold is first opened, and two separation sheets are disposed on dividing surfaces including cavity forming surfaces of a first metal mold and a second metal mold. A substrate is then placed on one of the separation sheets, with its semiconductor chip formed surface facing the second metal mold. An encapsulation resin is provided on the substrate placed on one of the separation sheets. The metal mold in a heated state is closed and pressed to form a resin layer for encapsulating electrodes formed on the substrate. The metal mold is again opened, and the resin-encapsulated substrate is taken out of the metal mold. After the separation sheets are removed, the substrate is divided into individual semiconductor devices.
摘要翻译：一种制造半导体器件的方法，其在树脂封装之后与金属模具具有优异的可分离性，因此不需要清洁金属模具。还提供了用于制造这种半导体器件的金属模具。根据本发明的方法，首先打开金属模具，并且在包括第一金属模具和第二金属模具的空腔形成表面的分割表面上设置两个分离片。然后将基板放置在一个分离片上，其半导体芯片形成表面面向第二金属模具。在放置在一个分离片上的基板上设置封装树脂。将处于加热状态的金属模封闭并压制以形成用于封装形成在基板上的电极的树脂层。再次打开金属模具，将树脂封装的基板从金属模具中取出。在分离片被去除之后，将衬底分成单独的半导体器件。

2. 发明授权

US06469370B1 Semiconductor device and method of production of the semiconductor device 失效
标题翻译：半导体装置及半导体装置的制造方法
公开(公告)号：US06469370B1
公开(公告)日：2002-10-22
申请号：US09495332
申请日：2000-02-01
申请人： Toshimi Kawahara , Hirohisa Matsuki , Yasuhiro Shinma , Yoshiyuki Yoneda , Norio Fukasawa , Yuzo Hamanaka , Kenichi Nagashige , Takashi Hozumi
发明人： Toshimi Kawahara , Hirohisa Matsuki , Yasuhiro Shinma , Yoshiyuki Yoneda , Norio Fukasawa , Yuzo Hamanaka , Kenichi Nagashige , Takashi Hozumi
IPC分类号： H01L2348
CPC分类号： H01L24/10 , H01L23/3114 , H01L24/02 , H01L24/06 , H01L24/13 , H01L24/48 , H01L25/0657 , H01L2224/02375 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/13 , H01L2224/13099 , H01L2224/16145 , H01L2224/274 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48465 , H01L2224/731 , H01L2224/73265 , H01L2224/85399 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06572 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： In a semiconductor device of the present invention and a production method thereof, an electronic circuit is provided in a semiconductor substrate, the electronic circuit having terminals. An internal wiring pattern is provided in the substrate, the internal wiring pattern being connected to the electronic circuit terminals. A protective layer is provided on the substrate, the protective layer covering the substrate. Vias are provided on the substrate so as to project from the protective layer, the vias being connected to the internal wiring pattern at arbitrary positions on the substrate. An external wiring pattern is provided on the protective layer, the external wiring pattern being connected to the vias. Projection electrodes are connected to the external wiring pattern, the projection electrodes having a predetermined height above the external wiring pattern. An enclosure layer of a resin material is provided on the protective layer, the enclosure layer covering sides of the projection electrodes and external surfaces of the external wiring pattern.
摘要翻译：在本发明的半导体器件及其制造方法中，电子电路设置在半导体衬底中，该电子电路具有端子。内部布线图案设置在基板中，内部布线图案连接到电子电路端子。保护层设置在基板上，保护层覆盖基板。在基板上设置通孔，从保护层突出，通孔在基板的任意位置连接到内部布线图案。外部布线图案设置在保护层上，外部布线图形与通孔相连。投射电极连接到外部布线图案，突起电极在外部布线图案上方具有预定的高度。树脂材料的外壳层设置在保护层上，外壳层覆盖突起电极的侧面和外部布线图案的外表面。

3. 发明授权

US06881611B1 Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device 有权
标题翻译：用于制造半导体器件的方法和模具，半导体器件和用于安装器件的方法
公开(公告)号：US06881611B1
公开(公告)日：2005-04-19
申请号：US09635124
申请日：2000-08-08
申请人： Norio Fukasawa , Toshimi Kawahara , Muneharu Morioka , Mitsunada Osawa , Yasuhiro Shinma , Hirohisa Matsuki , Masanori Onodera , Junichi Kasai , Shigeyuki Maruyama , Masao Sakuma , Yoshimi Suzuki , Masashi Takenaka
发明人： Norio Fukasawa , Toshimi Kawahara , Muneharu Morioka , Mitsunada Osawa , Yasuhiro Shinma , Hirohisa Matsuki , Masanori Onodera , Junichi Kasai , Shigeyuki Maruyama , Masao Sakuma , Yoshimi Suzuki , Masashi Takenaka
IPC分类号： B29C43/18 , H01L21/301 , H01L21/56 , H01L21/68 , H01L23/24 , H01L23/31 , H01L23/495 , H01L23/498 , H01L25/065 , H01L25/10 , H01L29/06 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/568 , B29C43/18 , B29C2043/3444 , B29C2043/3628 , H01L21/56 , H01L21/561 , H01L21/563 , H01L21/566 , H01L23/24 , H01L23/3107 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49572 , H01L23/4985 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L29/0657 , H01L2221/68377 , H01L2224/02371 , H01L2224/04105 , H01L2224/13022 , H01L2224/13024 , H01L2224/16225 , H01L2224/16235 , H01L2224/274 , H01L2224/29111 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/83101 , H01L2224/83191 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2225/06517 , H01L2225/0652 , H01L2225/06527 , H01L2225/06541 , H01L2225/06551 , H01L2225/06572 , H01L2225/06579 , H01L2225/06582 , H01L2225/06586 , H01L2225/06589 , H01L2225/1005 , H01L2225/1064 , H01L2225/107 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0134 , H01L2924/15174 , H01L2924/15184 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/16195 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3011 , H01L2924/3511 , H01L2924/00 , H01L2924/01028 , H01L2924/01051 , H01L2924/3512 , H01L2224/05599 , H01L2924/00012
摘要： A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
摘要翻译：一种方法包括：树脂密封步骤，在模具20的空腔28中，将布置有凸块12的半导体元件11的基板16设置在树脂密封步骤中，将树脂35供应到凸块12的位置，使得形成密封凸块12的树脂层13，使由树脂层13密封的凸块12的至少端部露出使突出部12的端部从树脂层13露出的突出电极曝光工序，以及分离工序与树脂层13一起切割基板16，使得半导体元件11彼此分离。

4. 发明授权

US06437432B1 Semiconductor device having improved electrical characteristics and method of producing the same 有权
公开(公告)号：US06437432B1
公开(公告)日：2002-08-20
申请号：US09745742
申请日：2000-12-26
申请人： Masamitsu Ikumo , Toshimi Kawahara , Norio Fukasawa , Kenichi Nagashige
发明人： Masamitsu Ikumo , Toshimi Kawahara , Norio Fukasawa , Kenichi Nagashige
IPC分类号： H01L2352
摘要： A semiconductor device is provided, which device includes a semiconductor substrate including a plurality of signal pads and ground pads, an insulating film formed on the semiconductor substrate, a conductive metal film formed on the insulating film and electrically connected to the ground pads and a plurality of first interconnection lines electrically connected to the signal pads and insulated from the conductive metal film. The conductive metal film is formed over a region including the first interconnection lines in a plan view of the semiconductor device.

5. 发明授权

US06472744B2 Semiconductor module including a plurality of semiconductor devices detachably 失效
标题翻译：半导体模块可拆卸地包括多个半导体器件
公开(公告)号：US06472744B2
公开(公告)日：2002-10-29
申请号：US09084097
申请日：1998-05-26
申请人： Mitsutaka Sato , Tetsuya Fujisawa , Shigeyuki Maruyama , Junichi Kasai , Toshimi Kawahara , Toshio Hamano , Yoshihiro Kubota , Mitsunada Osawa , Yoshiyuki Yoneda , Kazuto Tsuji , Hirohisa Matsuki
发明人： Mitsutaka Sato , Tetsuya Fujisawa , Shigeyuki Maruyama , Junichi Kasai , Toshimi Kawahara , Toshio Hamano , Yoshihiro Kubota , Mitsunada Osawa , Yoshiyuki Yoneda , Kazuto Tsuji , Hirohisa Matsuki
IPC分类号： H01L2500
CPC分类号： H01L25/105 , H01L2224/48227 , H01L2225/1023 , H01L2924/09701 , H01L2924/1533 , H01L2924/3025 , H01R12/82 , H05K7/1431 , H01L2924/00
摘要： A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
摘要翻译：半导体模块包括多个半导体器件，每个半导体器件包括承载有单个存储器半导体芯片的电路衬底和用于可分离地保持半导体器件的插座。

6. 发明授权

US06696754B2 Semiconductor module including a plurality of semiconductor devices detachably 失效
标题翻译：半导体模块可拆卸地包括多个半导体器件
公开(公告)号：US06696754B2
公开(公告)日：2004-02-24
申请号：US10214306
申请日：2002-08-08
申请人： Mitsutaka Sato , Tetsuya Fujisawa , Shigeyuki Maruyama , Junichi Kasai , Toshimi Kawahara , Toshio Hamano , Yoshihiro Kubota , Mitsunada Osawa , Yoshiyuki Yoneda , Kazuto Tsuji , Hirohisa Matsuki
发明人： Mitsutaka Sato , Tetsuya Fujisawa , Shigeyuki Maruyama , Junichi Kasai , Toshimi Kawahara , Toshio Hamano , Yoshihiro Kubota , Mitsunada Osawa , Yoshiyuki Yoneda , Kazuto Tsuji , Hirohisa Matsuki
IPC分类号： H01L2334
CPC分类号： H01L25/105 , H01L2224/48227 , H01L2225/1023 , H01L2924/09701 , H01L2924/1533 , H01L2924/3025 , H01R12/82 , H05K7/1431 , H01L2924/00
摘要： A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
摘要翻译：半导体模块包括多个半导体器件，每个半导体器件包括承载有单个存储器半导体芯片的电路衬底和用于可拆卸地保持半导体器件的插座。

7. 发明授权

US06507092B1 Semiconductor device having increased reliability and method of producing the same and semiconductor chip suitable for such a semiconductor device and method of producing the same 失效
标题翻译：具有提高的可靠性的半导体器件及其制造方法以及适用于这种半导体器件的半导体芯片及其制造方法
公开(公告)号：US06507092B1
公开(公告)日：2003-01-14
申请号：US09714648
申请日：2000-11-17
申请人： Norio Fukasawa , Takashi Hozumi , Toshimi Kawahara
发明人： Norio Fukasawa , Takashi Hozumi , Toshimi Kawahara
IPC分类号： H01L23544
CPC分类号： H01L23/3114 , H01L21/56 , H01L29/0657 , H01L2224/05567 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/10157 , H01L2924/15311 , H01L2224/05599
摘要： A semiconductor device is provided, which device includes a semiconductor chip including external terminals formed on a surface thereof and a sealing resin formed on the surface of the semiconductor chip. A contaminant film formed on the surface of said semiconductor chip has a laser-processed edge so that a peripheral portion of the surface of said semiconductor chip is bonded to the sealing resin.
摘要翻译：提供了一种半导体器件，该器件包括其表面上形成有外部端子的半导体芯片和形成在半导体芯片的表面上的密封树脂。形成在所述半导体芯片的表面上的污染膜具有激光加工边缘，使得所述半导体芯片的表面的周边部分结合到密封树脂。

8. 发明授权

US06329711B1 Semiconductor device and mounting structure 有权
标题翻译：半导体器件和安装结构
公开(公告)号：US06329711B1
公开(公告)日：2001-12-11
申请号：US09200846
申请日：1998-11-30
申请人： Toshimi Kawahara , Mamoru Suwa , Masanori Onodera , Syuichi Monma , Shinya Nakaseko , Takashi Hozumi , Yoshiyuki Yoneda , Ryuji Nomoto
发明人： Toshimi Kawahara , Mamoru Suwa , Masanori Onodera , Syuichi Monma , Shinya Nakaseko , Takashi Hozumi , Yoshiyuki Yoneda , Ryuji Nomoto
IPC分类号： H01L2304
CPC分类号： H01L21/4832 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6833 , H01L23/3107 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/85 , H01L24/97 , H01L25/105 , H01L29/0657 , H01L2224/05554 , H01L2224/05639 , H01L2224/05644 , H01L2224/05664 , H01L2224/1134 , H01L2224/13099 , H01L2224/16 , H01L2224/29111 , H01L2224/32057 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/4848 , H01L2224/48599 , H01L2224/49171 , H01L2224/49175 , H01L2224/73253 , H01L2224/73265 , H01L2224/78301 , H01L2224/7865 , H01L2224/83385 , H01L2224/85001 , H01L2224/85051 , H01L2224/85181 , H01L2224/85205 , H01L2224/85439 , H01L2224/85444 , H01L2224/85664 , H01L2224/92247 , H01L2224/97 , H01L2225/1035 , H01L2225/107 , H01L2225/1094 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/10158 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/3011 , H05K3/303 , H05K3/305 , H05K3/3436 , H05K3/3442 , H05K2201/09045 , H05K2201/10727 , H05K2201/10977 , Y02P70/613 , H01L2924/00014 , H01L2924/00 , H01L2924/01082 , H01L2924/00012
摘要： A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding from a mounting surface of the resin package, metallic film parts provided to the resin projections, connecting members electrically connecting electrode pads on the semiconductor element and the metallic film parts, and connection pads extending from the metallic film parts, the connecting members being connected to the connection pads.
摘要翻译：半导体器件包括半导体元件，密封半导体元件的树脂封装，从树脂封装的安装表面突出的树脂突起，设置在树脂突起上的金属膜部分，将半导体元件上的电极焊盘电连接到金属薄膜部分和从金属薄膜部分延伸的连接焊盘，连接部件连接到连接焊盘。

9. 发明授权

US06774650B2 Probe card and method of testing wafer having a plurality of semiconductor devices 有权
标题翻译：探针卡和测试具有多个半导体器件的晶片的方法
公开(公告)号：US06774650B2
公开(公告)日：2004-08-10
申请号：US10392925
申请日：2003-03-21
申请人： Shigeyuki Maruyama , Daisuke Koizumi , Naoyuki Watanabe , Yoshito Konno , Eiji Yoshida , Toshiyuki Honda , Toshimi Kawahara , Kenichi Nagashige
发明人： Shigeyuki Maruyama , Daisuke Koizumi , Naoyuki Watanabe , Yoshito Konno , Eiji Yoshida , Toshiyuki Honda , Toshimi Kawahara , Kenichi Nagashige
IPC分类号： G01R3102
CPC分类号： G01R31/2886 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05568 , H01L2224/05569 , H01L2224/05573 , H01L2224/11 , H05K3/326
摘要： A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board. Displacements of the internal terminal resulting from the temperature load applied during testing of the wafer are compensated by the level transitioning portion of the first wiring. Unevenness involved with the contact between the contact electrodes on the probe card and the electrodes on the chips are compensated by the contact electrodes and/or elastic material. An electrode pitch of the contact electrodes is expanded by the first wiring.
摘要翻译：一种用于测试形成多个半导体芯片的晶片的探针卡，所述探针卡包括基板和多层基板。探针卡还可以包括柔性基底。在其中一个芯片上与电极相对设置的接触电极设置在柔性基板的上方或下方，或者可以设置在多层基板上的弹性材料上。第一布线具有连接到接触电极的第一部分，从第一部分的电平延伸到较低电平的多层基板的电平转换部分，以及连接到电平转换部分的端部处的连接端子多层基板上的内部端子。多层基板中的第二布线将内部端子连接到多层基板的外围的外部端子。电路板上的第三个接线将多层基板上的外部端子连接到电路板上的外部连接端子。在晶片测试期间施加的温度负载导致的内部端子的位移由第一布线的电平转换部分补偿。与探针卡上的接触电极和芯片上的电极之间的接触相关的不均匀性由接触电极和/或弹性材料补偿。接触电极的电极间距由第一布线扩大。

10. 发明授权

US06563330B1 Probe card and method of testing wafer having a plurality of semiconductor devices 有权
标题翻译：探针卡和测试具有多个半导体器件的晶片的方法
公开(公告)号：US06563330B1
公开(公告)日：2003-05-13
申请号：US09540870
申请日：2000-03-31
申请人： Shigeyuki Maruyama , Daisuke Koizumi , Naoyuki Watanabe , Yoshito Konno , Eiji Yoshida , Toshiyuki Honda , Toshimi Kawahara , Kenichi Nagashige
发明人： Shigeyuki Maruyama , Daisuke Koizumi , Naoyuki Watanabe , Yoshito Konno , Eiji Yoshida , Toshiyuki Honda , Toshimi Kawahara , Kenichi Nagashige
IPC分类号： G01R3102
CPC分类号： G01R31/2886 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05568 , H01L2224/05569 , H01L2224/05573 , H01L2224/11 , H05K3/326
摘要： A probe card for testing a wafer having formed a plurality of semiconductor chips, the probe card including a board and a multi-layer substrate. The probe card may also include a flexible substrate. A contact electrode, located opposite from an electrode on one of the chips, is disposed above or below the flexible substrate, or may be provided on an elastic material on the multi-layered substrate. A first wiring has a first portion connected to the contact electrode, a level transitioning portion extending from a level of the first portion to the multi-layer substrate at a lower level, and a connecting terminal at an end of the level transitioning portion connected to an internal terminal on the multi-layered substrate. A second wiring in the multi-layered substrate connects the internal terminal to an external terminal at a periphery of the multi-layer substrate. A third wiring on the board connects the external terminal on the multi-layer substrate to an external connecting terminal on the board. Displacements of the internal terminal resulting from the temperature load applied during testing of the wafer are compensated by the level transitioning portion of the first wiring. Unevenness involved with the contact between the contact electrodes on the probe card and the electrodes on the chips are compensated by the contact electrodes and/or elastic material according to the present invention. An electrode pitch of the contact electrodes is expanded by the first wiring.
摘要翻译：一种用于测试形成多个半导体芯片的晶片的探针卡，所述探针卡包括基板和多层基板。探针卡还可以包括柔性基底。在其中一个芯片上与电极相对设置的接触电极设置在柔性基板的上方或下方，或者可以设置在多层基板上的弹性材料上。第一布线具有连接到接触电极的第一部分，从第一部分的电平延伸到较低电平的多层基板的电平转换部分，以及连接到电平转换部分的端部处的连接端子多层基板上的内部端子。多层基板中的第二布线将内部端子连接到多层基板的外围的外部端子。电路板上的第三个接线将多层基板上的外部端子连接到电路板上的外部连接端子。在晶片测试期间施加的温度负载导致的内部端子的位移由第一布线的电平转换部分补偿。涉及探针卡上的接触电极和芯片上的电极之间的接触的不均匀性由根据本发明的接触电极和/或弹性材料补偿。接触电极的电极间距由第一布线扩大。

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