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1. 发明申请

US20130015158A1 DRY ETCHING METHOD 有权
标题翻译：干蚀刻方法
公开(公告)号：US20130015158A1
公开(公告)日：2013-01-17
申请号：US13210446
申请日：2011-08-16
申请人： Tomoyoshi Ichimaru , Kenichi Kuwabara , Go Saito
发明人： Tomoyoshi Ichimaru , Kenichi Kuwabara , Go Saito
IPC分类号： C23F1/02
CPC分类号： H01L21/28079 , H01J37/32192 , H01L21/31116 , H01L21/32137 , H01L29/66545
摘要： The present invention provides a dry etching method capable of readily providing rounded top edge portions, called top rounds, at trenches and vias formed by removal of a dummy material. The method of the present invention is a dry etching method for forming trenches or vias by removing a dummy material with its periphery surrounded by an interlayer oxide film, which method includes the steps of etching the dummy material to a predetermined depth, performing isotropic etching after the dummy material etching, and removing remaining part of the dummy material after the isotropic etching.
摘要翻译：本发明提供了一种干式蚀刻方法，其能够容易地提供在通过去除虚拟材料形成的沟槽和通孔处的称为顶部圆形的圆形顶部边缘部分。本发明的方法是通过去除其周围被层间氧化膜包围的虚拟材料形成沟槽或通孔的干蚀刻方法，该方法包括以下步骤：将虚拟材料蚀刻至预定深度，执行各向同性蚀刻虚拟材料蚀刻，并且在各向同性蚀刻之后除去虚拟材料的剩余部分。

2. 发明授权

US08580689B2 Plasma processing method 有权
标题翻译：等离子体处理方法
公开(公告)号：US08580689B2
公开(公告)日：2013-11-12
申请号：US13210446
申请日：2011-08-16
申请人： Tomoyoshi Ichimaru , Kenichi Kuwabara , Go Saito
发明人： Tomoyoshi Ichimaru , Kenichi Kuwabara , Go Saito
IPC分类号： H01L21/302
CPC分类号： H01L21/28079 , H01J37/32192 , H01L21/31116 , H01L21/32137 , H01L29/66545
摘要： The present invention provides a dry etching method capable of readily providing rounded top edge portions, called top rounds, at trenches and vias formed by removal of a dummy material. The method of the present invention is a dry etching method for forming trenches or vias by removing a dummy material with its periphery surrounded by an interlayer oxide film, which method includes the steps of etching the dummy material to a predetermined depth, performing isotropic etching after the dummy material etching, and removing remaining part of the dummy material after the isotropic etching.
摘要翻译：本发明提供了一种干式蚀刻方法，其能够容易地提供在通过去除虚拟材料形成的沟槽和通孔处的称为顶部圆形的圆形顶部边缘部分。本发明的方法是通过去除其周围被层间氧化膜包围的虚拟材料形成沟槽或通孔的干蚀刻方法，该方法包括以下步骤：将虚拟材料蚀刻至预定深度，执行各向同性蚀刻虚拟材料蚀刻，并且在各向同性蚀刻之后除去虚拟材料的剩余部分。

3. 发明授权

US08440513B2 Method of semiconductor processing 失效
标题翻译：半导体处理方法
公开(公告)号：US08440513B2
公开(公告)日：2013-05-14
申请号：US12198222
申请日：2008-08-26
申请人： Tetsuo Ono , Go Saito
发明人： Tetsuo Ono , Go Saito
IPC分类号： H01L21/302 , H01L21/3065
CPC分类号： H01L21/31138 , H01L21/02071 , H01L21/28123 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： In a semiconductor that has a structure in which a work function controlling metal conductor is provided on a high dielectric insulation film, fine processing is performed without deteriorating a device. In a method of semiconductor processing, in which the semiconductor has an insulation film containing Hf or Zr formed on a semiconductor substrate and a conductor film containing Ti or Ta or Ru formed on an insulation film, and the conductor film is processed by using a resist formed on the conductor film under a plasma atmosphere, the resist is removed under the plasma atmosphere of gas that contains hydrogen and does not contain oxygen.
摘要翻译：在具有在高介电绝缘膜上设置功函数控制金属导体的结构的半导体中，进行精细处理而不会使器件恶化。在半导体处理方法中，其中半导体具有包含在半导体衬底上形成的Hf或Zr的绝缘膜和在绝缘膜上形成的含有Ti或Ta或Ru的导体膜，并且通过使用抗蚀剂来处理导体膜在等离子体气氛下在导体膜上形成，在含氢气体的等离子体气氛下除去抗蚀剂，不含氧。

4. 发明申请

US20100004795A1 PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS 审中-公开
标题翻译：等离子体处理方法和等离子体处理装置
公开(公告)号：US20100004795A1
公开(公告)日：2010-01-07
申请号：US12199838
申请日：2008-08-28
申请人： Takehisa IWAKOSHI , Go Saito
发明人： Takehisa IWAKOSHI , Go Saito
IPC分类号： G05D23/00 , G06F17/10
CPC分类号： H01L21/67248 , H01J37/32935 , H01J37/3299
摘要： The invention provides a plasma processing apparatus capable of setting the temperature of the plasma processing chamber accurately to a specific state, and to perform highly accurate plasma processing while maintaining a constant plasma processing property. The plasma processing apparatus for subjecting a sample w to be processed to plasma processing within a plasma processing chamber 1 comprises a database 25 for correlating and storing the inner temperature of the plasma processing chamber 1 and the plasma generating condition, a model expression storage unit 26 for storing the correlating equation of the inner temperature of the plasma processing chamber 1 and the plasma generating condition from the database 25, and a computing machine 21 having an operation unit 24 for creating the correlation equation and the optimum plasma generating condition, further having a process monitor 31 for monitoring the condition of plasma processing, wherein the value output by the process monitor and the temperature of the plasma processing chamber are correlated and stored in the database 25, and the computing machine 21 computes a plasma processing condition capable of realizing a substantially constant plasma processing chamber temperature, based on which the plasma processing chamber performs plasma processing.
摘要翻译：本发明提供一种能够将等离子体处理室的温度精确地设定为特定状态的等离子体处理装置，并且在保持恒定的等离子体处理性的同时进行高精度的等离子体处理。用于使等离子体处理室1内的待处理样品w进行等离子体处理的等离子体处理装置包括用于使等离子体处理室1的内部温度和等离子体生成条件相关和存储的数据库25，模型表达式存储单元26 用于存储等离子体处理室1的内部温度和来自数据库25的等离子体产生条件的相关方程式以及具有用于产生相关方程和最佳等离子体产生条件的操作单元24的计算机21，还具有处理监视器31，用于监视等离子体处理的状态，其中由过程监视器输出的值和等离子体处理室的温度相关联并存储在数据库25中，并且计算机21计算能够实现基本恒定的等离子体处理室温度，基于o n等离子体处理室进行等离子体处理。

5. 发明授权

US07396771B2 Plasma etching apparatus and plasma etching method 失效
标题翻译：等离子体蚀刻装置和等离子体蚀刻方法
公开(公告)号：US07396771B2
公开(公告)日：2008-07-08
申请号：US11362867
申请日：2006-02-28
申请人： Go Miya , Seiichiro Kanno , Naoshi Itabashi , Motohiko Yoshigai , Junichi Tanaka , Masahito Mori , Naoyuki Kofuji , Go Saito
发明人： Go Miya , Seiichiro Kanno , Naoshi Itabashi , Motohiko Yoshigai , Junichi Tanaka , Masahito Mori , Naoyuki Kofuji , Go Saito
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/67069 , H01J37/32449 , H01J37/32935 , H01L21/32137 , H01L21/67248 , H01L21/67253
摘要： A plasma etching apparatus includes a processing chamber in which a specimen is subjected to plasma processing, a specimen holder for holding the specimen, the specimen holder including a temperature controller for controlling temperatures at at least 2 positions of the specimen, at least two gas supply sources for supplying processing gases, at least two gas inlets for introducing the processing gases into the processing chamber, a regulator for independently controlling the compositions or the flow rates of the processing gases introduced from the at least two gas inlets and the temperatures controlled with at least two temperature controllers in the specimen holder, and an electromagnetic wave supply unit for sending an electromagnetic wave into the processing chamber, wherein the compositions or the flow rates of the processing gases introduced from the gas inlets and the temperature controlled with the temperature controllers in the specimen holder are independently controlled.
摘要翻译：一种等离子体蚀刻装置，包括：处理室，其中试样经受等离子体处理;试样保持器，用于保持试样;试样架包括用于控制试样至少2个位置的温度的温度控制器，至少两个气体供应用于提供处理气体的源，用于将处理气体引入处理室的至少两个气体入口，用于独立地控制从至少两个气体入口引入的处理气体的组成或流速的调节器和由样品架中的至少两个温度控制器和用于将电磁波发送到处理室中的电磁波供给单元，其中从气体入口引入的处理气体的组成或流速以及用温度控制器控制的温度样品架独立控制。

6. 发明申请

US20120003838A1 PLASMA ETCHING METHOD 审中-公开
标题翻译：等离子体蚀刻法
公开(公告)号：US20120003838A1
公开(公告)日：2012-01-05
申请号：US12855265
申请日：2010-08-12
申请人： Kazumasa Ookuma , Akito Kouchi , Kenichi Kuwahara , Michikazu Morimoto , Go Saito
发明人： Kazumasa Ookuma , Akito Kouchi , Kenichi Kuwahara , Michikazu Morimoto , Go Saito
IPC分类号： H01L21/308 , H01L21/3065
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/31138
摘要： Line-wiggling and striation caused by collapse of a pattern after a silicon dioxide film is etched by plasma with the use of a multilayer resist mask are prevented or suppressed. In a plasma etching method of etching a film to be etched by plasma with the use of a multilayer resist mask, the multilayer resist mask includes an upper layer resist, an inorganic intermediate film, and a lower layer resist, and the method includes a side wall protective film forming step of forming a side wall protective film on a side wall of the lower layer resist.
摘要翻译：防止或抑制通过使用多层抗蚀剂掩模通过等离子体蚀刻二氧化硅膜之后的图案的塌陷引起的线条摆动和条纹。在使用多层抗蚀剂掩模蚀刻由等离子体蚀刻的膜的等离子体蚀刻方法中，多层抗蚀剂掩模包括上层抗蚀剂，无机中间膜和下层抗蚀剂，该方法包括侧面在下层抗蚀剂的侧壁上形成侧壁保护膜的壁保护膜形成工序。

7. 发明申请

US20080315748A1 Display Device 审中-公开
标题翻译：显示设备
公开(公告)号：US20080315748A1
公开(公告)日：2008-12-25
申请号：US12054427
申请日：2008-03-25
申请人： Takaaki Kitada , Takashi Naito , Shigemi Hirasawa , Akira Hatori , Shoji Shirai , Shunichi Asakura , Makoto Yano , Yuuichi Kijima , Nobuhiko Hosotani , Go Saito
发明人： Takaaki Kitada , Takashi Naito , Shigemi Hirasawa , Akira Hatori , Shoji Shirai , Shunichi Asakura , Makoto Yano , Yuuichi Kijima , Nobuhiko Hosotani , Go Saito
IPC分类号： H01J29/90
CPC分类号： H01J29/90 , H01J29/925 , H01J29/94 , H01J31/123 , H01J2329/90 , H01J2329/92 , H01J2329/941
摘要： There is disclosed an FED (field emission display) capable of supplying an anode voltage, which is a high voltage, to an anode substrate with high reliability. A high voltage introduction button is sealed to a sealing plate, in which a contact spring is attached to the high voltage introduction button by spot welding. The high voltage introduction button has a flat portion connected to the contact spring, a sealing portion sealed to the glass substrate, and an external terminal to be connected to an external power source. The contact spring contacts an anode terminal of an anode substrate with an appropriate contact pressure, by a spring force from an arm portion of the contact spring. The anode terminal is formed of a conductive film containing metal particles.
摘要翻译：公开了能够以高可靠性向阳极基板供给高电压的阳极电压的FED（场发射显示）。高压引入按钮被密封到密封板上，其中通过点焊将接触弹簧附接到高压引入按钮。高压引入按钮具有连接到接触弹簧的平坦部分，密封到玻璃基板的密封部分和与外部电源连接的外部端子。接触弹簧通过弹簧力从接触弹簧的臂部分接触具有适当接触压力的阳极基板的阳极端子。阳极端子由含有金属颗粒的导电膜形成。

8. 发明申请

US20080152915A1 PELLET FOR OXYGEN-ABSORBING RESIN COMPOSITION AND OXYGEN-ABSORBING RESIN COMPOSITION 审中-公开
标题翻译：氧气吸收树脂组合物和氧气吸收树脂组合物
公开(公告)号：US20080152915A1
公开(公告)日：2008-06-26
申请号：US12016228
申请日：2008-01-18
申请人： Takayuki Ishihara , Hiroaki Goto , Yoshihiro Ohta , Yuji Yamaguchi , Go Saito
发明人： Takayuki Ishihara , Hiroaki Goto , Yoshihiro Ohta , Yuji Yamaguchi , Go Saito
IPC分类号： B32B27/00 , C08F110/02
CPC分类号： C08L23/00 , C08J3/226 , C08J2323/08 , C08J2423/00 , C08L23/0815 , C08L2205/02 , Y10S525/902 , Y10T428/2998 , C08L2666/02 , C08L2666/06
摘要： A high-quality oxygen-absorbing resin composition which is obtained without suffering resin scorching. Also provided are pellets for the oxygen-absorbing resin composition which comprise a thermoplastic resin (A) and an oxidation catalyst. After the pellets are mixed with a trigger resin and a thermoplastic resin (C), the trigger resin functions as a trigger to cause the oxidation of the thermoplastic resins (A) and (C) to proceed. As a result, the resultant composition absorbs oxygen.
摘要翻译：高品质的氧吸收树脂组合物，其不会发生树脂烧焦而得到。还提供了包含热塑性树脂（A）和氧化催化剂的氧吸收性树脂组合物的粒料。在颗粒与触发树脂和热塑性树脂（C）混合之后，触发树脂用作引发热塑性树脂（A）和（C）的氧化进行的触发剂。结果，所得组合物吸收氧气。

9. 外观设计

USD605502S1 Packaging container 有权
公开(公告)号：USD605502S1
公开(公告)日：2009-12-08
申请号：US29311171
申请日：2009-01-09
申请人： Jo Honda , Go Saito , Manabu Hosokawa , Yuuji Yamaguchi
设计人： Jo Honda , Go Saito , Manabu Hosokawa , Yuuji Yamaguchi

10. 发明授权

US07364956B2 Method for manufacturing semiconductor devices 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07364956B2
公开(公告)日：2008-04-29
申请号：US11209653
申请日：2005-08-24
申请人： Go Saito , Toshiaki Nishida , Takahiro Shimomura , Takao Arase
发明人： Go Saito , Toshiaki Nishida , Takahiro Shimomura , Takao Arase
IPC分类号： H01L21/336
CPC分类号： H01L21/31122 , H01L21/28273 , H01L21/823437
摘要： A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al2O3 and a polysilicon or SiO2 layer in contact with the interlayer insulating layer using a plasma etching system. The interlayer insulating layer is etched with a gas mixture containing BCl3, Ar, and CH4 or He. The gas mixture further contains Cl2. The interlayer insulating layer is etched in such a manner that a time-modulated high-frequency bias voltage is applied to the sample. The interlayer insulating layer is etched in such a manner that the sample is maintained at a temperature of 100° C. to 200° C. The interlayer insulating layer and the polysilicon or SiO2 layer are separately etched in different chambers.
摘要翻译：制造半导体器件的方法包括：蚀刻包括含有Al 2 O 3 3层和多晶硅或SiO 2 O 3的层间绝缘层的样品的步骤; 层，其使用等离子体蚀刻系统与层间绝缘层接触。层间绝缘层用含有BCl 3，Ar和CH 4或He的气体混合物进行蚀刻。气体混合物还含有Cl 2 O 2。蚀刻层间绝缘层，使得对样品施加时间调制的高频偏置电压。蚀刻层间绝缘层，使得样品保持在100℃至200℃的温度。层间绝缘层和多晶硅或SiO 2层分别在不同的房间

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