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    • 1. 发明授权
    • System and method for controlling data transmission between network
elements
    • 控制网元之间数据传输的系统和方法
    • US06003064A
    • 1999-12-14
    • US603913
    • 1996-02-22
    • Thomas M. WickiPatrick J. HellandJeffrey D. LarsonAlbert MuRaghu SastryRichard L. Schober, Jr.
    • Thomas M. WickiPatrick J. HellandJeffrey D. LarsonAlbert MuRaghu SastryRichard L. Schober, Jr.
    • H04L29/08H04L12/56H04L13/08G06F13/12G06F13/14
    • H04L47/30H04L47/10H04L47/26
    • A system and method for controlling data transmission between two network elements. A first port of a transmitting element is coupled to a second port of a receiving element. The second port includes buffers for temporarily storing received data until the data can be sent to another element. Included in the transmitting element are a received-currently-full register (RCFR), a sent-and-not-received register (SANRR), and a buffer-busy register (BBR). The transmitting element checks its BBR to determine if a buffer in the receiving element is available. The availability of buffers can be determined using a single priority protocol or a multiple priority protocol. If a buffer is available, the transmitting element transmits a data frame to the receiving element and sets the SANRR and the BBR to indicate that a frame has been sent (and that no acknowledgment has been received), that the selected buffer in the receiver is full, and that no additional data frames are to be sent to this buffer until the buffer is empty. When data is received by the receiving element, it is sent to an available buffer. When the data is received by the buffer, the receiving element sets a bit in a currently-full register (CFR) and a bit in a next-message-to-send register (NMTSR). A control signal is transmitted by the data receiving element on the same signal line as data that is being sent from the data receiving element to the data transmitting element. The data receiving element can multiplex the frames being sent in this direction with the control signal. When the transmitting element receives the control signal, it resets a bit associated with a buffer in the SANRR if the bit is set in the SANRR and if the associated bit in the NMTSR portion of the control signal is set.
    • 一种用于控制两个网络元件之间的数据传输的系统和方法。 发射元件的第一端口耦合到接收元件的第二端口。 第二端口包括用于临时存储接收到的数据的缓冲器,直到可以将数据发送到另一个元件。 包含在发送元件中的是接收当前完整寄存器(RCFR),发送 - 未接收寄存器(SANRR)和缓冲器 - 忙寄存器(BBR)。 发送元件检查其BBR以确定接收元件中的缓冲区是否可用。 可以使用单一优先级协议或多优先级协议来确定缓冲区的可用性。 如果缓冲器可用,则发送元件向接收元件发送数据帧,并将SANRR和BBR设置为指示已经发送了帧(并且没有接收到确认),接收器中所选择的缓冲器是 完全,并且在缓冲区为空之前,不会将其他数据帧发送到此缓冲区。 当接收元件接收到数据时,它被发送到可用的缓冲器。 当数据被缓冲器接收时,接收单元设置当前完整寄存器(CFR)中的位和下一个消息发送寄存器(NMTSR)中的位。 控制信号由数据接收元件在与数据接收元件发送到数据发送元件的数据相同的信号线上发送。 数据接收元件可以将在该方向上发送的帧与控制信号进行复用。 当发送元件接收到控制信号时,如果在SANRR中设置该位,并且控制信号的NMTSR部分中的关联位被置位,则复位与SANRR中的缓冲器有关的位。
    • 2. 发明授权
    • Asynchronous packet switching
    • 异步分组交换
    • US5959995A
    • 1999-09-28
    • US605677
    • 1996-02-22
    • Thomas M. WickiPatrick J. HellandTakeshi ShimizuWolf-Dietrich WeberWinfried W. Wilcke
    • Thomas M. WickiPatrick J. HellandTakeshi ShimizuWolf-Dietrich WeberWinfried W. Wilcke
    • G06F15/17H04L12/56H04J3/24
    • H04L45/00H04L45/34
    • A multiprocessor system includes a plurality of nodes and an interconnect that includes routers. Each node includes a reliable packet mover and a fast frame mover. The reliable packet mover provides packets to the fast frame mover which adds routing information to the packet to form a frame. The route to each node is predetermined. The frame is provided to the routers which delete the route from the routing information. If the frame is lost while being routed, the router discards the frame. If the packet is received at a destination node, the reliable packet mover in that node sends an acknowledgment to the source node if the packet passes an error detection test. The reliable packet mover in the source node resends the packet if it does not receive an acknowledgment in a predetermined time. The fast frame mover randomly selects the route from a plurality of predetermined routes to the destination node according to a probability distribution.
    • 多处理器系统包括多个节点和包括路由器的互连。 每个节点包括可靠的分组移动器和快速帧移动器。 可靠的分组移动器向快速帧移动器提供分组,其将路由信息添加到分组以形成帧。 到每个节点的路由是预定的。 该帧被提供给从路由信息中删除路由的路由器。 如果在路由时帧丢失,路由器将丢弃帧。 如果在目的地节点处接收到分组,则如果分组通过错误检测测试,则该节点中的可靠分组移动器向源节点发送确认。 如果源节点中的可靠的分组移动器在预定时间内没有接收到确认,则重新发送分组。 快速帧移动器根据概率分布从多个预定路由到目的地节点随机选择路由。
    • 4. 发明授权
    • System and method for dynamic network topology exploration
    • 动态网络拓扑探索的系统与方法
    • US5740346A
    • 1998-04-14
    • US605676
    • 1996-02-22
    • Thomas M. WickiPatrick J. HellandWolf-Dietrich WeberWinfried W. Wilcke
    • Thomas M. WickiPatrick J. HellandWolf-Dietrich WeberWinfried W. Wilcke
    • H04L12/56
    • H04L45/02
    • A system and method dynamically determines the topology of a source node routing network while having a minimal effect on network performance and without requiring expensive hardware to implement. A source node generates a ping frame. The source node transmits the ping frame to a first source router that is coupled to the source node. The first router transparently identifies the frame as a ping frame and creates an echo frame that is transmitted back to the source node. The first router identifies the port from which the ping frame is received and places this information in the header of the echo frame along with an echo frame identifier. The source node receives the echo frame and identifies routers and nodes to which a ping frame has not been sent based upon the connectivity information in the received echo frame. The source node continue generating and transmitting ping frame to all nodes and routers in the network. The source node identifies loops in the topology to avoid repetitive checking and identifies link and router failures. The topology exploration technique is transparent to the routers The topology exploration techique can be implemented during slow traffic periods with no increase in network latency or the technique can be implemented during high traffic periods and result in only a minimal increase in system latency because ping frames are small and are transparently sent to the control frame handler of the destination router or node.
    • 系统和方法动态地确定源节点路由网络的拓扑,同时对网络性能影响最小,而不需要昂贵的硬件来实现。 源节点生成ping帧。 源节点将ping帧发送到耦合到源节点的第一源路由器。 第一个路由器将该帧透明地识别为一个ping帧,并创建一个发送回源节点的回波帧。 第一个路由器识别从其接收ping帧的端口,并将该信息与回波帧标识符一起放置在回波帧的报头中。 根据所接收的回波帧中的连通性信息,源节点接收回波帧并识别尚未发送ping帧的路由器和节点。 源节点继续生成并发送Ping帧到网络中的所有节点和路由器。 源节点标识拓扑中的循环,以避免重复检查,并识别链路和路由器故障。 拓扑探索技术对于路由器是透明的。拓扑探索技术可以在较慢的流量周期内实现,而不会增加网络延迟,或者在高流量时段内可以实现该技术,并且只能使系统延迟最小化,因为ping帧 并且被透明地发送到目的地路由器或节点的控制帧处理器。
    • 6. 发明申请
    • DATA SCHEMATA IN PROGRAMMING LANGUAGE CONTRACTS
    • 编程语言合同中的数据方案
    • US20080147698A1
    • 2008-06-19
    • US11613046
    • 2006-12-19
    • Niklas GustafssonJohn L. HambyPatrick J. Helland
    • Niklas GustafssonJohn L. HambyPatrick J. Helland
    • G06F17/30
    • G06F17/30569
    • Systems and methods that integrate data type conversion(s) into a programming language, and describe external formats within a syntax thereof. A mapping component defines a declarative mapping from an external data format to one or more of its internal data types (e.g., expressing external data types in terms of source languages.) Moreover, a rule establishing component can define value-based rules, such as invariants to the external data format, wherein the schema declaration further defines data fields that make up the schema. Accordingly, by expressing rules in form of predicate logic (instead of imperative program logic) the subject innovation increase a likelihood that compilers can reason about the data.
    • 将数据类型转换集成到编程语言中的系统和方法,并在其语法内描述外部格式。 映射组件定义了从外部数据格式到其一个或多个内部数据类型(例如,根据源语言表达外部数据类型)的声明性映射。此外,规则建立组件可以定义基于价值的规则,例如 外部数据格式的不变量,其中模式声明进一步定义构成模式的数据字段。 因此,通过以谓词逻辑(而不是命令式程序逻辑)的形式表达规则,主题创新增加了编译器可以对数据进行推理的可能性。
    • 10. 发明授权
    • Queued component interface passing for results outflow from queued method invocations
    • 排队的组件接口传递结果从排队方法调用中流出
    • US06920636B1
    • 2005-07-19
    • US09464636
    • 1999-12-15
    • Richard DievendorffPatrick J. HellandGagan ChopraMohsen Al-Ghosein
    • Richard DievendorffPatrick J. HellandGagan ChopraMohsen Al-Ghosein
    • G06F9/44G06F9/46
    • G06F9/548G06F9/546G06F2209/548
    • Queued component interface passing provides a way for a queued component to convey results of processing a client program's method invocations made asynchronously via a queue. A queued component recorder for a “processing” queued component operates to marshal-by-value a method invocation parameter that is reference to another queued component recorder for another “results” queued component into a data stream of recorded method invocations, which is then submitted as a message to a queue associated with the processing queued component. On receipt of the message from the queue, a queued component player for the processing queued component unmarshals the reference to the other queued component recorder and passes this reference to the processing queued component. The processing queued component uses the passed reference to invoke methods of the results queued component through its message queue, which conveys the processing queued component's results.
    • 排队的组件接口传递提供了一种排队组件传达处理客户端程序通过队列异步进行的方法调用的结果的方法。 用于“处理”排队组件的排队组件记录器操作以逐个值得一个方法调用参数,该方法调用参数被引用到另一个排队的组件记录器,用于另一个“结果”排队组件成记录方法调用的数据流,然后提交 作为与处理排队组件相关联的队列的消息。 在从队列接收到消息时,用于处理排队的组件的排队组件播放器将对另一个排队的组件记录器的引用进行合并,并将该引用传递给处理排队的组件。 处理队列组件使用传递的引用来通过其消息队列调用结果排队组件的方法,从而传达处理队列组件的结果。