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    • 1. 发明授权
    • Method for forming a multi-layer metallic wiring structure
    • 用于形成多层金属布线结构的方法
    • US5385867A
    • 1995-01-31
    • US216968
    • 1994-03-24
    • Tetsuya UedaKousaku YanoTomoyasu MurakamiMichinari YamanakaShuji HiraoNoboru Nomura
    • Tetsuya UedaKousaku YanoTomoyasu MurakamiMichinari YamanakaShuji HiraoNoboru Nomura
    • H01L21/3205H01L21/768H01L23/522H01L21/283H01L21/31
    • H01L21/76847H01L21/76844H01L21/76877H01L21/76885H01L23/5226H01L2924/0002Y10S438/948
    • After accumulating a BPSG film layer on a silicon substrate, a first Al--Si--Cu film layer, a W film layer and a second Al--Si--Cu film layer are successively accumulated on this BPSG film layer. A resist pattern with wide-width and narrow-width pattern portions is formed on the second Al--Si--Cu film layer. The wide-width pattern portion is provided at a position corresponding to a contact for connecting a first-layer metallic wiring and a second-layer metallic wiring, while the narrow-width pattern portion is provided at a position corresponding to a wiring portion for the first-layer metallic wiring. After applying first etching on the second Al--Si--Cu film layer with a mask of the resist patter, second etching is applied on the W film layer. Thereafter, by applying third etching, the resist pattern remaining on the first-layer metallic wiring is removed and the first Al--Si--Cu film layer is transfigured into a tall metallic film portion and a short metallic film portion. After accumulating an inter-layer insulating film layer on the first Al--Si--Cu film layer, etchback is applied on this inter-layer insulating film layer until the top of the tall metallic film portion is bared. Then, the second-layer metallic wiring is formed on the inter-layer insulating film layer so that the second-layer metallic wiring is connected with the tall metallic film portion.
    • 在硅衬底上积累BPSG膜层之后,第一Al-Si-Cu膜层,W膜层和第二Al-Si-Cu膜层依次堆积在该BPSG膜层上。 在第二Al-Si-Cu膜层上形成具有宽幅和窄宽图案部分的抗蚀剂图案。 宽幅图形部分设置在与用于连接第一层金属布线和第二层金属布线的接触件相对应的位置处,而窄宽图案部分设置在与布线部分相对应的位置处 第一层金属布线。 在具有抗蚀剂图案的掩模的第二Al-Si-Cu膜层上施加第一蚀刻之后,在W膜层上施加第二蚀刻。 此后,通过施加第三蚀刻,去除残留在第一层金属布线上的抗蚀剂图案,并将第一Al-Si-Cu膜层变形为高金属膜部分和短金属膜部分。 在第一Al-Si-Cu膜层上积累层间绝缘膜层之后,在该层间绝缘膜层上施加回蚀,直到高金属膜部分的顶部露出。 然后,在层间绝缘膜层上形成第二层金属布线,使得第二层金属布线与高金属膜部分连接。
    • 5. 发明授权
    • Semiconductor device fabrication method
    • 半导体器件制造方法
    • US5569628A
    • 1996-10-29
    • US535323
    • 1995-09-27
    • Kousaku YanoTomoyasu MurakamiMasayuki EndoNoboru Nomura
    • Kousaku YanoTomoyasu MurakamiMasayuki EndoNoboru Nomura
    • H01L21/28H01L21/768H01L21/465
    • H01L21/76841H01L21/76843
    • A silicon dioxide film is partly etched away to form an opening thereby exposing a silicon substrate. The surface of the opening, which is almost entirely covered with Si-OH, is coated with hexamethyldisilazane (HMDS) to bring about a silylation reaction. This causes the silicon substrate surface to be covered with a molecular film formed by replacing the hydrogen part in Si-OH with Si((CH.sub.3).sub.3. Atoms of aluminum are ejected by a sputtering process. The ejected aluminum atoms collide with the molecular film. Although some hydrocarbons (CH.sub.x) are sputtered or ejected due to such collision, a SiO.sub.x C.sub.y H.sub.z film 12' transformed from the molecular film is left between an aluminum film deposited and the silicon substrate. This SiO.sub.x C.sub.y H.sub.z film 12' acts as a barrier metal. The presence of the SiO.sub.x C.sub.y H.sub.z film prevents the occurrence of counter diffusion in the Al-Si system. No spikes are formed as a result.
    • 部分地蚀刻掉二氧化硅膜以形成开口,从而暴露硅衬底。 几乎完全用Si-OH覆盖的开口的表面涂覆有六甲基二硅氮烷(HMDS)以进行甲硅烷基化反应。 这导致硅衬底表面被用Si((CH 3)3代替Si-OH中的氢部分而形成的分子膜覆盖,铝的原子通过溅射工艺喷射,喷射的铝原子与分子膜碰撞 虽然由于这种碰撞而使一些烃类(CHx)溅射或喷射,但是从分子膜转化的SiO x C y H z膜12'留在沉积的铝膜和硅基板之间,该SiOxCyHz膜12'作为阻挡金属, SiOxCyHz膜的存在防止了在Al-Si系统中产生反向扩散,结果不形成尖峰。
    • 8. 发明授权
    • Method of preventing diffusion between interconnect and plug
    • 防止互连和插头之间扩散的方法
    • US5834369A
    • 1998-11-10
    • US594225
    • 1996-01-31
    • Tomoyasu MurakamiKousaku Yano
    • Tomoyasu MurakamiKousaku Yano
    • H01L21/768H01L23/522H01L23/532H01L21/28
    • H01L23/53233H01L21/76838H01L23/5226H01L2924/0002
    • There are provided the steps of: forming a connection hole in an interlayer insulating film overlying a lower metal interconnection; forming a W plug in the connection hole; forming a first metal film and a second metal film over the interlayer insulating film and the W plug; forming an interconnection underlying film by using a photoresist mask with no alignment margin; and forming a diffusion preventing film made of a titanium fluoride or the like over the W plug, while etching away the exposed part of the first metal film. Reciprocal diffusion of tungsten and aluminum is prevented by the titanium fluoride or the like, thereby preventing the formation of an alloy having high electric resistivity. As a result, an alloy having high electric resistivity resulting from the reaction between the metal plug and the upper metal interconnection is prevented from being formed and a semiconductor device which is high in reliability and integration is provided through the manufacturing process involving no alignment margin.
    • 提供了以下步骤:在覆盖下金属互连的层间绝缘膜中形成连接孔; 在连接孔中形成W插头; 在层间绝缘膜和W插头上形成第一金属膜和第二金属膜; 通过使用没有取向余量的光致抗蚀剂掩模,形成基底膜的互连; 并且在W插头上形成由氟化钛等制成的防扩散膜,同时蚀刻掉第一金属膜的暴露部分。 通过氟化钛等防止钨和铝的相互扩散,从而防止形成具有高电阻率的合金。 结果,防止了由金属插塞和上部金属互连件之间的反应产生的具有高电阻率的合金,并且通过不涉及取向余量的制造工艺来提供可靠性和集成度高的半导体器件。