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1. 发明授权

US09696711B2 Processing instructing device, processing instructing method, computer program and processing device 有权
公开(公告)号：US09696711B2
公开(公告)日：2017-07-04
申请号：US14232980
申请日：2012-07-12
申请人： Teruo Asakawa , Hirofumi Yamaguchi , Supika Mashiro , Toshihiko Iijima , Hirokazu Narisawa , Kou Fujimura
发明人： Teruo Asakawa , Hirofumi Yamaguchi , Supika Mashiro , Toshihiko Iijima , Hirokazu Narisawa , Kou Fujimura
IPC分类号： G06F19/00 , G04F1/00 , H01L21/00 , G05B19/402 , G05B19/418
CPC分类号： G05B19/402 , G05B19/41865 , G05B2219/2609 , G05B2219/32078 , G05B2219/32272 , G05B2219/32277 , G05B2219/32311 , G05B2219/49202 , Y02P90/14 , Y02P90/20 , Y02P90/28 , Y02P90/285
摘要： A processing indicating device to improve the efficiency of processing on an object. The device includes a first communication unit which communicates information with a plurality of processing devices for processing the object and a second communication unit which communicates information with a conveyance controlling device controlling conveying of the object to the plurality of processing devices. An arrival time predicting unit predicts on the basis of information received by the second communication unit, the time when the conveying device arrives at one of the processing devices. In addition, a finish time predicting unit receives information and predicts the time when the processing on the object in the one processing device finishes. A processing indicating unit causes processing control information that orders the execution of device state improvement treatment to be transmitted to the one processing device on the basis of the predicted respective times.

2. 发明申请

US20140358271A1 PROCESSING INSTRUCTING DEVICE, PROCESSING INSTRUCTING METHOD, COMPUTER PROGRAM AND PROCESSING DEVICE 有权
标题翻译：处理指令装置，处理指令方法，计算机程序和处理装置
公开(公告)号：US20140358271A1
公开(公告)日：2014-12-04
申请号：US14232980
申请日：2012-07-12
申请人： Teruo Asakawa , Hirofumi Yamaguchi , Supika Mashiro , Toshihiko Iijima , Hirokazu Narisawa , Kou Fujimura
发明人： Teruo Asakawa , Hirofumi Yamaguchi , Supika Mashiro , Toshihiko Iijima , Hirokazu Narisawa , Kou Fujimura
IPC分类号： G05B19/402
CPC分类号： G05B19/402 , G05B19/41865 , G05B2219/2609 , G05B2219/32078 , G05B2219/32272 , G05B2219/32277 , G05B2219/32311 , G05B2219/49202 , Y02P90/14 , Y02P90/20 , Y02P90/28 , Y02P90/285
摘要： A processing indicating device to improve the efficiency of processing on an object. The device includes a first communication unit which communicates information with a plurality of processing devices for processing the object and a second communication unit which communicates information with a conveyance controlling device controlling conveying of the object to the plurality of processing devices. An arrival time predicting unit predicts on the basis of information received by the second communication unit, the time when the conveying device arrives at one of the processing devices. In addition, a finish time predicting unit receives information and predicts the time when the processing on the object in the one processing device finishes. A processing indicating unit causes processing control information that orders the execution of device state improvement treatment to be transmitted to the one processing device on the basis of the predicted respective times.
摘要翻译：一种处理指示装置，用于提高对物体的处理效率。该装置包括：第一通信单元，其与多个用于处理该对象的处理装置进行通信;第二通信单元，其与传送控制装置通信信息，该输送控制装置控制对该多个处理装置的传送。到达时间预测单元基于由第二通信单元接收的信息，传送设备到达处理设备之一的时间来预测。此外，完成时间预测单元接收信息并预测在一个处理设备中的对象的处理完成的时间。处理指示单元基于预测的各个时间，使得命令执行设备状态改善处理的处理控制信息被发送到一个处理设备。

3. 发明申请

US20110234247A1 WAFER CHUCK INCLINATION CORRECTING METHOD AND PROBE APPARATUS 有权
标题翻译： WAFER CHUCK INCLINATION校正方法和探针装置
公开(公告)号：US20110234247A1
公开(公告)日：2011-09-29
申请号：US13071881
申请日：2011-03-25
申请人： Kazunari ISHII , Toshihiko Iijima , Shuji Akiyama
发明人： Kazunari ISHII , Toshihiko Iijima , Shuji Akiyama
IPC分类号： G01R31/00
CPC分类号： G01R31/2891 , G01R31/2887
摘要： A method for correcting inclination of a wafer chuck includes obtaining in advance a correction amount for each of the semiconductor chips which corrects the inclination of the wafer chuck in the case of applying a contact load to at least each one of the semiconductor chips and storing each of the correction amounts in a data storage unit; calculating a total correction amount for correcting the inclination of the wafer chuck by calculating the correction amount of each of the semiconductor chips bringing into contact with the probes when the semiconductor wafer comes into electrical contact with the probes and adding the calculated correction amounts; and correcting the inclination of the wafer chuck based on the total correction amount.
摘要翻译：一种用于校正晶片卡盘倾斜度的方法，包括：在对至少每个半导体芯片施加接触负载的情况下，预先获得校正每个半导体芯片的校正量，该半导体芯片校正晶片卡盘的倾斜度，在数据存储单元中的校正量; 计算用于通过计算当半导体晶片与探针电接触而与探针接触的每个半导体芯片的校正量并添加所计算的校正量时，计算校正晶片卡盘的倾斜度的总校正量; 并且基于总校正量来校正晶片卡盘的倾斜度。

4. 发明授权

US07283890B2 Work convey system, unmanned convey vehicle system, unmanned convey vehicle, and work convey method 失效
标题翻译：工作传送系统，无人驾驶车辆系统，无人驾驶车辆和工作传送方式
公开(公告)号：US07283890B2
公开(公告)日：2007-10-16
申请号：US10485969
申请日：2002-12-27
申请人： Toshihiko Iijima , Shuji Akiyama , Hiroki Hosaka , Takashi Nakao
发明人： Toshihiko Iijima , Shuji Akiyama , Hiroki Hosaka , Takashi Nakao
IPC分类号： G06F7/00
CPC分类号： H01L21/67763 , G05B19/41865 , G05B2219/31429 , G05B2219/32107 , G05B2219/32252 , G05B2219/32283 , G05B2219/45031 , G06Q10/06 , H01L21/67754 , Y02P90/08 , Y02P90/20
摘要： There is a jump in the number of devices formed on a single wafer, and it takes a lot of time to inspect a single wafer. In addition, if wafers are inspected every lot, detected wafers remain in staying in a prober until the inspection of all of the wafers is completed. Therefore, the time required to transfer the wafers of each lot to the subsequent step is delayed. As a result, it is difficult to shorten TAT (Turn-Around-Time), and it is difficult to flexibly operate the prober.A transfer system E according to the present invention includes: a host computer 1; a plurality of probers 2 under the control of the host computer 1; a plurality of RGVs 4 for delivering a wafer W to each of the probers 2, one by one, at its request; and a transfer operating unit 5, associated with the host computer, for operating the RGVs 4. The transfer operating unit 5 has a scheduler 54A and a dispatcher 54B, for preparing an operating schedule for each of the RGVs 4 on the basis of the relationship in position between each of the probers 2 and each of the RGVs 4, and for determining optimum transfer paths for the RGVs 4, to assign a corresponding one of the RGVs 4 to a corresponding one of the optimum transfer paths.
摘要翻译：在单个晶片上形成的器件数量有所跳跃，检查单个晶片花费大量时间。另外，如果每批次检查晶片，检测到的晶片保留在探针中，直到完成所有晶片的检查。因此，将每个批次的晶片转移到随后的步骤所需的时间被延迟。因此，难以缩短TAT（周转时间），难以灵活操作探测器。根据本发明的传送系统E包括：主计算机1; 在主计算机1的控制下的多个探测器2; 多个RGV4，用于根据要求一个接一个地将晶片W传送到每个探测器2; 以及与主计算机相关联的用于操作RGV 4的传送操作单元5。传送操作单元5具有调度器54A和调度器54B，用于根据每个探测器2和每个RGV 4之间的位置关系来准备每个RGV4的操作时间表，并且为了确定RGV4的最佳传输路径，以将RGV4中的相应一个分配给最佳传输路径中的相应一个。

5. 发明授权

US07458469B2 Substrate transfer apparatus and method, and storage medium 失效
标题翻译：基板转印装置和方法以及存储介质
公开(公告)号：US07458469B2
公开(公告)日：2008-12-02
申请号：US11227136
申请日：2005-09-16
申请人： Hiroki Hosaka , Toshihiko Iijima , Shinya Shimizu
发明人： Hiroki Hosaka , Toshihiko Iijima , Shinya Shimizu
IPC分类号： B65G49/07
CPC分类号： H01L21/67309 , Y10S414/137
摘要： In a substrate transfer apparatus, an adaptor unit 25 includes a box-shaped main body 40 having three open sides; and a plurality of stage arms 41 disposed in the main body 40, serving as substrate mounting members. Each of the stage arms 41 has a disc-shaped wafer supporting portion 411 disposed at an approximately central portion of the main body 40 and a flat body 412 disposed in the main body 40 so as not to interfere with the moving paths of transfer arms 241 and 341. Formed at a connecting portion of the wafer supporting portion 411 and the body 412 are cutout portions 413 for preventing interference between the stage arms 41 and two prongs of leading end portions of the transfer arms 241 and 341 introduced into the main body 40.
摘要翻译：在基板输送装置中，适配器单元25包括具有三个开口侧的箱形主体40; 以及设置在主体40中的用作基板安装构件的多个平台臂41。每个平台臂41具有设置在主体40的大致中央部的盘状晶片支撑部411和设置在主体40中的平坦体412，以便不干涉传送臂241的移动路径在晶片支撑部分411和主体412的连接部分处形成切口部分413，用于防止台臂41与引入主体40的转移臂241和341的前端部分的两个尖头之间的干涉。

6. 发明申请

US20060152211A1 Transfer system and transfer method of object to be processed 有权
标题翻译：待处理对象的传送系统和传送方法
公开(公告)号：US20060152211A1
公开(公告)日：2006-07-13
申请号：US11374998
申请日：2006-03-15
申请人： Toshihiko Iijima , Shinya Shimizu , Kaori Ishihara
发明人： Toshihiko Iijima , Shinya Shimizu , Kaori Ishihara
IPC分类号： G01R31/28
CPC分类号： H01L21/67736 , G01R31/2893 , G05B19/41815 , G05B2219/31002 , G05B2219/31216 , G05B2219/33198 , G05B2219/45031 , H01L21/67265 , Y02P90/08 , Y02P90/285 , Y10S414/135
摘要： A transfer method employs a transfer system including a semiconductor handling device and an automatic transfer device. The semiconductor handling device includes a first transfer mechanism and a first optically coupled parallel I/O communications interface. The automatic transfer device includes a second transfer mechanism and a second optically coupled parallel I/O communications interface. The transfer method includes a successive transfer notifying step wherein the automatic transfer device and the semiconductor handling device notify each other that a successive transfer is possible via an optical communications between the first and the second optically coupled parallel I/O communications interface in case where a plurality of objects to be processed are able to be successively transferred one by one between the first and the second transfer mechanism; and a successive transfer step wherein the objects are transferred one by one between the first and the second transfer mechanism.
摘要翻译：转印方法采用包括半导体处理装置和自动转印装置的转印系统。半导体处理装置包括第一传送机构和第一光耦合并行I / O通信接口。自动传送装置包括第二传送机构和第二光耦合并行I / O通信接口。传送方法包括连续传送通知步骤，其中自动传送设备和半导体处理设备通过彼此通过第一和第二光耦合并行I / O通信接口之间的光通信可以进行连续的传送，要处理的多个物体能够在第一和第二传送机构之间逐个地依次传送; 以及连续传送步骤，其中物体在第一和第二传送机构之间逐个传送。

7. 发明申请

US20050209725A1 Conveyance system, conveyance method and vacuum holding apparatus for object to be processed, and centering method for wafer 审中-公开
标题翻译：传送系统，输送方法和待处理物体的真空保持装置以及晶圆的定心方法
公开(公告)号：US20050209725A1
公开(公告)日：2005-09-22
申请号：US11129313
申请日：2005-05-16
申请人： Shuji Akiyama , Toshihiko Iijima , Hiroki Hosaka
发明人： Shuji Akiyama , Toshihiko Iijima , Hiroki Hosaka
IPC分类号： G05B19/00 , G05B19/418 , H01L21/00 , H01L21/68 , G06F19/00
CPC分类号： H01L21/6835 , G05B19/00 , G05B19/41815 , G05B2219/31002 , G05B2219/45031 , H01L21/67276 , Y02P90/08 , Y02P90/285 , Y02P90/60
摘要： A conveyance system E for wafers W includes a host computer 1 for carrying out the management of the production of semiconductor devices, a plurality of probers 2 for inspecting the electric characteristics of the wafers W under the administration of the host computer 1, an AGV 3 for automatically transporting the wafers W in block of a carrier in order to deliver the wafers W one by one to these probers 2 according to respective demands and an AGV controller 4 for controlling the operation of the AGV 3 under the administration of the host computer 1.
摘要翻译：用于晶片W的输送系统E包括用于执行半导体器件的生产的管理的主计算机1，用于在主计算机1的管理下检查晶片W的电特性的多个探测器2，AGV 3 用于在载体的块中自动输送晶片W，以便根据各自的要求将晶片W一个一个地传送到这些探测器2;以及AGV控制器4，用于在主计算机1的管理下控制AGV 3的操作。

8. 发明授权

US5892686A Wafer prober system 失效
标题翻译：晶圆探针系统
公开(公告)号：US5892686A
公开(公告)日：1999-04-06
申请号：US760404
申请日：1996-12-04
申请人： Toshihiko Iijima
发明人： Toshihiko Iijima
IPC分类号： G01R31/01 , G01R31/28 , G01R31/02
CPC分类号： G01R31/01 , G01R31/2831
摘要： A wafer prober system includes a host computer, and a prober device. The prober device includes a plurality of prober circuits, and a plurality of touch screens, each connected to the prober circuit for simultaneously displaying image data and display data from said prober circuit, each of the prober circuit including an image processing section for sequentially photographing wafers checked by probes and outputting image data, a display control section for outputting display data according to the checking, and a prober control section for controlling the outputs of the image processing section and display control section. The control section outputs the image data and display data from the prober circuit, so that the image data and display data are displayed on the touch screen at the same time. Image data and display data are selectively provided by one of prober circuits, from image data and display data displayed on each of touch screens, and are simultaneously displayed on the host computer.
摘要翻译：晶片探测器系统包括主计算机和探测器设备。探测器设备包括多个探测器电路和多个触摸屏，每个触摸屏都连接到探测器电路，用于同时显示图像数据和显示来自所述探测器电路的数据，每个探测器电路包括用于顺序拍摄晶片的图像处理部分通过探针检查并输出图像数据，用于根据检查输出显示数据的显示控制部分和用于控制图像处理部分和显示控制部分的输出的探测器控制部分。控制部分输出来自探测器电路的图像数据和显示数据，使得图像数据和显示数据同时显示在触摸屏上。图像数据和显示数据由搜索电路之一，从显示在每个触摸屏上的图像数据和显示数据中选择性地提供，并且同时显示在主计算机上。

9. 发明授权

US08866503B2 Wafer chuck inclination correcting method and probe apparatus 有权
标题翻译：晶圆卡盘倾斜校正方法和探头装置
公开(公告)号：US08866503B2
公开(公告)日：2014-10-21
申请号：US13071881
申请日：2011-03-25
申请人： Kazunari Ishii , Toshihiko Iijima , Shuji Akiyama
发明人： Kazunari Ishii , Toshihiko Iijima , Shuji Akiyama
IPC分类号： G01R31/00 , G01R31/28
CPC分类号： G01R31/2891 , G01R31/2887
摘要： A method for correcting inclination of a wafer chuck includes obtaining in advance a correction amount for each of the semiconductor chips which corrects the inclination of the wafer chuck in the case of applying a contact load to at least each one of the semiconductor chips and storing each of the correction amounts in a data storage unit; calculating a total correction amount for correcting the inclination of the wafer chuck by calculating the correction amount of each of the semiconductor chips bringing into contact with the probes when the semiconductor wafer comes into electrical contact with the probes and adding the calculated correction amounts; and correcting the inclination of the wafer chuck based on the total correction amount.
摘要翻译：一种用于校正晶片卡盘倾斜度的方法，包括：在对至少每个半导体芯片施加接触负载的情况下，预先获得校正每个半导体芯片的校正量，该半导体芯片校正晶片卡盘的倾斜度，在数据存储单元中的校正量; 计算用于通过计算当半导体晶片与探针电接触而与探针接触的每个半导体芯片的校正量并添加所计算的校正量时，计算校正晶片卡盘的倾斜度的总校正量; 并且基于总校正量来校正晶片卡盘的倾斜度。

10. 发明申请

US20070031222A1 Substrate transfer apparatus and method, and storage medium 失效
标题翻译：基板转印装置和方法以及存储介质
公开(公告)号：US20070031222A1
公开(公告)日：2007-02-08
申请号：US11227136
申请日：2005-09-16
申请人： Hiroki Hosaka , Toshihiko Iijima , Shinya Shimizu
发明人： Hiroki Hosaka , Toshihiko Iijima , Shinya Shimizu
IPC分类号： B65B69/00
CPC分类号： H01L21/67309 , Y10S414/137
摘要： In a substrate transfer apparatus, an adaptor unit 25 includes a box-shaped main body 40 having three open sides; and a plurality of stage arms 41 disposed in the main body 40, serving as substrate mounting members. Each of the stage arms 41 has a disc-shaped wafer supporting portion 411 disposed at an approximately central portion of the main body 40 and a flat body 412 disposed in the main body 40 so as not to interfere with the moving paths of transfer arms 241 and 341. Formed at a connecting portion of the wafer supporting portion 411 and the body 412 are cutout portions 413 for preventing interference between the stage arms 41 and two prongs of leading end portions of the transfer arms 241 and 341 introduced into the main body 40.
摘要翻译：在基板输送装置中，适配器单元25包括具有三个开口侧的箱形主体40; 以及设置在主体40中的用作基板安装构件的多个平台臂41。每个平台臂41具有设置在主体40的大致中央部的盘状晶片支撑部411和设置在主体40中的平坦体412，以便不干涉传送臂241的移动路径和341。在晶片支撑部分411和主体412的连接部分处形成切口部分413，用于防止台臂41与引入主体40的转移臂241和341的前端部分的两个尖头之间的干涉。

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