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1. 发明授权

US5424253A Method for manufacturing an inter-layer insulating film 失效
标题翻译：制造层间绝缘膜的方法
公开(公告)号：US5424253A
公开(公告)日：1995-06-13
申请号：US26291
申请日：1993-03-04
申请人： Takashi Usami , Masaki Yoshimaru , Kimiaki Shimokawa
发明人： Takashi Usami , Masaki Yoshimaru , Kimiaki Shimokawa
IPC分类号： H01L21/31 , H01L21/316 , H01L21/318 , H01L21/321 , H01L21/768 , H01L23/522
CPC分类号： H01L21/02164 , H01L21/02271 , H01L21/02304 , H01L21/31608 , H01L21/3185 , H01L21/3211
摘要： A method for manufacturing an inter-layer insulating film (ex. O.sub.3, TEOS or NSG) with a superior surface flatness is disclosed to solve the problem that the surface of the inter-layer film formed on a certain under-layer substrate reveals roughness due to the influence of the substrate. It is provided a method for manufacturing O.sub.3 TEOS NSG film after doping nitrogen (N) atoms into the under-layer films, or after forming the under-layer films which contain nitrogen (N) atoms therein.
摘要翻译：公开了一种具有优异表面平坦度的层间绝缘膜（例如O3，TEOS或NSG）的制造方法，以解决在某一底层基板上形成的层间膜的表面显示粗糙度的问题对基板的影响。提供了在将氮（N）原子掺杂到下层膜中之后或在其中形成含有氮（N））的底层膜之后，制造O 3 TEOS NSG膜的方法。

2. 发明申请

US20110189849A1 SEMICONDUCTOR DEVICE WITH A BARRIER FILM 有权
标题翻译：具有屏障膜的半导体器件
公开(公告)号：US20110189849A1
公开(公告)日：2011-08-04
申请号：US13087026
申请日：2011-04-14
申请人： Junichi KOIKE , Makoto Wada , Shingo Takahashi , Noriyoshi Shimizu , Hideki Shibata , Satoshi Nishikawa , Takamasa Usui , Hayato Nasu , Masaki Yoshimaru
发明人： Junichi KOIKE , Makoto Wada , Shingo Takahashi , Noriyoshi Shimizu , Hideki Shibata , Satoshi Nishikawa , Takamasa Usui , Hayato Nasu , Masaki Yoshimaru
IPC分类号： H01L21/768
CPC分类号： H01L21/76844 , H01L21/76831 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76867 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.
摘要翻译：一种制造半导体器件的方法，包括在设置在半导体衬底上的层间绝缘膜中形成开口，形成含有预定金属元素的辅助膜，以覆盖开口的内表面，形成主膜以填充开口在形成辅助膜之后，主膜含有用作互连主层的材料的Cu，并且在形成主膜之前或之后进行热处理，从而扩散辅助膜的预定金属元素在面向辅助膜的层间绝缘膜的表面上，以在开口内的层间绝缘膜上形成阻挡膜，所述阻挡膜以预定的金属元素与成分元素为主要成分，的层间绝缘膜。

3. 发明授权

US07932508B2 Multi-value recording phase-change memory device, multi-value recording phase-change channel transistor, and memory cell array 有权
标题翻译：多值记录相变存储器件，多值记录相变沟道晶体管和存储单元阵列
公开(公告)号：US07932508B2
公开(公告)日：2011-04-26
申请号：US12838985
申请日：2010-07-19
申请人： Sumio Hosaka , Hayato Sone , Masaki Yoshimaru , Takashi Ono , Mayumi Nakasato
发明人： Sumio Hosaka , Hayato Sone , Masaki Yoshimaru , Takashi Ono , Mayumi Nakasato
IPC分类号： H01L29/02
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2436 , H01L45/06 , H01L45/1226 , H01L45/144 , H01L45/148
摘要： A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.
摘要翻译：可以稳定地记录多值信息并且可以高可靠性再现信息的多值记录相变存储器件包括：第一电极层26，第二电极层28和存储层30，和第二电极层26和28，并且包含由在室温下在非晶相或结晶相中稳定的相变材料形成的相变材料层，其中存储层30包括多个相互隔离的子内存层32,34,36和38在第一和第二电极层26和28之间。

4. 发明授权

US07838439B2 Method of manufacturing an insulating film containing hafnium 失效
标题翻译：制造含有铪的绝缘膜的方法
公开(公告)号：US07838439B2
公开(公告)日：2010-11-23
申请号：US12146835
申请日：2008-06-26
申请人： Masaharu Oshima , Haruhiko Takahashi , Koji Usuda , Ziyuan Liu , Liu Guo-lin , Kazuto Ikeda , Masaki Yoshimaru
发明人： Masaharu Oshima , Haruhiko Takahashi , Koji Usuda , Ziyuan Liu , Liu Guo-lin , Kazuto Ikeda , Masaki Yoshimaru
IPC分类号： H01L21/31 , H01L21/469 , H01L21/336
CPC分类号： H01L21/28176 , H01L21/28035 , H01L29/513 , H01L29/517
摘要： A stacked film has an insulating film containing hafnium formed above a silicon layer and a polysilicon layer formed on the insulating film. The stacked film is heated in an atmosphere containing oxygen and nitrogen and having the total pressure approximately equal to a partial pressure of the nitrogen.
摘要翻译：层叠膜具有在硅层上形成的含有铪的绝缘膜和形成在绝缘膜上的多晶硅层。层叠的膜在含氧和氮气的气氛中加热，其总压力近似等于氮的分压。

5. 发明授权

US07782630B2 Printed circuit board unit 有权
标题翻译：印刷电路板单元
公开(公告)号：US07782630B2
公开(公告)日：2010-08-24
申请号：US12222232
申请日：2008-08-05
申请人： Naohiko Kajio , Masaki Yoshimaru
发明人： Naohiko Kajio , Masaki Yoshimaru
IPC分类号： H05K7/14
CPC分类号： H05K7/1492 , H05K1/0263 , H05K1/14 , H05K1/141 , H05K1/148 , H05K2201/044 , H05K2201/10272 , H05K2201/10287
摘要： A second printed wiring board is opposed to a surface of the first printed wiring board. A support member supports the first and second printed wiring boards. A first connector is mounted on the first printed wiring board. A second connector is mounted on the second printed wiring board. A wiring connects the first printed wiring board to the second printed wiring board. The first and second connectors are separately mounted on the first and second printed wiring boards, respectively. The sizes of the first and second printed wiring boards can be reduced as compared with the case where connectors are arranged in a row on a single printed wiring board, for example. This results in a reduction in the size of the printed circuit board unit. A large number of the printed circuit board units can be coupled to the back panel.
摘要翻译：第二印刷线路板与第一印刷线路板的表面相对。支撑构件支撑第一和第二印刷线路板。第一连接器安装在第一印刷线路板上。第二连接器安装在第二印刷线路板上。布线将第一印刷布线板连接到第二印刷布线板。第一和第二连接器分别安装在第一和第二印刷电路板上。与在单个印刷电路板上连接成排配置的情况相比，可以减小第一和第二印刷电路板的尺寸。这导致印刷电路板单元的尺寸的减小。大量印刷电路板单元可以耦合到后面板。

6. 发明申请

US20090057739A1 Ge channel device and method for fabricating ge channel device 审中-公开
标题翻译： Ge通道器件及其制造方法
公开(公告)号：US20090057739A1
公开(公告)日：2009-03-05
申请号：US12230448
申请日：2008-08-28
申请人： Hiroshi Iwai , Takeo Hattori , Kazuo Tsutsui , Kuniyuki Kakushima , Parhat Ahmet , Jaeyeol Song , Masaki Yoshimaru , Yasuyoshi Mishima , Tomonori Aoyama , Hiroshi Oji , Yoshitake Kato
发明人： Hiroshi Iwai , Takeo Hattori , Kazuo Tsutsui , Kuniyuki Kakushima , Parhat Ahmet , Jaeyeol Song , Masaki Yoshimaru , Yasuyoshi Mishima , Tomonori Aoyama , Hiroshi Oji , Yoshitake Kato
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L29/517 , C23C14/021 , C23C14/024 , C23C14/08 , C23C14/18 , C23C14/30 , H01L21/28158 , H01L21/28255 , H01L21/31604 , H01L29/78
摘要： The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.
摘要翻译： Ge沟道器件包括：Ge沟道层（2）; 形成在所述Ge沟道层（2）上的含Si界面层（4）; 在所述界面层（4）上形成的La 2 O 3层（6）; 和形成在La 2 O 3层（6）上的导电层（8）。在该器件中，含Si界面层（4）用于抑制Ge原子扩散到La2O3层（6）中，从而防止La2O3层（6）中Ge氧化物的形成; 因此，可以实现其C-V特性仅具有小滞后的Ge通道器件。

7. 发明申请

US20080057704A1 SEMICONDUCTOR DEVICE WITH A BARRIER FILM 有权
标题翻译：具有屏障膜的半导体器件
公开(公告)号：US20080057704A1
公开(公告)日：2008-03-06
申请号：US11877243
申请日：2007-10-23
申请人： Junichi Koike , Makoto Wada , Shingo Takahashi , Noriyoshi Shimizu , Hideki Shibata , Satoshi Nishikawa , Takamasa Usui , Hayato Nasu , Masaki Yoshimaru
发明人： Junichi Koike , Makoto Wada , Shingo Takahashi , Noriyoshi Shimizu , Hideki Shibata , Satoshi Nishikawa , Takamasa Usui , Hayato Nasu , Masaki Yoshimaru
IPC分类号： H01L21/4763
CPC分类号： H01L21/76844 , H01L21/76831 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76867 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.
摘要翻译：一种制造半导体器件的方法，包括在设置在半导体衬底上的层间绝缘膜中形成开口，形成含有预定金属元素的辅助膜，以覆盖开口的内表面，形成主膜以填充开口在形成辅助膜之后，主膜含有用作互连主层的材料的Cu，并且在形成主膜之前或之后进行热处理，从而扩散辅助膜的预定金属元素在面向辅助膜的层间绝缘膜的表面上，以在开口内的层间绝缘膜上形成阻挡膜，所述阻挡膜以预定的金属元素与成分元素为主要成分，的层间绝缘膜。

8. 发明申请

US20050167153A1 Spacer, printed circuit board, and electronic equipment 失效
标题翻译：隔板，印刷电路板和电子设备
公开(公告)号：US20050167153A1
公开(公告)日：2005-08-04
申请号：US10849523
申请日：2004-05-20
申请人： Yoshinori Uzuka , Masahiro Suzuki , Takeshi Nishiyama , Masaki Yoshimaru , Hirotoshi Muraishi
发明人： Yoshinori Uzuka , Masahiro Suzuki , Takeshi Nishiyama , Masaki Yoshimaru , Hirotoshi Muraishi
IPC分类号： H05K1/18 , H01G5/10 , H05K3/30
CPC分类号： H05K3/303 , H05K3/301 , H05K2201/0133 , H05K2201/10734 , H05K2203/0182 , Y02P70/613
摘要： The spacer is formed as an elastic member with no ends thereof, which is detachably attached, by exploiting its elastic deformation, onto a printed wiring board to which is fixed an electronic component having a component package, on one of whose surfaces connection terminals are arranged. Since the spacer is attached on the printed wiring board to enclose an electronic component so as to seal a gap formed between the electronic component and a printed wiring board, it is possible to prevent foreign objects entering the gap, so that failures, such as insufficient insulation, caused by such foreign objects are also prevented. Since the spacer is easily removed from the printed wiring board, it is recyclable and economical.
摘要翻译：间隔件形成为弹性构件，其无端部，通过利用其弹性变形可拆卸地附接到固定有具有部件封装的电子部件的印刷电路板上，其中一个表面上连接端子被布置。由于间隔件附着在印刷电路板上以包围电子部件以便密封形成在电子部件和印刷电路板之间的间隙，因此可以防止异物进入间隙，使得诸如不足的故障也防止了由这种异物引起的绝缘。由于间隔物容易从印刷线路板上移除，所以可回收利用和经济。

9. 发明授权

US06391797B1 Method of manufacturing semiconductor device by sputtering dielectric forming materials while selectively heating growing layer 失效
标题翻译：通过溅射电介质形成材料制造半导体器件的方法，同时选择性地加热生长层
公开(公告)号：US06391797B1
公开(公告)日：2002-05-21
申请号：US08923246
申请日：1997-09-04
申请人： Shinobu Takehiro , Satoshi Yamauchi , Masaki Yoshimaru
发明人： Shinobu Takehiro , Satoshi Yamauchi , Masaki Yoshimaru
IPC分类号： H01L2120
CPC分类号： H01L21/02197 , H01L21/02266 , H01L21/31691 , H01L28/55
摘要： A method of manufacturing a semiconductor device, comprises the following steps of growing a dielectric film made of a dielectric material whose dielectric constant is improved by crystallization thereof, on a semiconductor substrate to utilize the dielectric film as a capacitor film, and applying a voltage to the semiconductor substrate in a plasma atmosphere to increase a grown interface temperature by “dielectric heating” upon growth of the dielectric film
摘要翻译：一种制造半导体器件的方法，包括以下步骤：在半导体衬底上生长由电介质材料制成的电介质材料，其介电常数通过结晶而改善，以利用电介质膜作为电容器膜，并将电压施加到半导体衬底在等离子体气氛中，通过在电介质膜生长时通过“电介质加热”来增加生长的界面温度

10. 发明授权

US08963124B2 Semiconductor device including a plurality of different functional elements and method of manufacturing the same 有权
标题翻译：包括多个不同功能元件的半导体器件及其制造方法
公开(公告)号：US08963124B2
公开(公告)日：2015-02-24
申请号：US12405505
申请日：2009-03-17
申请人： Masanobu Miyao , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
发明人： Masanobu Miyao , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
IPC分类号： H01L29/06 , H01L31/00 , H01L27/06 , H01L21/02 , H01L29/66
CPC分类号： H01L27/0617 , H01L21/02672 , H01L29/66984
摘要： At least first and second Si1-xGex (0≦x≦1) layers are formed on an insulating film. At least first and second material layers are formed correspondingly to the at least first and second Si1-xGex (0≦x≦1) layers. A lattice constant of the first Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the first material layer. A lattice constant of the second Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the second material layer.
摘要翻译：在绝缘膜上形成至少第一和第二Si1-xGex（0＆nlE; x＆lt; 1; 1）层。至少第一和第二材料层对应于至少第一和第二Si1-xGex（0＆amp; n1; x＆amp; l1; 1）层形成。第一Si1-xGex（0＆nlE; x＆nlE; 1）层的晶格常数与第一材料层的晶格常数相匹配。第二Si1-xGex（0＆nlE; x＆nlE; 1）层的晶格常数与第二材料层的晶格常数相匹配。

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