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1. 发明申请

US20090236587A1 SEMICONDUCTOR DEVICE INCLUDING A PLURALITY OF DIFFERENT FUNCTIONAL ELEMENTS AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：包括不同功能元件的多项式的半导体器件及其制造方法
公开(公告)号：US20090236587A1
公开(公告)日：2009-09-24
申请号：US12405505
申请日：2009-03-17
申请人： Masanobu MIYAO , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
发明人： Masanobu MIYAO , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
IPC分类号： H01L29/15 , H01L21/20
CPC分类号： H01L27/0617 , H01L21/02672 , H01L29/66984
摘要： At least first and second Si1-xGex (0≦x≦1) layers are formed on an insulating film. At least first and second material layers are formed correspondingly to the at least first and second Si1-xGex (0≦x≦1) layers. A lattice constant of the first Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the first material layer. A lattice constant of the second Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the second material layer.
摘要翻译：在绝缘膜上形成至少第一和第二Si1-xGex（0 <= x <= 1）层。至少第一和第二材料层对应于至少第一和第二Si1-xGex（0 <= x <= 1）层形成。第一Si1-xGex（0 <= x <= 1）层的晶格常数与第一材料层的晶格常数相匹配。第二Si1-xGex（0 <= x <= 1）层的晶格常数与第二材料层的晶格常数相匹配。

2. 发明授权

US08963124B2 Semiconductor device including a plurality of different functional elements and method of manufacturing the same 有权
标题翻译：包括多个不同功能元件的半导体器件及其制造方法
公开(公告)号：US08963124B2
公开(公告)日：2015-02-24
申请号：US12405505
申请日：2009-03-17
申请人： Masanobu Miyao , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
发明人： Masanobu Miyao , Hiroshi Nakashima , Taizoh Sadoh , Ichiro Mizushima , Masaki Yoshimaru
IPC分类号： H01L29/06 , H01L31/00 , H01L27/06 , H01L21/02 , H01L29/66
CPC分类号： H01L27/0617 , H01L21/02672 , H01L29/66984
摘要： At least first and second Si1-xGex (0≦x≦1) layers are formed on an insulating film. At least first and second material layers are formed correspondingly to the at least first and second Si1-xGex (0≦x≦1) layers. A lattice constant of the first Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the first material layer. A lattice constant of the second Si1-xGex (0≦x≦1) layer is matched with a lattice constant of the second material layer.
摘要翻译：在绝缘膜上形成至少第一和第二Si1-xGex（0＆nlE; x＆lt; 1; 1）层。至少第一和第二材料层对应于至少第一和第二Si1-xGex（0＆amp; n1; x＆amp; l1; 1）层形成。第一Si1-xGex（0＆nlE; x＆nlE; 1）层的晶格常数与第一材料层的晶格常数相匹配。第二Si1-xGex（0＆nlE; x＆nlE; 1）层的晶格常数与第二材料层的晶格常数相匹配。

3. 发明授权

US07767548B2 Method for manufacturing semiconductor wafer including a strained silicon layer 有权
标题翻译：包括应变硅层的半导体晶片的制造方法
公开(公告)号：US07767548B2
公开(公告)日：2010-08-03
申请号：US11840615
申请日：2007-08-17
申请人： Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
发明人： Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A method for manufacturing a semiconductor wafer with a strained Si layer having sufficient tensile strain and few crystal defects, while achieving a relatively simple layered structure, is provided. The method includes the steps of: (a) forming an SiGe mixed crystal layer 12 and a first Si layer 13 in this order on the surface of a silicon wafer 11; (b) forming an SiO2 layer 16 on top of the first Si layer and/or a support wafer 14; (c) forming a layered product 17 by stacking the silicon wafer and the support wafer with the SiO2 layer being placed therebetween; (d) forming a second Si layer 18 by thinning the silicon wafer of the layered product; (e) implanting hydrogen ion and/or rare gas ion, such that ionic concentration peaks in a predetermined area; (f) subjecting the layered product to a first heat treatment; and (g) carrying out a second heat treatment following the first heat treatment, thereby relaxing the SiGe mixed crystal layer and diffusing Ge through portions of the first Si layer and the second Si layer.
摘要翻译：本发明提供一种制造半导体晶片的方法，该半导体晶片具有具有足够的拉伸应变和很少的晶体缺陷的应变Si层，同时实现相对简单的分层结构。该方法包括以下步骤：（a）在硅晶片11的表面上依次形成SiGe混晶层12和第一Si层13; （b）在第一Si层和/或支撑晶片14的顶部上形成SiO2层16; （c）通过将硅晶片和支撑晶片叠置在其间的SiO 2层来形成层叠体17; （d）通过使层叠体的硅晶片变薄来形成第二Si层18; （e）植入氢离子和/或稀有气体离子，使得离子浓度在预定区域中峰值; （f）对层叠体进行第一次热处理; 和（g）在第一热处理之后进行第二热处理，从而使SiGe混晶层松弛，并通过第一Si层和第二Si层的一部分扩散Ge。

4. 发明申请

US20090047526A1 Method for Manufacturing Semiconductor Wafer 有权
标题翻译：半导体晶片制造方法
公开(公告)号：US20090047526A1
公开(公告)日：2009-02-19
申请号：US11840615
申请日：2007-08-17
申请人： Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
发明人： Masaharu Ninomiya , Koji Matsumoto , Masahiko Nakamae , Masanobu Miyao , Taizoh Sadoh
IPC分类号： H01L21/20 , B32B9/04
CPC分类号： H01L21/76254
摘要： A method for manufacturing a semiconductor wafer with a strained Si layer having sufficient tensile strain and few crystal defects, while achieving a relatively simple layered structure, is provided. The method includes the steps of: (a) forming an SiGe mixed crystal layer 12 and a first Si layer 13 in this order on the surface of a silicon wafer 11; (b) forming an SiO2 layer 16 on top of the first Si layer and/or a support wafer 14; (c) forming a layered product 17 by stacking the silicon wafer and the support wafer with the SiO2 layer being placed therebetween; (d) forming a second Si layer 18 by thinning the silicon wafer of the layered product; (e) implanting hydrogen ion and/or rare gas ion, such that ionic concentration peaks in a predetermined area; (f) subjecting the layered product to a first heat treatment; and (g) carrying out a second heat treatment following the first heat treatment, thereby relaxing the SiGe mixed crystal layer and diffusing Ge through portions of the first Si layer and the second Si layer.
摘要翻译：本发明提供一种制造半导体晶片的方法，该半导体晶片具有具有足够的拉伸应变和很少的晶体缺陷的应变Si层，同时实现相对简单的分层结构。该方法包括以下步骤：（a）在硅晶片11的表面上依次形成SiGe混晶层12和第一Si层13; （b）在第一Si层和/或支撑晶片14的顶部上形成SiO2层16; （c）通过将硅晶片和支撑晶片叠置在其间的SiO 2层来形成层叠体17; （d）通过使层叠体的硅晶片变薄来形成第二Si层18; （e）植入氢离子和/或稀有气体离子，使得离子浓度在预定区域中峰值; （f）对层叠体进行第一次热处理; 和（g）在第一热处理之后进行第二热处理，从而使SiGe混晶层松弛，并通过第一Si层和第二Si层的一部分扩散Ge。

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