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1. 发明授权

US06407457B1 Contact-bumpless chip contacting method and an electronic circuit produced by said method 有权
标题翻译：接触不平坦的芯片接触方法和通过所述方法制造的电子电路
公开(公告)号：US06407457B1
公开(公告)日：2002-06-18
申请号：US09704131
申请日：2000-11-01
申请人： Rolf Aschenbrenner , Elke Zakel , Hans-Hermann Oppermann , Ghassem Azdasht
发明人： Rolf Aschenbrenner , Elke Zakel , Hans-Hermann Oppermann , Ghassem Azdasht
IPC分类号： H01L2348
CPC分类号： H01L21/563 , H01L24/29 , H01L2224/73203 , H01L2224/83192 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/07802 , H01L2924/14 , H01L2924/3512 , H01L2924/00
摘要： An electronic contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with a chip to be contacted in such away that a plurality of conductive contact areas on said chip to be contacted is in alignment with the connecting sections on the first surface of said carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.
摘要翻译：提供一种电子接触方法，用于接触具有多个不具有附加金属化层的导电接触区域的芯片，载体基板，其具有布置有多个导电连接部分的第一表面。在载体基板的第一表面上布置非导电粘合剂层，随后将载体基板与待接触的芯片对准，使得待接触的所述芯片上的多个导电接触区域与所述载体基板的第一表面上的连接部分。然后，载体衬底通过粘合剂层连接到芯片上以使得载体衬底的连接部分和芯片的接触区域通过压力接触彼此抵接，而没有任何金属间化合物建立连接。

2. 发明授权

US6107118A Chip-contacting method requiring no contact bumps, and electronic circuit produced in this way 失效
标题翻译：不需要接触凸块的芯片接触方法和以这种方式制造的电子电路
公开(公告)号：US6107118A
公开(公告)日：2000-08-22
申请号：US11570
申请日：1998-05-18
申请人： Rolf Aschenbrenner , Elke Zakel , Hans-Hermann Oppermann , Ghassem Azdasht
发明人： Rolf Aschenbrenner , Elke Zakel , Hans-Hermann Oppermann , Ghassem Azdasht
IPC分类号： H01L21/58 , H01L21/60 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/83 , H01L24/29 , H01L24/81 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81801 , H01L2224/83192 , H01L2224/8385 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01043 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/07802 , H01L2924/14
摘要： In a contact-bumpless chip contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with the chip to be contacted such that a plurality of conductive contact areas on the chip to be contacted is in alignment with the connecting sections on the first surface of the carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.
摘要翻译： PCT No.PCT / EP96 / 03351 Sec。 371日期1998年5月18日 102（e）日期1998年5月18日PCT提交1996年7月30日PCT公布。公开号WO97 / 06557 日期：1997年2月20日在接触不牢度的芯片接触方法中，用于接触具有多个不具有附加金属化层的导电接触区域的芯片，提供载体基板，其具有布置在其上的第一表面多个导电连接部。在载体基板的第一表面上布置非导电粘合剂层，随后将载体基板与要接触的芯片对准，使得要接触的芯片上的多个导电接触区域与连接载体基板的第一表面上的部分。然后，载体衬底通过粘合剂层连接到芯片上以使得载体衬底的连接部分和芯片的接触区域通过压力接触彼此抵接，而没有任何金属间化合物建立连接。

3. 发明授权

US06281577B1 Chips arranged in plurality of planes and electrically connected to one another 失效
标题翻译：布置在多个平面中并彼此电连接的芯片
公开(公告)号：US06281577B1
公开(公告)日：2001-08-28
申请号：US08847961
申请日：1997-04-22
申请人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
发明人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
IPC分类号： H01L2334
CPC分类号： H01L25/0657 , H01L25/0652 , H01L2225/06517 , H01L2225/06551 , H01L2225/06555 , H01L2225/06575 , H01L2225/06579 , H01L2924/0002 , H01L2924/00
摘要： Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged either transverse to the longitudinal extent of the carrier substrate or parallel to the longitudinal extent of the flexibly constructed carrier substrate, as well as a spatial chip arrangement that is formed by means of this process.
摘要翻译：用于形成具有布置在多个平面中并彼此电连接的多个芯片（32,36,37,38,39）的空间芯片布置的工艺，其中芯片经由其外围连接表面（33）连接到分配通过芯片布置在至少一个载体基板（21,22）上的导电通路结构（24,25）的导电路径（23）横向于载体基板的纵向延伸或平行于灵活构造的载体衬底，以及通过该工艺形成的空间芯片布置。

4. 发明授权

US07087442B2 Process for the formation of a spatial chip arrangement and spatial chip arrangement 有权
标题翻译：用于形成空间芯片布置和空间芯片布置的过程
公开(公告)号：US07087442B2
公开(公告)日：2006-08-08
申请号：US09962553
申请日：2001-09-24
申请人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
发明人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
IPC分类号： G01R31/26 , H01L21/66 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L25/0657 , H01L25/0652 , H01L2225/06517 , H01L2225/06551 , H01L2225/06555 , H01L2225/06575 , H01L2225/06579 , H01L2924/0002 , H01L2924/00
摘要： Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged transverse to the longitudinal extent of the carrier substrate.
摘要翻译：用于形成具有布置在多个平面中并彼此电连接的多个芯片（32,36,37,38,39）的空间芯片布置的工艺，其中芯片经由其外围连接表面（33）连接到分配通过所述芯片布置在至少一个载体基板（21,22）上的导电通路结构（24,25）的导电路径（23）横向于所述载体基板的纵向延伸。

5. 发明授权

US6093971A Chip module with conductor paths on the chip bonding side of a chip carrier 失效
标题翻译：在芯片载体的芯片接合侧具有导体路径的芯片模块
公开(公告)号：US6093971A
公开(公告)日：2000-07-25
申请号：US850547
申请日：1997-05-02
申请人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
发明人： Hans-Hermann Oppermann , Elke Zakel , Ghassem Azdasht , Paul Kasulke
IPC分类号： H01L23/12 , H01L21/56 , H01L23/498 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/83 , H01L21/563 , H01L23/49827 , H01L23/4985 , H01L24/29 , H01L2224/1147 , H01L2224/11474 , H01L2224/11902 , H01L2224/13022 , H01L2224/13611 , H01L2224/16237 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/73203 , H01L2224/83102 , H01L2224/83191 , H01L2224/838 , H01L2224/92125 , H01L2924/00014 , H01L2924/01004 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/12042 , H01L2924/15173 , H01L2924/1579
摘要： Chip module (20) with a chip carrier (21) and at least one chip (22), wherein the chip carrier is designed as a sheet with a carrier layer (23) of plastics material and a conductor path structure (24) with conductor paths (28), and the chip carrier is connected to the chip with interposition of a filling material (37), wherein the conductor paths are connected on their front to attachment faces (32) of the chip and, on their rear side (27), have external bonding regions (26) for forming a flatly distributed attachment face arrangement (34) for the connection of the chip module to an electronic component or a substrate (31), and the conductor paths (28) extend in a plane on the chip bonding side (35) of the carrier layer (23) facing the chip (22), the external bonding regions (26) are formed by recesses in the carrier layer (23) which extend toward the rear side (27) of the conductor paths (28) and the carrier layer (23) extends over the region of the attachment faces (30) of the chip.
摘要翻译：具有芯片载体（21）和至少一个芯片（22）的芯片模块（20），其中所述芯片载体被设计为具有塑料材料的载体层（23）的片材和具有导体的导体路径结构（24）路径（28），并且芯片载体通过插入填充材料（37）连接到芯片，其中导体路径在其前部连接到芯片的附接面（32），并且在它们的后侧（27 ）具有用于形成用于将芯片模块连接到电子部件或基板（31）的平坦分布的附接面布置（34）的外部接合区域（26），并且导体路径（28）在载体层（23）的与芯片（22）相对的芯片接合侧（35），外部接合区域（26）由载体层（23）中的凹部形成，该凹部沿着导体路径（28）和载体层（23）在芯片的附接面（30）的区域上延伸。

6. 发明授权

US06284639B1 Method for forming a structured metallization on a semiconductor wafer 有权
标题翻译：在半导体晶片上形成结构化金属化的方法
公开(公告)号：US06284639B1
公开(公告)日：2001-09-04
申请号：US09367462
申请日：1999-10-25
申请人： Rolf Aschenbrenner , Ghassem Azdasht , Elke Zakel , Andreas Ostmann , Gerald Motulla
发明人： Rolf Aschenbrenner , Ghassem Azdasht , Elke Zakel , Andreas Ostmann , Gerald Motulla
IPC分类号： H01L2144
CPC分类号： H01L24/13 , H01L23/522 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01061 , H01L2924/01068 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00014
摘要： The present invention relates to a method of forming a structured metallization on a semiconductor wafer, wherein a main surface of the wafer has a passivation layer applied thereto, which is structured so as to determine at least one bond pad. Initially, a metal bump is produced on the at least one bond pad. An activated dielectric is then produced on the areas of the passivation layer on which the structured metallization is to be formed. Finally, metal is chemically deposited directly on the activated dielectric and on the metal bump in such a way that the structured metallization formed on the activated dielectric and the metal chemically deposited on the metal bump are electro-conductively joined.
摘要翻译：本发明涉及一种在半导体晶片上形成结构化金属化的方法，其中晶片的主表面具有施加到其上的钝化层，其被构造成确定至少一个焊盘。最初，在至少一个接合焊盘上产生金属凸块。然后在其上将形成结构化金属化的钝化层的区域上产生活化的电介质。最后，将金属直接化学沉积在活化的电介质和金属凸块上，使得形成在活化的电介质上的结构化金属化物和化学沉积在金属凸块上的金属被电导接合。

7. 发明授权

US07882997B2 Method and device for mutual contacting of two wafers 有权
标题翻译：两片晶片相互接触的方法和装置
公开(公告)号：US07882997B2
公开(公告)日：2011-02-08
申请号：US11572105
申请日：2005-07-11
申请人： Elke Zakel , Ghassem Azdasht
发明人： Elke Zakel , Ghassem Azdasht
IPC分类号： B23K37/04
CPC分类号： H01L24/26 , H01L24/80 , H01L24/83 , H01L25/50 , H01L2224/83224 , H01L2224/83801 , H01L2924/01015 , H01L2924/01033 , H01L2924/01057 , H01L2924/19043
摘要： A method and a device for the mutual contacting of two wafer-type component composite configurations made of multiple identical components which are implemented coherently, in particular a semiconductor wafer (12) with a functional component wafer (14), to produce electronic assemblies on the wafer level, in which the component composite configurations are each situated on a receptacle unit (11; 13) and the contact pressure necessary for the contacting between contact metallizations of the component composite configurations to be connected to one another is generated in such a way that a vacuum is generated in a contact chamber which receives the component composite configurations and is delimited by the receptacle units, and the contacting of the contact metallizations is performed by a rear energy impingement of a component composite configuration.
摘要翻译：一种用于相互接触的两个晶片型部件复合结构相互接触的方法和装置，所述两个晶片型部件复合结构由相干地实现的多个相同部件，特别是具有功能部件晶片（14）的半导体晶片（12）制成，以在其上产生电子组件晶片级，其中部件复合结构各自位于插座单元（11; 13）上，并且以相互连接的部件复合结构的接触金属化之间的接触所需的接触压力被产生，使得在接收室中产生真空，该接触室接收组件复合结构，并由容器单元限定，并且接触金属化的接触通过组件复合构造的后能量冲击来执行。

8. 发明申请

US20070272991A1 Method And Device For Alternately Contacting Two Wafers 有权
标题翻译：用于交替接触两个晶片的方法和装置
公开(公告)号：US20070272991A1
公开(公告)日：2007-11-29
申请号：US10581819
申请日：2004-12-02
申请人： Elke Zakel , Ghassem Azdasht
发明人： Elke Zakel , Ghassem Azdasht
IPC分类号： H01L21/00 , B23K1/00 , H01L29/66
CPC分类号： H01L23/10 , B23K26/57 , B23K35/262 , B23K35/3013 , B23K2101/40 , H01L21/50 , H01L25/0657 , H01L25/50 , H01L2224/16 , H01L2924/01079
摘要： A method and device for alternately contacting two wafer-like component composite arrangements (12, 14) consisting of a plurality of cohesively designed similar components, in particular of a semiconductor wafer with a function component wafer for manufacturing electronic modules on a wafer level, in which the two component composite arrangements, each provided with contact metallizations on their opposing contact surfaces (38, 39), are brought into a coverage position with their contact metallizations to form contact pairs, in which position the contact metallizations that are to be joined together are pressed against one another, the contact metallizations being thereby contacted by exposing the rear of one of the component composite arrangements (12) to laser radiation (20), the wavelength of the laser radiation being selected as a function of the degree of absorption of the component composite arrangement exposed to laser radiation at the rear, so that a transmission of the laser radiation through the component composite arrangement exposed to the laser radiation at the rear is essentially suppressed or an absorption of the laser radiation takes place essentially in the contact metallizations of one or both component composite arrangements.
摘要翻译：交替地接触由多个内聚设计的类似部件组成的两个晶片状部件复合布置（12,14）的方法和装置，特别是具有用于在晶片级上制造电子模块的功能元件晶片的半导体晶片，其中每个在其相对的接触表面（38,39）上设置有接触金属化的双组分复合布置通过它们的接触金属化进入覆盖位置，以形成接触对，在该位置上将要接合在一起的接触金属化因此，通过将组件复合装置（12）中的一个的后部暴露于激光辐射（20），接触金属化从而接触，激光辐射的波长被选择为吸收程度的函数组件复合布置暴露在后面的激光辐射，使得传输通过暴露于后方的激光辐射的组分复合布置的激光辐射基本上被抑制，或者激光辐射的吸收基本上在一个或两个组件复合布置的接触金属化中发生。

9. 发明授权

US06915940B2 Device for applying solder globules 失效
标题翻译：焊球应用装置
公开(公告)号：US06915940B2
公开(公告)日：2005-07-12
申请号：US10474450
申请日：2002-04-12
申请人： Elke Zakel , Ghassem Azdasht
发明人： Elke Zakel , Ghassem Azdasht
IPC分类号： B23K3/06 , B23K101/42 , H05K3/34 , B23K1/00 , B23K5/00 , B23K20/14 , B23K37/00
CPC分类号： B23K3/0607 , B23K3/0623 , B23K2101/36 , H05K3/3478
摘要： An apparatus for applying solder balls to a substrate and for remelting the solder balls on soldering points of the substrate has a capillary for supplying a solder ball to the soldering points and for placing the solder ball at the free end of the capillary opposite the soldering point, a means for supplying heat to the solder ball to remelt it, and a pressing apparatus for holding down the substrate to prevent the substrate from being resilient when placing and remelting the solder ball.
摘要翻译：用于将焊球用于衬底并在衬底的焊接点上重新焊接焊球的设备具有毛细管，用于将焊球提供给焊接点，并将焊球放置在与焊接点相对的毛细管自由端处用于向焊球供热以重新熔化的装置，以及用于按压衬底以防止衬底在放置和重熔焊球时具有弹性的按压装置。

10. 发明授权

US09401298B2 Method and device for transferring a chip to a contact substrate 有权
标题翻译：将芯片转移到接触衬底的方法和装置
公开(公告)号：US09401298B2
公开(公告)日：2016-07-26
申请号：US11910771
申请日：2006-04-10
申请人： Elke Zakel , Ghassem Azdasht
发明人： Elke Zakel , Ghassem Azdasht
IPC分类号： H01L21/683 , H01L21/687 , H01L21/67 , H01L23/00
CPC分类号： H01L21/6835 , H01L21/67132 , H01L21/67144 , H01L21/6836 , H01L24/31 , H01L24/75 , H01L24/83 , H01L24/86 , H01L2221/68327 , H01L2221/68354 , H01L2224/16 , H01L2224/2929 , H01L2224/293 , H01L2224/75 , H01L2224/75263 , H01L2224/75314 , H01L2224/7565 , H01L2224/7965 , H01L2224/81005 , H01L2224/81224 , H01L2224/81801 , H01L2224/83192 , H01L2224/83851 , H01L2924/01006 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/19043 , H01L2924/00014
摘要： A method and device for transferring a chip (18) situated on a transfer substrate (26) to a contact substrate (50), and for contacting the chip with the contact substrate, in which the chip, the back side (19) of which is attached adhesively to a support surface of the transfer substrate facing the contact substrate, is charged with laser energy from behind through the transfer substrate, and the chip contacts (59, 60) thereof that are arranged opposite a contact surface (58) of the contact substrate are brought into contact with substrate contacts (56, 57) arranged on the contact surface by means of a pressing device (45, 46) from behind through the transfer substrate, and a thermal bond is created between the chip contacts and the substrate contacts.
摘要翻译：一种用于将位于转印衬底（26）上的芯片（18）转移到接触衬底（50）并将芯片与接触衬底接触的方法和装置，其中芯片的背面（19）被粘附到转移基板的面向接触基板的支撑表面上，从后面通过转印基板充满激光能量，并且其与芯片接触（59,60）相对地设置在与基板的接触表面（58）相对的位置接触基板通过从后面通过转印基板的加压装置（45,46）与布置在接触表面上的基板触点（56,57）接触，并且在芯片触头和基板之间产生热粘合联系人

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