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    • 3. 发明授权
    • Semiconductor device with improved immunity to contact and conductor
defects
    • 具有改善的抗接触和导体缺陷的半导体器件
    • US5481137A
    • 1996-01-02
    • US246375
    • 1994-05-18
    • Shigeru HaradaHisao MasudaReiji Tamaki
    • Shigeru HaradaHisao MasudaReiji Tamaki
    • H01L23/532H01L23/48H01L29/34H01L29/46H01L29/62
    • H01L23/53219H01L23/532H01L2924/0002
    • In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the purpose of protecting and stabilizing the surface of the semiconductor substrate, and an interconnection electrically connected to the impurity diffused layer through a contact hole and formed on an Al-Si-Sn alloy, an Al-Si-Sb alloy or alloys having Ti added to the respective alloys, so that occurrence of an alloy pit and a silicon nodule is prevented. In addition, a completed protective film is formed on the interconnection and the underlayer insulating film and an aperture in a bonding pad region is formed in a predetermined region of the completed protective film, so that the interconnection and the bonding pad are electrically connected to each other. The proportion of silicon and other materials in the alloy are controlled to simultaneously avoid alloy pit and silicon nodule defects both at the contact hole and throughout the alloy conductor.
    • 在半导体器件中,在硅的半导体衬底的表面的预定区域中形成用作有源区的杂质扩散层,为了保护和稳定表面的目的,在半导体衬底上形成下层绝缘膜 半导体衬底以及通过接触孔与杂质扩散层电连接并且在Al-Si-Sn合金,Al-Si-Sb合金或其合金上添加有Ti的合金形成的互连,从而发生 防止了合金凹坑和硅结节。 此外,在互连和下层绝缘膜上形成完整的保护膜,并且在完成的保护膜的预定区域中形成焊盘区域中的孔,使得互连和焊盘与每个 其他。 控制合金中硅和其他材料的比例,以同时避免接触孔和整个合金导体中的合金凹坑和硅结节缺陷。
    • 4. 发明授权
    • Semiconductor device with improved immunity to contact and conductor
defects
    • 具有改善的抗接触和导体缺陷的半导体器件
    • US5260604A
    • 1993-11-09
    • US508507
    • 1990-04-12
    • Shigeru HaradaHisao MasudaReiji Tamaki
    • Shigeru HaradaHisao MasudaReiji Tamaki
    • H01L23/532H02L23/48
    • H01L23/53219H01L23/532H01L2924/0002
    • In a semiconductor device, an impurity diffused layer serving as an active region is formed in a predetermined region of the surface of a semiconductor substrate of silicon, an underlayer insulating film is formed on the semiconductor substrate for the purpose of protecting and stabilizing the surface of the semiconductor substrate, and an interconnection electrically connected to the impurity diffused layer through a contact hole and formed on an Al-Si-Sn alloy, an Al-Si-Sb alloy or alloys having Ti added to the respective alloys, so that occurrence of an alloy pit and a silicon nodule is prevented. In addition, a completed protective film is formed on the interconnection and the underlayer insulating film and an aperture in a bonding pad region is formed in a predetermined region of the completed protective film, so that the interconnection and the bonding pad are electrically connected to each other. The proportion of silicon and other materials in the alloy are controlled to simultaneously avoid alloy pit and silicon nodule defects both at the contact hole and throughout the alloy conductor.
    • 在半导体器件中,在硅的半导体衬底的表面的预定区域中形成用作有源区的杂质扩散层,为了保护和稳定表面的目的,在半导体衬底上形成下层绝缘膜 半导体衬底以及通过接触孔与杂质扩散层电连接并且在Al-Si-Sn合金,Al-Si-Sb合金或其合金上添加有Ti的合金形成的互连,从而发生 防止了合金凹坑和硅结节。 此外,在互连和下层绝缘膜上形成完整的保护膜,并且在完成的保护膜的预定区域中形成焊盘区域中的孔,使得互连和焊盘与每个 其他。 控制合金中硅和其他材料的比例,以同时避免接触孔和整个合金导体中的合金凹坑和硅结节缺陷。
    • 7. 发明授权
    • Semiconductor device and method for making the same
    • 半导体装置及其制造方法
    • US4884120A
    • 1989-11-28
    • US16787
    • 1987-02-20
    • Hiroshi MochizukiReiji TamakiJunichi ArimaMasaaki IkegamiEisuke TanakaKenji Saito
    • Hiroshi MochizukiReiji TamakiJunichi ArimaMasaaki IkegamiEisuke TanakaKenji Saito
    • H01L23/522H01L21/28H01L21/316H01L21/768H01L27/00H01L29/49
    • H01L21/31683H01L21/7684H01L21/76877H01L21/76888
    • An improved interconnection structure and method for forming the interconnection in a semiconductor device having multilayered interconnection structure in which a contact hole for electrically connecting a first layer interconnection to a predetermined region of a semiconductor substrate and a through hole for electrically connecting a second layer interconnection to the first layer interconnection are formed in the regions overlapping with each other in planer layout. In the interconnection structure of the present invention, hillocks effective to compensate for the contact hole step are formed in the first layer interconnection only in the region of the contact hole of the first layer interconnection. In the method for forming the interconnection according to the present invention, a first layer interconnection is formed and a chemical conversion process is selectively performed to form a film which is more rigid than the first layer interconnection film on a predetermined region of the first layer interconnection film, and then a heat process is performed to generate hillocks only at the region of the contact hole of the first layer interconnection film. The second layer interconnection film is formed thereafter.
    • 一种用于在具有多层互连结构的半导体器件中形成互连的改进的互连结构和方法,其中用于将第一层互连电连接到半导体衬底的预定区域的接触孔和用于将第二层互连电连接到 第一层互连形成在以平面布置彼此重叠的区域中。 在本发明的互连结构中,仅在第一层互连的接触孔的区域中,在第一层互连中形成有效补偿接触孔台阶的小丘。 在根据本发明的形成互连的方法中,形成第一层互连,并且选择性地执行化学转换处理以在第一层互连的预定区域上形成比第一层互连膜更刚性的膜 膜,然后进行热处理,仅在第一层互连膜的接触孔的区域产生小丘。 此后形成第二层互连膜。