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1. 发明授权

US07176531B1 CMOS gates formed by integrating metals having different work functions and having a high-k gate dielectric 有权
标题翻译：通过集成具有不同功函数并且具有高k栅极电介质的金属形成的CMOS栅极
公开(公告)号：US07176531B1
公开(公告)日：2007-02-13
申请号：US11020990
申请日：2004-12-22
申请人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison K. Holbrook , Joong S. Jeon , George J. Kluth
发明人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison K. Holbrook , Joong S. Jeon , George J. Kluth
IPC分类号： H01L29/76
CPC分类号： H01L21/823857 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518
摘要： According to one exemplary embodiment, a method for integrating first and second metal layers on a substrate to form a dual metal NMOS gate and PMOS gate comprises depositing a dielectric layer over an NMOS region and a PMOS region of the substrate. The method further comprises depositing the first metal layer over dielectric layer. The method further comprises depositing the second metal layer over the first metal layer. The method further comprises implanting nitrogen in the NMOS region of substrate and converting a first portion of the first metal layer into a metal oxide layer and converting a second portion of the first metal layer into metal nitride layer. The method further comprises forming the NMOS gate and the PMOS gate, where the NMOS gate comprises a segment of metal nitride layer and the PMOS gate comprises a segment of the metal oxide layer.
摘要翻译：根据一个示例性实施例，一种用于在衬底上将第一和第二金属层集成以形成双金属NMOS栅极和PMOS栅极的方法包括在衬底的NMOS区域和PMOS区域上沉积介电层。该方法还包括在电介质层上沉积第一金属层。该方法还包括在第一金属层上沉积第二金属层。该方法还包括在衬底的NMOS区域中注入氮气，并将第一金属层的第一部分转变为金属氧化物层，并将第一金属层的第二部分转换为金属氮化物层。该方法还包括形成NMOS栅极和PMOS栅极，其中NMOS栅极包括金属氮化物层的一部分，PMOS栅极包括金属氧化物层的一部分。

2. 发明授权

US06872613B1 Method for integrating metals having different work functions to form CMOS gates having a high-k gate dielectric and related structure 有权
标题翻译：用于形成具有不同功函数的金属以形成具有高k栅极电介质和相关结构的CMOS栅极的方法
公开(公告)号：US06872613B1
公开(公告)日：2005-03-29
申请号：US10654689
申请日：2003-09-04
申请人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison K. Holbrook , Joong S. Jeon , George J. Kluth
发明人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison K. Holbrook , Joong S. Jeon , George J. Kluth
IPC分类号： H01L21/28 , H01L21/8238 , H01L29/49 , H01L29/51
CPC分类号： H01L21/823857 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518
摘要： According to one exemplary embodiment, a method for integrating first and second metal layers on a substrate to form a dual metal NMOS gate and PMOS gate comprises depositing a dielectric layer over an NMOS region and a PMOS region of the substrate. The method further comprises depositing the first metal layer over dielectric layer. The method further comprises depositing the second metal layer over the first metal layer. The method further comprises implanting nitrogen in the NMOS region of substrate and converting a first portion of the first metal layer into a metal oxide layer and converting a second portion of the first metal layer into metal nitride layer. The method further comprises forming the NMOS gate and the PMOS gate, where the NMOS gate comprises a segment of metal nitride layer and the PMOS gate comprises a segment of the metal oxide layer.
摘要翻译：根据一个示例性实施例，一种用于在衬底上将第一和第二金属层集成以形成双金属NMOS栅极和PMOS栅极的方法包括在衬底的NMOS区域和PMOS区域上沉积介电层。该方法还包括在电介质层上沉积第一金属层。该方法还包括在第一金属层上沉积第二金属层。该方法还包括在衬底的NMOS区域中注入氮气，并将第一金属层的第一部分转变为金属氧化物层，并将第一金属层的第二部分转换为金属氮化物层。该方法还包括形成NMOS栅极和PMOS栅极，其中NMOS栅极包括一段金属氮化物层，PMOS栅极包括金属氧化物层的一段。

3. 发明授权

US06902977B1 Method for forming polysilicon gate on high-k dielectric and related structure 失效
标题翻译：在高k电介质和相关结构上形成多晶硅栅极的方法
公开(公告)号：US06902977B1
公开(公告)日：2005-06-07
申请号：US10678445
申请日：2003-10-03
申请人： George J. Kluth , Joong S. Jeon , Qi Xiang , Huicai Zhong
发明人： George J. Kluth , Joong S. Jeon , Qi Xiang , Huicai Zhong
IPC分类号： H01L21/28 , H01L21/336 , H01L29/49 , H01L29/78
CPC分类号： H01L29/78 , H01L21/28035 , H01L21/28194 , H01L29/4925 , H01L29/517
摘要： According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate comprises a step of forming a high-k dielectric layer over the substrate. The high-k dielectric layer may be, for example, hafnium oxide or zirconium oxide. The method further comprises forming a first polysilicon layer over the high-k dielectric layer, where the first polysilicon layer is formed by utilizing a precursor does not comprise hydrogen. The first polysilicon layer can have a thickness of between approximately 50.0 Angstroms and approximately 200.0 Angstroms, for example. According to this exemplary embodiment, the method can further comprise forming a second polysilicon layer over the first polysilicon layer. The second polysilicon layer may be formed, for example, by utilizing a precursor that comprises hydrogen, where the first polysilicon layer prevents the hydrogen from interacting with the high-k dielectric layer.
摘要翻译：根据一个示例性实施例，在衬底上形成场效应晶体管的方法包括在衬底上形成高k电介质层的步骤。高k电介质层可以是例如氧化铪或氧化锆。该方法还包括在高k电介质层上形成第一多晶硅层，其中通过利用前体形成第一多晶硅层不包含氢。例如，第一多晶硅层可以具有在约50.0埃和约200.0埃之间的厚度。根据该示例性实施例，该方法还可以包括在第一多晶硅层上形成第二多晶硅层。第二多晶硅层可以例如通过利用包含氢的前体形成，其中第一多晶硅层防止氢与高k电介质层相互作用。

4. 发明授权

US06992370B1 Memory cell structure having nitride layer with reduced charge loss and method for fabricating same 有权
标题翻译：具有具有降低的电荷损失的氮化物层的存储单元结构及其制造方法
公开(公告)号：US06992370B1
公开(公告)日：2006-01-31
申请号：US10655179
申请日：2003-09-04
申请人： George J. Kluth , Robert B. Clark-Phelps , Joong S. Jeon , Huicai Zhong , Arvind Halliyal , Mark T. Ramsbey , Robert B. Ogle, Jr. , Kuo T. Chang , Wenmei Li
发明人： George J. Kluth , Robert B. Clark-Phelps , Joong S. Jeon , Huicai Zhong , Arvind Halliyal , Mark T. Ramsbey , Robert B. Ogle, Jr. , Kuo T. Chang , Wenmei Li
IPC分类号： H01L23/58 , H01L21/302
CPC分类号： H01L21/28282 , H01L21/28176 , H01L21/28202 , H01L29/513 , H01L29/518 , H01L29/66833 , H01L29/792
摘要： According to one embodiment, a memory cell structure comprises a semiconductor substrate, a first silicon oxide layer situated over the semiconductor substrate, a charge storing layer situated over the first silicon oxide layer, a second silicon oxide layer situated over the charge storing layer, and a gate layer situated over the second silicon oxide layer. In the exemplary embodiment, the charge storing layer comprises silicon nitride having reduced hydrogen content, e.g., in the range of about 0 to 0.5 atomic percent. As a result, the reduced hydrogen content reduces the charge loss in the charge storing layer. The reduced charge loss in the charge storing layer has the benefit of reducing threshold voltage shifts, programming data loss, and programming capability loss in the memory device, thereby improving memory device performance.
摘要翻译：根据一个实施例，存储单元结构包括半导体衬底，位于半导体衬底上的第一氧化硅层，位于第一氧化硅层之上的电荷存储层，位于电荷存储层上方的第二氧化硅层，以及位于所述第二氧化硅层上方的栅极层。在示例性实施例中，电荷存储层包括具有降低的氢含量的氮化硅，例如在约0至0.5原子百分比的范围内。结果，降低的氢含量降低了电荷存储层中的电荷损失。电荷存储层中的减少的电荷损失有利于减少存储器件中的阈值电压偏移，编程数据丢失和编程能力损失，从而提高存储器件性能。

5. 发明申请

US20050054149A1 METHOD FOR INTEGRATING METALS HAVING DIFFERENT WORK FUNCTIONS TO FOM CMOS GATES HAVING A HIGH-K GATE DIELECTRIC AND RELATED STRUCTURE 有权
标题翻译：具有不同工作功能的金属的方法用于具有高K栅介质和相关结构的FOM CMOS栅
公开(公告)号：US20050054149A1
公开(公告)日：2005-03-10
申请号：US10654689
申请日：2003-09-04
申请人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison Holbrook , Joong Jeon , George Kluth
发明人： Qi Xiang , Huicai Zhong , Jung-Suk Goo , Allison Holbrook , Joong Jeon , George Kluth
IPC分类号： H01L21/28 , H01L21/8238 , H01L29/49 , H01L29/51 , H01L21/336
CPC分类号： H01L21/823857 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518
摘要： According to one exemplary embodiment, a method for integrating first and second metal layers on a substrate to form a dual metal NMOS gate and PMOS gate comprises depositing a dielectric layer over an NMOS region and a PMOS region of the substrate. The method further comprises depositing the first metal layer over dielectric layer. The method further comprises depositing the second metal layer over the first metal layer. The method further comprises implanting nitrogen in the NMOS region of substrate and converting a first portion of the first metal layer into a metal oxide layer and converting a second portion of the first metal layer into metal nitride layer. The method further comprises forming the NMOS gate and the PMOS gate, where the NMOS gate comprises a segment of metal nitride layer and the PMOS gate comprises a segment of the metal oxide layer.
摘要翻译：根据一个示例性实施例，一种用于在衬底上将第一和第二金属层集成以形成双金属NMOS栅极和PMOS栅极的方法包括在衬底的NMOS区域和PMOS区域上沉积介电层。该方法还包括在电介质层上沉积第一金属层。该方法还包括在第一金属层上沉积第二金属层。该方法还包括在衬底的NMOS区域中注入氮气，并将第一金属层的第一部分转变为金属氧化物层，并将第一金属层的第二部分转换为金属氮化物层。该方法还包括形成NMOS栅极和PMOS栅极，其中NMOS栅极包括一段金属氮化物层，PMOS栅极包括金属氧化物层的一段。

6. 发明授权

US07071051B1 Method for forming a thin, high quality buffer layer in a field effect transistor and related structure 有权
标题翻译：在场效应晶体管和相关结构中形成薄的，高质量的缓冲层的方法
公开(公告)号：US07071051B1
公开(公告)日：2006-07-04
申请号：US10761009
申请日：2004-01-20
申请人： Joong S. Jeon , Robert B. Clark-Phelps , Qi Xiang , Huicai Zhong
发明人： Joong S. Jeon , Robert B. Clark-Phelps , Qi Xiang , Huicai Zhong
IPC分类号： H01L21/8238
CPC分类号： H01L21/28194 , H01L29/51 , H01L29/513 , H01L29/7833
摘要： According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate comprises a step of forming a buffer layer on the substrate, where the buffer layer comprises ALD silicon dioxide. The buffer layer can be formed by utilizing a silicon tetrachloride precursor in an atomic layer deposition process, for example. The buffer layer comprises substantially no pin-hole defects and may have a thickness, for example, that is less than approximately 5.0 Angstroms. The method further comprises forming a high-k dielectric layer over the buffer layer. The high-k dielectric layer may be, for example, hafnium oxide, zirconium oxide, or aluminum oxide. According to this exemplary embodiment, the method further comprises forming a gate electrode layer over the high-k dielectric layer. The gate electrode layer may be polycrystalline silicon, for example.
摘要翻译：根据一个示例性实施例，在衬底上形成场效应晶体管的方法包括在衬底上形成缓冲层的步骤，其中缓冲层包含ALD二氧化硅。例如，可以在原子层沉积工艺中利用四氯化硅前体形成缓冲层。缓冲层基本上不包括针孔缺陷，并且可以具有例如小于约5.0埃的厚度。该方法还包括在缓冲层上形成高k电介质层。高k电介质层可以是例如氧化铪，氧化锆或氧化铝。根据该示例性实施例，该方法还包括在高k电介质层上形成栅电极层。栅电极层例如可以是多晶硅。

7. 发明授权

US06797572B1 Method for forming a field effect transistor having a high-k gate dielectric and related structure 有权
标题翻译：用于形成具有高k栅极电介质和相关结构的场效应晶体管的方法
公开(公告)号：US06797572B1
公开(公告)日：2004-09-28
申请号：US10618273
申请日：2003-07-11
申请人： Joong S Jeon , Huicai Zhong
发明人： Joong S Jeon , Huicai Zhong
IPC分类号： H01L218242
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/78
摘要： According to one exemplary embodiment, a method for forming a field effect transistor over a substrate comprises a step of forming an interfacial oxide layer over a channel region of the substrate, where the interfacial oxide layer has a first thickness. The interfacial oxide layer can prevent a high-k element from diffusing into the channel region. The method further comprises forming an oxygen-attracting layer over the interfacial oxide layer, where the oxygen-attracting layer prevents the first thickness of the interfacial oxide layer from increasing. The oxygen-attracting layer is formed by forming a metal layer over the interfacial oxide layer, where the metal layer combines with oxygen to form a silicate. The oxygen-attracting layer may be zirconium silicate or hafnium silicate, for example. The method further comprises forming a high-k dielectric layer over the oxygen-attracting layer. The method further comprises forming a gate electrode layer over the high-k dielectric layer.
摘要翻译：根据一个示例性实施例，用于在衬底上形成场效应晶体管的方法包括在衬底的沟道区域上形成界面氧化物层的步骤，其中界面氧化物层具有第一厚度。界面氧化物层可以防止高k元素扩散到沟道区域。该方法还包括在界面氧化物层上形成吸氧层，其中吸氧层防止界面氧化物层的第一厚度增加。吸氧层通过在界面氧化物层上形成金属层而形成，其中金属层与氧结合形成硅酸盐。吸氧层可以是例如硅酸锆或硅酸铪。该方法还包括在氧吸附层上形成高k电介质层。该方法还包括在高k电介质层上形成栅电极层。

8. 发明授权

US06991990B1 Method for forming a field effect transistor having a high-k gate dielectric 有权
标题翻译：用于形成具有高k栅极电介质的场效应晶体管的方法
公开(公告)号：US06991990B1
公开(公告)日：2006-01-31
申请号：US10899955
申请日：2004-07-27
申请人： Joong S Jeon , Huicai Zhong
发明人： Joong S Jeon , Huicai Zhong
IPC分类号： H01L21/8242
CPC分类号： H01L29/513 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/78
摘要： According to one exemplary embodiment, a method for forming a field effect transistor over a substrate comprises a step of forming an interfacial oxide layer over a channel region of the substrate, where the interfacial oxide layer has a first thickness. The interfacial oxide layer can prevent a high-k element from diffusing into the channel region. The method further comprises forming an oxygen-attracting layer over the interfacial oxide layer, where the oxygen-attracting layer prevents the first thickness of the interfacial oxide layer from increasing. The oxygen-attracting layer is formed by forming a metal layer over the interfacial oxide layer, where the metal layer combines with oxygen to form a silicate. The oxygen-attracting layer may be zirconium silicate or hafnium silicate, for example. The method further comprises forming a high-k dielectric layer over the oxygen-attracting layer. The method further comprises forming a gate electrode layer over the high-k dielectric layer.
摘要翻译：根据一个示例性实施例，用于在衬底上形成场效应晶体管的方法包括在衬底的沟道区域上形成界面氧化物层的步骤，其中界面氧化物层具有第一厚度。界面氧化物层可以防止高k元素扩散到沟道区域。该方法还包括在界面氧化物层上形成吸氧层，其中吸氧层防止界面氧化物层的第一厚度增加。吸氧层通过在界面氧化物层上形成金属层而形成，其中金属层与氧结合形成硅酸盐。吸氧层可以是例如硅酸锆或硅酸铪。该方法还包括在氧吸附层上形成高k电介质层。该方法还包括在高k电介质层上形成栅电极层。

9. 发明申请

US20050101147A1 Method for integrating a high-k gate dielectric in a transistor fabrication process 审中-公开
标题翻译：在晶体管制造工艺中集成高k栅极电介质的方法
公开(公告)号：US20050101147A1
公开(公告)日：2005-05-12
申请号：US10705347
申请日：2003-11-08
申请人： Catherine Labelle , Boon-Yong Ang , Joong Jeon , Allison Holbrook , Qi Xiang , Huicai Zhong
发明人： Catherine Labelle , Boon-Yong Ang , Joong Jeon , Allison Holbrook , Qi Xiang , Huicai Zhong
IPC分类号： H01L21/28 , H01L29/51 , H01L21/302 , H01L21/461
CPC分类号： H01L21/28202 , H01L21/28176 , H01L21/28247 , H01L29/517 , H01L29/518
摘要： According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate, where the substrate includes a high-k dielectric layer situated over the substrate and a gate electrode layer situated over the high-k dielectric layer, comprises a step of etching the gate electrode layer and the high-k dielectric layer to form a gate stack, where the gate stack comprises a high-k dielectric segment situated over the substrate and a gate electrode segment situated over the high-k dielectric segment. According to this exemplary embodiment, the method further comprises performing a nitridation process on the gate stack. The nitridation process can be performed by, for example, utilizing a plasma to nitridate sidewalls of the gate stack, where the plasma comprises nitrogen. The nitridation process can cause nitrogen to enter the high-k dielectric segment and form an oxygen diffusion barrier in the high-k dielectric segment, for example.
摘要翻译：根据一个示例性实施例，一种在衬底上形成场效应晶体管的方法，其中衬底包括位于衬底上方的高k电介质层和位于高k电介质层上方的栅电极层，包括步骤蚀刻栅极电极层和高k电介质层以形成栅极叠层，其中栅极堆叠包括位于衬底上方的高k电介质段和位于高k电介质段上方的栅电极段。根据该示例性实施例，该方法还包括在栅极堆叠上执行氮化处理。氮化工艺可以通过例如利用等离子体来氮化栅堆叠的侧壁来进行，其中等离子体包括氮。例如，氮化处理可以使氮进入高k电介质段，并在高k电介质段中形成氧扩散阻挡层。

10. 发明授权

US09607877B2 Substrate structure, semiconductor device, and method for manufacturing the same 有权
公开(公告)号：US09607877B2
公开(公告)日：2017-03-28
申请号：US13376731
申请日：2011-03-04
申请人： Huicai Zhong , Qingqing Liang
发明人： Huicai Zhong , Qingqing Liang
IPC分类号： H01L23/34 , H01L27/12 , H05K7/20 , H01L21/762 , H01L27/06 , H01L27/088
CPC分类号： H01L21/76224 , H01L21/76283 , H01L27/0694 , H01L27/088
摘要： The present invention provides a substrate structure, a semiconductor device, and a manufacturing method thereof. The substrate structure comprises: a semiconductor substrate; and a first isolation region, wherein the first isolation region comprises: a first trench extending through the semiconductor substrate; and a first dielectric layer filling the first trench. Due to the isolation region extending through the substrate, it is possible to make device structures on both surfaces of the substrate, so as to increase the utilization of the substrate and the integration degree of the devices.

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