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1. 发明授权

US06803916B2 Rasterization using two-dimensional tiles and alternating bins for improved rendering utilization 有权
标题翻译：使用二维瓦片和交替箱体进行光栅化，以提高渲染利用率
公开(公告)号：US06803916B2
公开(公告)日：2004-10-12
申请号：US09861475
申请日：2001-05-18
申请人： Nandini Ramani , David C. Kehlet , Ewa M. Kubalska , Michael G. Lavelle , Michael A. Wasserman , Kevin Tang , Yan Yan Tang
发明人： Nandini Ramani , David C. Kehlet , Ewa M. Kubalska , Michael G. Lavelle , Michael A. Wasserman , Kevin Tang , Yan Yan Tang
IPC分类号： G06T120
CPC分类号： G06T15/00 , G06T11/40
摘要： A system and method for rasterizing and rendering graphics data is disclosed. Vertices may be grouped to form primitives such as triangles, which are rasterized using two-dimensional arrays of samples bins. Individual samples may be selected from the bins according to different criteria such as memory bank allocation to improve utilization of the system's rendering pipeline. Since the arrays may have more bins than the number of evaluation units in the rendering pipeline, the samples from the bins may be stored to FIFO memories to allow invalid or empty samples (those outside the primitive being rendered) to be removed. The samples may then be filtered to form pixels that are displayable to form an image on a display device.
摘要翻译：公开了一种用于光栅化和渲染图形数据的系统和方法。顶点可以被分组以形成诸如三角形的图元，其使用样本仓的二维阵列进行光栅化。可以根据诸如存储体分配的不同标准从箱中选择单个样本，以提高系统的渲染管线的利用率。由于阵列可以具有比渲染流水线中的评估单元数更多的存储单元，所以来自存储区的样本可以被存储到FIFO存储器中以允许去除无效或空的样本（被渲染的原始图像之外的样本）。然后可以对样本进行滤波以形成可显示以在显示装置上形成图像的像素。

2. 发明授权

US07023444B2 Multi-texturing by walking an appropriately-sized supertile over a primitive 有权
标题翻译：通过在原始图像上行走适当尺寸的超重物进行多纹理化
公开(公告)号：US07023444B2
公开(公告)日：2006-04-04
申请号：US10393528
申请日：2003-03-20
申请人： Brian D. Emberling , Michael G. Lavelle , Assana M. Fard , Nandini Ramani , David C. Kehlet , Michael A. Wasserman , Ewa M. Kubalska , Mark E Pascual
发明人： Brian D. Emberling , Michael G. Lavelle , Assana M. Fard , Nandini Ramani , David C. Kehlet , Michael A. Wasserman , Ewa M. Kubalska , Mark E Pascual
IPC分类号： G06T11/40
CPC分类号： G06T15/04
摘要： A rendering unit positions a supertile so that it intersects a primitive. The rendering unit repeatedly walks over bins of the supertile, applying a layer of texture to the bins of the supertile in each iteration of said repeated walking. The rendering unit advances to the next texture layer after having applied the current texture layer to each candidate bin of the supertile. The results of each texture layer application to the bins may be stored in a texture accumulation buffer. The size of the supertile corresponds to the size of the texture accumulation buffer. After applying a last layer of texture to the bins of the supertile, the supertile may be advanced to a new position. The rendering unit traverses the primitive with the supertile so that the union of areas visited by the supertile covers the primitive.
摘要翻译：渲染单元定位一个supertile，以便它与一个原语相交。渲染单元重复地移动超重物料箱，在所述重复步行的每次迭代中将一层纹理施加到上层的仓上。渲染单元在将当前纹理层应用于上层的每个候选块之后前进到下一个纹理层。每个纹理层应用于存储区的结果可以存储在纹理累积缓冲器中。 supertile的大小对应于纹理累积缓冲区的大小。将最后一层纹理应用于上层的仓后，超级可以提前到一个新的位置。渲染单元用优先级遍历原始图像，使得由supertile访问的区域的联合覆盖原始图像。

3. 发明授权

US06833834B2 Frame buffer organization and reordering 有权
标题翻译：帧缓冲区组织和重新排序
公开(公告)号：US06833834B2
公开(公告)日：2004-12-21
申请号：US10021096
申请日：2001-12-12
申请人： Michael A. Wasserman , Michael G. Lavelle , David C. Kehlet , Yan Yan Tang , Ewa M. Kubalska
发明人： Michael A. Wasserman , Michael G. Lavelle , David C. Kehlet , Yan Yan Tang , Ewa M. Kubalska
IPC分类号： G06F1300
CPC分类号： G09G3/006 , G06F3/1431 , G09G5/001 , G09G5/18 , G09G5/363 , G09G5/395 , G09G2360/123
摘要： A graphics system includes a frame buffer, a write address generator, and a pixel buffer. A burst of pixels received from the frame buffer may not be in display order. In one embodiment, a write address generator calculates a write address for each pixel in the burst of pixels output from the frame buffer. The write address corresponds to a relative display order within the burst for each respective pixel. Each pixel in the burst is stored to its write address in the pixel buffer. This way, the pixels in the burst are stored in display order within the pixel buffer.
摘要翻译：图形系统包括帧缓冲器，写地址生成器和像素缓冲器。从帧缓冲器接收到的像素突发可能不是显示顺序。在一个实施例中，写地址生成器计算从帧缓冲器输出的像素突发中的每个像素的写入地址。写入地址对应于每个相应像素的突发内的相对显示顺序。突发中的每个像素被存储到像素缓冲器中的其写入地址。这样，突发中的像素以像素缓冲器内的显示顺序存储。

4. 发明授权

US06924820B2 Over-evaluating samples during rasterization for improved datapath utilization 有权
标题翻译：在光栅化期间对样本进行过度评估，以提高数据路径利用率
公开(公告)号：US06924820B2
公开(公告)日：2005-08-02
申请号：US09962995
申请日：2001-09-25
申请人： Nandini Ramani , David C. Kehlet , Michael G. Lavelle , Mark E. Pascual , Ewa M. Kubalska , Yi-Ming Tian
发明人： Nandini Ramani , David C. Kehlet , Michael G. Lavelle , Mark E. Pascual , Ewa M. Kubalska , Yi-Ming Tian
IPC分类号： G06T11/40 , G09G5/00
CPC分类号： G06T11/40
摘要： A system and method for rasterizing and rendering graphics data is disclosed. Vertices may be grouped to form primitives such as triangles, which are rasterized using two-dimensional arrays of samples bins. To overcome fragmentation problems, the system's sample evaluation hardware may be configured to over-evaluate samples each clock cycle. Since a number of the samples will typically not survive evaluation because they will be outside the primitive being rendered, the remaining surviving samples may be combined into sets, with one set being forwarded to subsequent pipeline stages each clock cycle in order to attempt to keep the pipeline utilization high.
摘要翻译：公开了一种用于光栅化和渲染图形数据的系统和方法。顶点可以被分组以形成诸如三角形的图元，其使用样本仓的二维阵列进行光栅化。为了克服分裂问题，系统的样本评估硬件可能被配置为对每个时钟周期的样本进行过度评估。由于许多样本通常不能存活，因为它们将不在渲染原始图像之外，剩余的存活样本可以组合成集合，其中一个集合被转发到每个时钟周期的后续流水线阶段，以便尝试保持管道利用率高。

5. 发明授权

US06795080B2 Batch processing of primitives for use with a texture accumulation buffer 有权
标题翻译：用于与纹理累加缓冲区一起使用的原语的批处理
公开(公告)号：US06795080B2
公开(公告)日：2004-09-21
申请号：US10060954
申请日：2002-01-30
申请人： Michael G. Lavelle , David C. Kehlet , Michael A. Wasserman , Nandini Ramani , Ranjit S. Oberoi
发明人： Michael G. Lavelle , David C. Kehlet , Michael A. Wasserman , Nandini Ramani , Ranjit S. Oberoi
IPC分类号： G06T1140
CPC分类号： G06T11/001
摘要： A graphics system configured to apply multiple layers of texture information to batches of primitives. The graphics system collects primitives into a batch that share a common set of texture layers to be applied. The batch is limited so that the total estimate size of the batch is less than or equal to a storage capacity of a texture accumulation buffer. The graphics system stores samples (or fragments) corresponding to the batch primitives in the texture accumulation buffer between the application of successive texture layers.
摘要翻译：图形系统被配置为将多层纹理信息应用于批量的图元。图形系统将基元收集到共享要应用的一组公共纹理图层的批次中。批量被限制，使得批次的总估计大小小于或等于纹理累积缓冲器的存储容量。图形系统将相应于批量原语的样本（或片段）存储在连续纹理层的应用之间的纹理累积缓冲器中。

6. 发明授权

US06731300B2 Efficient anti-aliased dot rasterization 有权
标题翻译：高效的抗锯齿点光栅化
公开(公告)号：US06731300B2
公开(公告)日：2004-05-04
申请号：US09861177
申请日：2001-05-18
申请人： Nandini Ramani , Michael A. Wasserman , Michael G. Lavelle , Mark E. Pascual , Kevin Tang , Daniel M. Chao
发明人： Nandini Ramani , Michael A. Wasserman , Michael G. Lavelle , Mark E. Pascual , Kevin Tang , Daniel M. Chao
IPC分类号： G06T1500
CPC分类号： G09G5/363 , G06T11/40 , G06T15/00 , G06T2200/12
摘要： A graphics system may be configured to render anti-aliased dots in terms of samples and to generate pixels by filtering the samples. The pixels are supplied to one or more display devices. The means used to generate the samples may perform the computation of radial distance at positions on a grid in a rendering coordinate space, and interpolate estimates for the radial distances of samples around the dot as needed based on the radii at the grid positions.
摘要翻译：图形系统可以被配置为在样本方面呈现抗锯齿点，并且通过对样本进行滤波来生成像素。像素被提供给一个或多个显示设备。用于生成样本的手段可以在渲染坐标空间中的网格上的位置处执行径向距离的计算，并且根据需要根据网格位置处的半径内插点周围的样本的径向距离的估计。

7. 发明授权

US07027064B2 Active block write-back from SRAM cache to DRAM 有权
公开(公告)号：US07027064B2
公开(公告)日：2006-04-11
申请号：US10086174
申请日：2002-02-28
申请人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
发明人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
IPC分类号： G09G5/36 , G06F13/00 , G06F12/00
CPC分类号： G09G5/39 , G06F12/0804 , G06F12/0897 , G06F12/126 , G06F2212/455 , G06T1/60 , G09G2360/121
摘要： An external cache management unit for use with 3D-RAM and suitable for use in a computer graphics system is described. The unit maintains and tracks the status of level one cache memory in the 3D-RAM. The unit identifies dirty blocks of cache memory and prioritizes block cleansing based on a least used algorithm. Periodic block cleansing during empty memory cycles is provided for, and may also be prompted on demand.

8. 发明授权

US06778179B2 External dirty tag bits for 3D-RAM SRAM 有权
标题翻译：用于3D-RAM SRAM的外部脏标签位
公开(公告)号：US06778179B2
公开(公告)日：2004-08-17
申请号：US09970113
申请日：2001-10-03
申请人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
发明人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
IPC分类号： G09G536
CPC分类号： G06F12/0897 , G06T1/60 , G06T15/005 , G09G5/363 , G09G5/39 , G09G2360/121 , G09G2360/122 , Y02D10/13
摘要： An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power consumption within the 3D-RAM by performing partial block write-back according to status information stored in an array of dirty tag bits. Periodic level one cache block cleansing is provided for during empty memory cycles.
摘要翻译：描述了一种用于3D-RAM帧缓冲器并适用于计算机图形系统的外部高速缓存管理单元。该单元可以通过根据存储在脏标签位阵列中的状态信息执行部分块回写来减少3D-RAM内的功耗。在空的存储器循环期间提供了周期性的一级缓存块清理。

9. 发明授权

US06720969B2 Dirty tag bits for 3D-RAM SRAM 失效
标题翻译： 3D-RAM SRAM的脏标签位
公开(公告)号：US06720969B2
公开(公告)日：2004-04-13
申请号：US09861172
申请日：2001-05-18
申请人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
发明人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
IPC分类号： G09G536
CPC分类号： G06F12/0897 , G06T1/60 , G06T15/005 , G09G5/363 , G09G5/39 , G09G2360/121 , G09G2360/122 , Y02D10/13
摘要： An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power consumption within the 3D-RAM by performing partial block write-back according to status information stored in an array of dirty tag bits. Periodic level one cache block cleansing is provided for during empty memory cycles.
摘要翻译：描述了一种用于3D-RAM帧缓冲器并适用于计算机图形系统的外部高速缓存管理单元。该单元可以通过根据存储在脏标签位阵列中的状态信息执行部分块回写来减少3D-RAM内的功耗。在空的存储器循环期间提供了周期性的一级缓存块清理。

10. 发明授权

US06812929B2 System and method for prefetching data from a frame buffer 有权
标题翻译：从帧缓冲区预取数据的系统和方法
公开(公告)号：US06812929B2
公开(公告)日：2004-11-02
申请号：US10094957
申请日：2002-03-11
申请人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
发明人： Michael G. Lavelle , Ewa M. Kubalska , Yan Yan Tang
IPC分类号： G06F1318
CPC分类号： G09G5/39 , G09G5/363 , G09G2360/121
摘要： A graphics system may include a frame buffer that includes several sets of one or more memory banks and a cache. The frame buffer may load data from one of the memory banks into the cache in response to receiving a cache fill request. Each set of memory banks is accessible independently of each other set of memory banks. A frame buffer interface coupled to the frame buffer includes a plurality of cache fill request queues. Each cache fill request queue is configured to store one or more cache fill requests targeting a corresponding one of the sets of memory banks. The frame buffer interface is configured to select a cache fill request from one of the cache fill request queues that stores cache fill requests targeting a set of memory banks that is not currently being accessed and to provide the selected cache fill request to the frame buffer.
摘要翻译：图形系统可以包括帧缓冲器，其包括若干组一个或多个存储器组和高速缓存。响应于接收到高速缓存填充请求，帧缓冲器可以将数据从一个存储体加载到高速缓存中。每组存储体可以独立于彼此的存储体组来访问。耦合到帧缓冲器的帧缓冲器接口包括多个高速缓存填充请求队列。每个高速缓存填充请求队列被配置为存储一个或多个缓存填充请求，其针对存储器组的相应组之一。帧缓冲器接口被配置为从缓存填充请求队列中的一个选择高速缓存填充请求，所述缓存填充请求队列存储针对当前未被访问的一组存储器组的高速缓存填充请求，并且向帧缓冲器提供所选择的高速缓存填充请求。

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