专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5309321A Thermally conductive screen mesh for encapsulated integrated circuit packages 失效
标题翻译：用于封装集成电路封装的导热筛网
公开(公告)号：US5309321A
公开(公告)日：1994-05-03
申请号：US949300
申请日：1992-09-22
申请人： Michael A. Olla , Thomas P. Dolbear , Seyed H. Hashemi
发明人： Michael A. Olla , Thomas P. Dolbear , Seyed H. Hashemi
IPC分类号： H01L23/29 , H01L23/373 , H01L23/433 , H01L23/552 , H05K7/20
CPC分类号： H01L23/293 , H01L23/3733 , H01L23/4334 , H01L23/552 , H01L2224/32225 , H01L2224/451 , H01L2224/48227 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H01L2924/3025
摘要： An encapsulated integrated circuit package having an integrated circuit chip with a plurality of electrical leads connected thereto and at least one thermally conductive screen mesh positioned adjacent to the chip. A non-electrically conductive thermosetting or thermoplastic material forms a housing enclosing the chip and bonded to the screen mesh. Preferably one of the layers is exposed to the outside of the housing and the screen mesh is secured to a substrate supporting the chip.
摘要翻译：一种封装的集成电路封装，其具有集成电路芯片，其中连接有多个电引线和至少一个邻近芯片定位的导热屏蔽网。非导电的热固性或热塑性材料形成包围芯片并结合到筛网的壳体。优选地，一个层暴露于壳体的外部，并且筛网被固定到支撑芯片的基板上。

2. 发明授权

US5265321A Integrated circuit structure with heat exchanger elements secured thereto and method of making 失效
标题翻译：具有固定有热交换器元件的集成电路结构及其制造方法
公开(公告)号：US5265321A
公开(公告)日：1993-11-30
申请号：US949182
申请日：1992-09-22
申请人： Richard D. Nelson , Michael A. Olla , Seyed H. Hashemi , Thomas P. Dolbear
发明人： Richard D. Nelson , Michael A. Olla , Seyed H. Hashemi , Thomas P. Dolbear
IPC分类号： H01L23/367 , H01L23/433 , H05K7/20
CPC分类号： H01L23/4334 , H01L23/3677 , H01L23/4338 , H01L2924/0002 , Y10T29/49146 , Y10T29/4981
摘要： An integrated circuit structure and method of making in which the circuit has a plurality of metal heat exchanger elements spaced from each other with their first ends secured to the structure. The first ends may be adhesively secured to an integrated circuit chip or the underlying substrate, and the heat exchanger may be hermetically attached. The method uses a compliant removable support block for attaching the plurality of individual heat exchanger elements to integrated circuit structures having variations in their elevation.
摘要翻译：一种集成电路结构和制造方法，其中电路具有彼此间隔开的多个金属热交换器元件，其第一端固定到结构。第一端可以粘合地固定到集成电路芯片或下面的基板，并且热交换器可以气密地附接。该方法使用柔性可移除的支撑块，用于将多个单独的热交换器元件连接到具有其高度变化的集成电路结构。

3. 发明授权

US5344795A Method for encapsulating an integrated circuit using a removable heatsink support block 失效
标题翻译：使用可拆卸散热器支撑块封装集成电路的方法
公开(公告)号：US5344795A
公开(公告)日：1994-09-06
申请号：US949189
申请日：1992-09-22
申请人： Seyed H. Hashemi , Michael A. Olla , Thomas P. Dolbear , Richard D. Nelson
发明人： Seyed H. Hashemi , Michael A. Olla , Thomas P. Dolbear , Richard D. Nelson
IPC分类号： H01L21/56 , H01L23/433 , H01L21/58 , H01L21/60
CPC分类号： H01L21/565 , H01L23/4334 , H01L2224/48227 , H01L25/0655 , Y10T29/49121
摘要： A process for making thermosetting or thermoplastic encapsulated integrated circuit having a heat exchanger in which one end of the heat exchanger is encapsulated in the housing adjacent to the integrated circuit and the other end is exposed to the environment beyond the housing portion. The process of making includes molding a heat exchanger into a thermosetting or thermoplastic package utilizing a preformed heat exchanger having a dissolvable or removable material which serves as a seal block during the molding operation. A plurality of thermally conductive heat exchanger elements are provided for providing the desired thermal performance while reducing the thermal stresses in the package.
摘要翻译：一种用于制造具有热交换器的热固性或热塑性封装集成电路的方法，其中热交换器的一端封装在与集成电路相邻的壳体中，另一端暴露于外壳外部的环境中。制造方法包括使用具有可溶性或可去除材料的预成型热交换器将热交换器成型为热固性或热塑性包装，其在成型操作期间用作密封块。提供多个导热热交换器元件以提供期望的热性能，同时减少包装中的热应力。

4. 发明授权

US06462956B1 Arrangement for reducing non-uniformity in current flow through various power pins within a printed wiring board connector for a removable module 有权
标题翻译：用于减少用于可移除模块的印刷线路板连接器内的各种电源引脚的电流不均匀性的布置
公开(公告)号：US06462956B1
公开(公告)日：2002-10-08
申请号：US09635333
申请日：2000-08-09
申请人： Dennis J. Herrell , Thomas P. Dolbear
发明人： Dennis J. Herrell , Thomas P. Dolbear
IPC分类号： H05K710
CPC分类号： H05K1/0265 , H01R12/523 , H05K7/1431 , H05K2201/044 , H05K2201/09309 , H05K2201/0979 , H05K2201/10189
摘要： An arrangement for a motherboard having a connector for a removable module is disclosed which increases the aggregate current carrying capacity of the connector by reducing the difference in current flow between power pins of the connector having the highest current flow and power pins of the connector having the lowest current flow. The current flow through all the power pins may then be operated nearer to the design maximum of the particular connector used. Thicker power planes within the motherboard (as well as within the module) reduce the effective resistance per square of the power plane, and help distribute the current more uniformly to a greater number of power pins of the connector. The use of multiple power planes in parallel also achieves a lower effective resistance. Multiple power terminals connecting the source of regulated power supply voltage (or reference voltage, such as ground) to the power plane may be used instead of just one power terminal. Moreover, placing a pair of power terminals symmetrically about a line perpendicular to the connector which bisects the power pins of the connector helps distribute the current flow through the power plane to the power pins. By placing the power terminal (or terminals) at least a certain distance from the connector (e.g., at least 15 mm), a more uniform current flow through the connector is achieved.
摘要翻译：公开了一种具有用于可拆卸模块的连接器的主板的布置，其通过减小具有最高电流的连接器的电源引脚与具有该连接器的连接器的电源引脚之间的电流差异，从而增加了连接器的聚集载流量最低电流。然后，可以使所有电源引脚的电流流动更接近所使用的特定连接器的设计最大值。主板（以及模块内部）的较大功率平面降低了功率平面每平方的有效电阻，并有助于将电流均匀分布到连接器的更大数量的电源引脚。并联使用多个电源平面也能实现较低的有效电阻。可以使用将稳压电源电压（或参考电压，例如接地）连接到电源平面的多个电源端子而不是仅一个电源端子。此外，将一对电源端子对称地围绕垂直于连接器的直线对称，该直线将连接器的电源引脚平分，有助于将电流流经电源平面分配给电源引脚。通过将电源端子（或端子）放置在与连接器至少一定距离（例如至少15mm）的位置上，实现了通过连接器的更均匀的电流。

5. 发明授权

US06477047B1 Temperature sensor mounting for accurate measurement and durability 有权
标题翻译：温度传感器安装，可精确测量和耐用
公开(公告)号：US06477047B1
公开(公告)日：2002-11-05
申请号：US09734442
申请日：2000-12-11
申请人： Doug Markwardt , Thomas P. Dolbear , Lewis M. Eyman
发明人： Doug Markwardt , Thomas P. Dolbear , Lewis M. Eyman
IPC分类号： H05K720
CPC分类号： H01L23/34 , H01L2924/0002 , H01L2924/00
摘要： A temperature sensor for an integrated circuit is attached to a heat sink using a compliant member such as a spring. The spring attaches to the heat sink and extends across a slot in the thermal contact surface of the heat sink so that the temperature sensor coupled to the spring is centered nominally over an integrated circuit die when the heat sink is abutted against the integrated circuit.
摘要翻译：用于集成电路的温度传感器使用诸如弹簧的兼容部件附接到散热器。弹簧连接到散热器并且延伸穿过散热器的热接触表面中的狭槽，使得当散热器抵靠集成电路时，耦合到弹簧的温度传感器标称地集中在集成电路管芯上。

6. 发明授权

US06828666B1 Low inductance power distribution system for an integrated circuit chip 失效
标题翻译：用于集成电路芯片的低电感配电系统
公开(公告)号：US06828666B1
公开(公告)日：2004-12-07
申请号：US09099758
申请日：1998-06-18
申请人： Dennis J. Herrell , Thomas P. Dolbear
发明人： Dennis J. Herrell , Thomas P. Dolbear
IPC分类号： H01L2352
CPC分类号： H05K1/0231 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L2224/16225 , H01L2924/00014 , H01L2924/01019 , H01L2924/15311 , H01L2924/19106 , H01L2924/3011 , H05K1/112 , H05K2201/10545 , H05K2201/10734 , H01L2224/0401
摘要： A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board. The decoupling capacitors have positive and negative electrodes are electrically coupled to the power and ground plated through holes respectively. The C4 power and ground bumps, the power and ground carrier vias, the power and ground carrier via subgroups, the power and ground solder balls, the contact pads, the power and ground plated through holes, and the positive and negative electrodes are arranged in anti-parallel tessellations to reduce the inductance of a loop circuit from the decoupling capacitors to the integrated chip circuit.
摘要翻译：位于电路板上的去耦电容到集成电路芯片的低阻抗电路。集成电路包括多个电源和接地C4凸起，并且位于集成电路载体的位于电路板的第一侧上的第一侧上。集成电路载体包括诸如电压和接地电源平面的横向导体。电源和地面载体通孔分别从电压和接地电源平面延伸到载体的第一侧，载流子通孔的电源和接地子组分别从电压和接地电源平面延伸到电源和接地焊球上承运人的第二面。电路板包括从电路板的第一侧的接触焊盘延伸到电路板第二面上的接触焊盘的电源和接地电镀通孔。去耦电容器位于电路板的第二侧。去耦电容器具有正极和负极分别电耦合到电源和接地电镀通孔。 C4电源和接地突起，电源和接地载体通孔，电源和接地载体通过子组，电源和接地焊球，接触焊盘，电源和接地电镀通孔以及正极和负极布置在反平行镶嵌，以减少环路电路从去耦电容到集成芯片电路的电感。

7. 发明授权

US08198723B1 Low inductance power distribution system for an integrated circuit chip 有权
标题翻译：用于集成电路芯片的低电感配电系统
公开(公告)号：US08198723B1
公开(公告)日：2012-06-12
申请号：US11003566
申请日：2004-12-03
申请人： Dennis J. Herrell , Thomas P. Dolbear
发明人： Dennis J. Herrell , Thomas P. Dolbear
IPC分类号： H01L23/52
CPC分类号： H05K1/0231 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L2224/16225 , H01L2924/00014 , H01L2924/01019 , H01L2924/15311 , H01L2924/19106 , H01L2924/3011 , H05K1/112 , H05K2201/10545 , H05K2201/10734 , H01L2224/0401
摘要： A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board. The decoupling capacitors have positive and negative electrodes are electrically coupled to the power and ground plated through holes respectively. The C4 power and ground bumps, the power and ground carrier vias, the power and ground carrier via subgroups, the power and ground solder balls, the contact pads, the power and ground plated through holes, and the positive and negative electrodes are arranged in anti-parallel tessellations to reduce the inductance of a loop circuit from the decoupling capacitors to the integrated chip circuit.
摘要翻译：位于电路板上的去耦电容到集成电路芯片的低阻抗电路。集成电路包括多个电源和接地C4凸起，并且位于集成电路载体的位于电路板的第一侧上的第一侧上。集成电路载体包括诸如电压和接地电源平面的横向导体。电源和地面载体通孔分别从电压和接地电源平面延伸到载体的第一侧，载流子通孔的电源和接地子组分别从电压和接地电源平面延伸到电源和接地焊球上承运人的第二面。电路板包括从电路板的第一侧的接触焊盘延伸到电路板第二面上的接触焊盘的电源和接地电镀通孔。去耦电容器位于电路板的第二侧。去耦电容器具有正极和负极分别电耦合到电源和接地电镀通孔。 C4电源和接地突起，电源和接地载体通孔，电源和接地载体通过子组，电源和接地焊球，接触焊盘，电源和接地电镀通孔以及正极和负极布置在反平行镶嵌，以减少环路电路从去耦电容到集成芯片电路的电感。

8. 发明授权

US5963023A Power surge management for high performance integrated circuit 失效
标题翻译：电源浪涌管理用于高性能集成电路
公开(公告)号：US5963023A
公开(公告)日：1999-10-05
申请号：US99691
申请日：1998-06-18
申请人： Dennis James Herrell , Thomas P. Dolbear
发明人： Dennis James Herrell , Thomas P. Dolbear
IPC分类号： G05F3/24 , G06F1/30 , H01L23/498 , H01L23/50 , H02J1/02 , H05K1/11 , G05F1/40 , H03K17/12
CPC分类号： H01L23/49827 , G06F1/305 , H01L23/49838 , H01L23/50 , H02J1/02 , G05F3/24 , H01L2924/0002 , H01L2924/3011 , H05K1/112 , H05K2201/10545 , H05K2201/10734
摘要： An integrated circuit chip configuration, e.g., a microprocessor, includes feedback control circuitry defined thereon to control mid-frequency components of current demand of the integrated circuit chip and thereby regulate power supply voltage to within design tolerances of the integrated circuit chip. Such mid-frequency components can be generated by directed changes in operating frequency of the integrated circuit chip or by cyclic or episodic variations in circuit activity, e.g., instruction sequence dependent variations. When generated, such mid-frequency components can excite mid-frequency resonances in a power distribution system and generate power supply voltage disturbances. In some configurations, the integrated circuit chip includes current dump circuitry defining a controlled impedance path between first and second power supply voltage terminals of the integrated circuit chip. The controlled impedance path allows the feedback control circuitry to actuate a variable current draw so as to reduce mid-frequency components of overall current demand of the integrated circuit chip and thereby regulate power supply voltage disturbances. In other configurations, the feedback control circuitry is coupled to on-chip clock circuits, e.g., a phase-locked loop (PLL), to actuate variations in a clock signal supplied to the integrated circuit chip and thereby regulate power supply voltage disturbances.
摘要翻译：诸如微处理器的集成电路芯片配置包括在其上限定的反馈控制电路，以控制集成电路芯片的电流需求的中频分量，从而将电源电压调整到集成电路芯片的设计容限内。这样的中频分量可以通过集成电路芯片的工作频率的定向改变或电路活动中的循环或偶然变化（例如指令序列相关变化）来产生。当产生时，这种中频分量可以激发配电系统中的中频谐振并产生电源电压干扰。在一些配置中，集成电路芯片包括限定在集成电路芯片的第一和第二电源电压端子之间的受控阻抗路径的电流转储电路。受控阻抗路径允许反馈控制电路致动可变电流汲取，以减少集成电路芯片的总电流需求的中频分量，从而调节电源电压干扰。在其他配置中，反馈控制电路耦合到片上时钟电路，例如锁相环（PLL），以激励提供给集成电路芯片的时钟信号的变化，从而调节电源电压干扰。

9. 发明授权

US5907474A Low-profile heat transfer apparatus for a surface-mounted semiconductor device employing a ball grid array (BGA) device package 失效
标题翻译：用于采用球栅阵列（BGA）器件封装的表面安装半导体器件的低轮廓传热装置
公开(公告)号：US5907474A
公开(公告)日：1999-05-25
申请号：US845591
申请日：1997-04-25
申请人： Thomas P. Dolbear
发明人： Thomas P. Dolbear
IPC分类号： H01L23/04 , H01L23/40 , H01L23/433 , H05K1/02 , H05K3/32 , H05K3/34 , H05K7/10 , H05K7/20
CPC分类号： H01L24/32 , H01L23/04 , H01L23/4006 , H01L23/433 , H05K3/325 , H05K7/1061 , H01L2224/16 , H01L2224/27013 , H01L2224/73253 , H01L2224/83051 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01027 , H01L2924/01033 , H01L2924/01046 , H01L2924/01055 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/16152 , H01L2924/19041 , H05K1/0201 , H05K3/3436
摘要： A low-profile heat transfer apparatus is presented for a surface-mounted semiconductor device employing a ball grid array (BGA) device package having a chip mounted upon a substantially flat upper surface of a substrate. The semiconductor device is mounted upon a component side of a printed circuit board (PCB), and the heat transfer apparatus is used to transfer heat energy from the semiconductor device to an ambient. A thermally conductive cap structure is positioned between the semiconductor device and the ambient. The cap structure includes a bottom surface having a first cavity sized to receive the substrate and possibly any decoupling capacitors. During use, the substrate resides within the first cavity. In a first embodiment, the chip resides within a second cavity in an upper wall of the first cavity during use. The chip and substrate are thermally coupled to the cap structure by a first and second thermal interface layer, respectively. The use of two thermal interface layers achieves a relatively low value of .theta..sub.JS, allowing the cap structure to remain relatively small. In a second embodiment, the chip resides within a hole in the cap structure during use such that the upper surface of the chip is exposed to the ambient. The substrate is thermally coupled to the cap structure by a thermal interface layer. The achieved value of .theta..sub.JS is acceptably low for some applications, and the height of the cap structure relative to the component side of the PCB is substantially reduced.
摘要翻译：本发明提供了一种用于使用具有安装在基板的基本上平坦的上表面上的芯片的球栅阵列（BGA）器件封装的表面安装半导体器件的低调传热装置。半导体器件安装在印刷电路板（PCB）的组件侧，并且传热装置用于将热能从半导体器件传递到环境。导热盖结构位于半导体器件和环境之间。盖结构包括底表面，该底表面具有尺寸适于接纳衬底和可能的任何去耦电容器的第一腔。在使用期间，衬底位于第一腔内。在第一实施例中，在使用期间，芯片位于第一腔的上壁中的第二腔内。芯片和衬底分别通过第一和第二热界面层热耦合到盖结构。两个热界面层的使用实现了较低的θJS值，允许盖结构保持相对较小。在第二实施例中，在使用期间，芯片位于帽结构的孔内，使得芯片的上表面暴露于环境中。衬底通过热界面层热耦合到帽结构。对于一些应用，θJS的实现值是可接受的低，并且帽结构相对于PCB的部件侧的高度显着降低。

10. 发明授权

US5445308A Thermally conductive connection with matrix material and randomly dispersed filler containing liquid metal 失效
标题翻译：与基质材料和含有液态金属的随机分散填料的导热连接
公开(公告)号：US5445308A
公开(公告)日：1995-08-29
申请号：US263623
申请日：1994-06-22
申请人： Richard D. Nelson , Thomas P. Dolbear , Robert W. Froehlich
发明人： Richard D. Nelson , Thomas P. Dolbear , Robert W. Froehlich
IPC分类号： C09J9/02 , H01B1/22 , H01R4/04 , H05K3/32 , B23K35/26
CPC分类号： C09J9/02 , H01B1/22 , H01L24/29 , H01L24/32 , H01R4/04 , H05K3/323 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29305 , H01L2224/29311 , H01L2224/83101 , H01L2224/83951 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01021 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01039 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/12042 , H01L2924/14 , H05K2201/0209 , H05K2201/023 , H05K2201/10719 , H05K2203/0425
摘要： A method of providing a thermally conductive connection between spaced surfaces includes (a) mixing a thermally conductive filler containing a liquid metal into an unhardened matrix material, and (b) contacting the unhardened matrix material and randomly dispersed, separate spaced non-solidified regions of filler within the unhardened matrix material to the surfaces. A solid mechanical bond may be provided by hardening the matrix material or by providing a separate adhesive between the surfaces. Preferably, the regions of filler form separate spaced continuous thermally and electrically conductive paths between the surfaces.
摘要翻译：在间隔表面之间提供导热连接的方法包括（a）将含有液态金属的导热填料混合到未硬化的基体材料中，和（b）使未硬化的基体材料和随机分散的分开的非固化区域未固化的基体材料中的填料到表面。可以通过硬化基质材料或通过在表面之间提供单独的粘合剂来提供固体机械结合。优选地，填料区域在表面之间形成分开的连续的热和导电路径。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式