会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Arrangement for reducing non-uniformity in current flow through various power pins within a printed wiring board connector for a removable module
    • 用于减少用于可移除模块的印刷线路板连接器内的各种电源引脚的电流不均匀性的布置
    • US06462956B1
    • 2002-10-08
    • US09635333
    • 2000-08-09
    • Dennis J. HerrellThomas P. Dolbear
    • Dennis J. HerrellThomas P. Dolbear
    • H05K710
    • H05K1/0265H01R12/523H05K7/1431H05K2201/044H05K2201/09309H05K2201/0979H05K2201/10189
    • An arrangement for a motherboard having a connector for a removable module is disclosed which increases the aggregate current carrying capacity of the connector by reducing the difference in current flow between power pins of the connector having the highest current flow and power pins of the connector having the lowest current flow. The current flow through all the power pins may then be operated nearer to the design maximum of the particular connector used. Thicker power planes within the motherboard (as well as within the module) reduce the effective resistance per square of the power plane, and help distribute the current more uniformly to a greater number of power pins of the connector. The use of multiple power planes in parallel also achieves a lower effective resistance. Multiple power terminals connecting the source of regulated power supply voltage (or reference voltage, such as ground) to the power plane may be used instead of just one power terminal. Moreover, placing a pair of power terminals symmetrically about a line perpendicular to the connector which bisects the power pins of the connector helps distribute the current flow through the power plane to the power pins. By placing the power terminal (or terminals) at least a certain distance from the connector (e.g., at least 15 mm), a more uniform current flow through the connector is achieved.
    • 公开了一种具有用于可拆卸模块的连接器的主板的布置,其通过减小具有最高电流的连接器的电源引脚与具有该连接器的连接器的电源引脚之间的电流差异,从而增加了连接器的聚集载流量 最低电流。 然后,可以使所有电源引脚的电流流动更接近所使用的特定连接器的设计最大值。 主板(以及模块内部)的较大功率平面降低了功率平面每平方的有效电阻,并有助于将电流均匀分布到连接器的更大数量的电源引脚。 并联使用多个电源平面也能实现较低的有效电阻。 可以使用将稳压电源电压(或参考电压,例如接地)连接到电源平面的多个电源端子而不是仅一个电源端子。 此外,将一对电源端子对称地围绕垂直于连接器的直线对称,该直线将连接器的电源引脚平分,有助于将电流流经电源平面分配给电源引脚。 通过将电源端子(或端子)放置在与连接器至少一定距离(例如至少15mm)的位置上,实现了通过连接器的更均匀的电流。
    • 5. 发明授权
    • Low inductance power distribution system for an integrated circuit chip
    • 用于集成电路芯片的低电感配电系统
    • US06828666B1
    • 2004-12-07
    • US09099758
    • 1998-06-18
    • Dennis J. HerrellThomas P. Dolbear
    • Dennis J. HerrellThomas P. Dolbear
    • H01L2352
    • H05K1/0231H01L23/49827H01L23/49838H01L23/50H01L2224/16225H01L2924/00014H01L2924/01019H01L2924/15311H01L2924/19106H01L2924/3011H05K1/112H05K2201/10545H05K2201/10734H01L2224/0401
    • A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board. The decoupling capacitors have positive and negative electrodes are electrically coupled to the power and ground plated through holes respectively. The C4 power and ground bumps, the power and ground carrier vias, the power and ground carrier via subgroups, the power and ground solder balls, the contact pads, the power and ground plated through holes, and the positive and negative electrodes are arranged in anti-parallel tessellations to reduce the inductance of a loop circuit from the decoupling capacitors to the integrated chip circuit.
    • 位于电路板上的去耦电容到集成电路芯片的低阻抗电路。 集成电路包括多个电源和接地C4凸起,并且位于集成电路载体的位于电路板的第一侧上的第一侧上。 集成电路载体包括诸如电压和接地电源平面的横向导体。 电源和地面载体通孔分别从电压和接地电源平面延伸到载体的第一侧,载流子通孔的电源和接地子组分别从电压和接地电源平面延伸到电源和接地焊球上 承运人的第二面。 电路板包括从电路板的第一侧的接触焊盘延伸到电路板第二面上的接触焊盘的电源和接地电镀通孔。 去耦电容器位于电路板的第二侧。 去耦电容器具有正极和负极分别电耦合到电源和接地电镀通孔。 C4电源和接地突起,电源和接地载体通孔,电源和接地载体通过子组,电源和接地焊球,接触焊盘,电源和接地电镀通孔以及正极和负极布置在 反平行镶嵌,以减少环路电路从去耦电容到集成芯片电路的电感。
    • 7. 发明授权
    • Heat transfer apparatus which accommodates elevational disparity across
an upper surface of a surface-mounted semiconductor device
    • 传热装置,其适应横过表面安装半导体器件的上表面的高差
    • US5926371A
    • 1999-07-20
    • US846001
    • 1997-04-25
    • Thomas P. Dolbear
    • Thomas P. Dolbear
    • H01L23/40H01L23/433H05K1/02H05K7/20
    • H05K1/0204H01L23/4006H01L23/433H01L2023/4043H01L2023/4062H01L2023/4068H01L2023/4087H01L2224/16225H01L2224/32245H01L2224/73253H01L2924/01012H01L2924/0102H01L2924/01046H01L2924/01055H01L2924/15311H01L2924/16152H01L2924/16251H05K1/0271H05K2201/10409H05K2201/10734H05K2201/2009H05K2203/1572
    • A heat transfer apparatus is presented accommodating elevational disparity of an upper surface of a semiconductor device with respect to the component side of a PCB without adversely affecting system reliability. The heat transfer apparatus includes a thermally conductive cap structure positioned between the semiconductor device and an ambient and thermally coupled to the semiconductor device. One embodiment includes one or more spacers which maintain a space between the cap structure and the semiconductor device. A chip mounted to the substrate of a ceramic BGA package is mechanically isolated from the cap structure by the spacers, preventing chip damage due to shock and vibration. A backing plate on a side of the PCB opposite the semiconductor device provides PCB structural support and additional heat transfer. Several fasteners attach the backing plate to the cap structure. A portion of the fasteners exert a force which urges the cap structure toward the semiconductor device, while the remainder of the fasteners fix the relative positions of the backing plate and the cap structure. Fixing the relative positions of the backing plate and the cap structure reduces creep problems and promotes stress relief in viscoplastic elements. A first thermal interface layer between the cap structure and the semiconductor device achieves an acceptably low thermal resistance value under a relatively small amount of pressure. The spacers are omitted in an alternate embodiment wherein the first thermal interface layer has a uniform thickness and a consistency which permits the thickness to be maintained during installation.
    • 本发明提供一种传热装置,其相对于PCB的组件侧适应半导体器件的上表面的高度差异,而不会不利地影响系统的可靠性。 传热装置包括位于半导体器件和环境之间并热耦合到半导体器件的导热帽结构。 一个实施例包括保持盖结构和半导体器件之间的空间的一个或多个间隔件。 安装到陶瓷BGA封装的基板的芯片通过间隔物与盖结构机械隔离,防止由于冲击和振动引起的芯片损坏。 在PCB的与半导体器件相对的一侧上的背板提供PCB结构支撑和额外的热传递。 几个紧固件将背板连接到盖结构。 紧固件的一部分施加一个推动帽结构朝向半导体器件的力,而其余的紧固件固定了背板和盖结构的相对位置。 固定背板和盖结构的相对位置减少了蠕变问题,并促进了粘塑性元件的应力消除。 帽结构和半导体器件之间的第一热界面层在相对较小的压力下实现可接受的低热阻值。 在替代实施例中省略了间隔物,其中第一热界面层具有均匀的厚度和允许在安装期间保持厚度的稠度。
    • 10. 发明授权
    • Low inductance power distribution system for an integrated circuit chip
    • 用于集成电路芯片的低电感配电系统
    • US08198723B1
    • 2012-06-12
    • US11003566
    • 2004-12-03
    • Dennis J. HerrellThomas P. Dolbear
    • Dennis J. HerrellThomas P. Dolbear
    • H01L23/52
    • H05K1/0231H01L23/49827H01L23/49838H01L23/50H01L2224/16225H01L2924/00014H01L2924/01019H01L2924/15311H01L2924/19106H01L2924/3011H05K1/112H05K2201/10545H05K2201/10734H01L2224/0401
    • A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board. The decoupling capacitors have positive and negative electrodes are electrically coupled to the power and ground plated through holes respectively. The C4 power and ground bumps, the power and ground carrier vias, the power and ground carrier via subgroups, the power and ground solder balls, the contact pads, the power and ground plated through holes, and the positive and negative electrodes are arranged in anti-parallel tessellations to reduce the inductance of a loop circuit from the decoupling capacitors to the integrated chip circuit.
    • 位于电路板上的去耦电容到集成电路芯片的低阻抗电路。 集成电路包括多个电源和接地C4凸起,并且位于集成电路载体的位于电路板的第一侧上的第一侧上。 集成电路载体包括诸如电压和接地电源平面的横向导体。 电源和地面载体通孔分别从电压和接地电源平面延伸到载体的第一侧,载流子通孔的电源和接地子组分别从电压和接地电源平面延伸到电源和接地焊球上 承运人的第二面。 电路板包括从电路板的第一侧的接触焊盘延伸到电路板第二面上的接触焊盘的电源和接地电镀通孔。 去耦电容器位于电路板的第二侧。 去耦电容器具有正极和负极分别电耦合到电源和接地电镀通孔。 C4电源和接地突起,电源和接地载体通孔,电源和接地载体通过子组,电源和接地焊球,接触焊盘,电源和接地电镀通孔以及正极和负极布置在 反平行镶嵌,以减少环路电路从去耦电容到集成芯片电路的电感。