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1. 发明授权

US5435379A Method and apparatus for low-temperature semiconductor processing 失效
标题翻译：低温半导体加工方法和装置
公开(公告)号：US5435379A
公开(公告)日：1995-07-25
申请号：US930074
申请日：1992-08-14
申请人： Mehrdad M. Moslehi , Habib N. Najm , Ajit P. Paranjpe , Cecil J. Davis
发明人： Mehrdad M. Moslehi , Habib N. Najm , Ajit P. Paranjpe , Cecil J. Davis
IPC分类号： H01L21/302 , F04B23/02 , F04B49/24 , H01J37/34 , H01L21/00 , H01L21/3065 , H01L21/683 , F28D15/00
CPC分类号： H01L21/67103 , F04B23/028 , F04B49/24 , H01J37/34 , H01J2237/2001 , H01J2237/32
摘要： A chilling system (12) has a container (20) filled with a coolant (22). A pipe (16) traverses within the container (20) and the coolant (22) to a housing (18). Fluid flows within the pipe (16) and becomes chilled through the pipe (16) upon entering the container (20) and the coolant (22). The chilled fluid enters the housing (18) chilling the housing (18) through the pipe (16). In turn, semiconductor substrate (19) in contact with the housing (18) also is chilled.
摘要翻译：冷却系统（12）具有填充有冷却剂（22）的容器（20）。管道（16）在容器（20）和冷却剂（22）内移动到壳体（18）。流体在管道（16）内流动，并且在进入容器（20）和冷却剂（22）时通过管道（16）变冷。冷冻流体通过管道（16）进入冷却壳体（18）的壳体（18）。反过来，与壳体（18）接触的半导体衬底（19）也被冷却。

2. 发明授权

US5217559A Apparatus and method for in-situ deep ultraviolet photon-assisted semiconductor wafer processing 失效
标题翻译：用于原位深紫外光子辅助半导体晶片加工的装置和方法
公开(公告)号：US5217559A
公开(公告)日：1993-06-08
申请号：US625186
申请日：1990-12-10
申请人： Mehrdad M. Moslehi , Ajit P. Paranjpe , Cecil J. Davis
发明人： Mehrdad M. Moslehi , Ajit P. Paranjpe , Cecil J. Davis
IPC分类号： H01L21/302 , H01L21/00 , H01L21/205 , H01L21/268 , H01L21/3065
CPC分类号： H01L21/67115 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/2686
摘要： An in-situ deep-ultraviolet light generation module (126) for photon-assisted processing of semiconductor wafers (44) comprises a process environment space (152) for photochemical processing applications. Process gas injection space (182) receives reactive process gases and injects them into process environment space (152). Plasma fill space (124) receives a plasma (120) and may direct plasma (120) away from or into the process environment space (152) according to the presence or absence of control gas (160) flow. Control gas space (174) and flow/pressure switch space (154) receive control gas (160) to selectively permit deep-ultraviolet photons or plasma to reach process environment space (152) and interact with wafer (44) for photo-enhanced or plasma-enhanced wafer processing.
摘要翻译：用于半导体晶片（44）的光子辅助处理的原位深紫外光发生模块（126）包括用于光化学处理应用的工艺环境空间（152）。工艺气体注入空间（182）接收反应性工艺气体并将其注入工艺环境空间（152）。等离子体填充空间（124）接收等离子体（120）并且可以根据是否存在控制气体（160）流将等离子体（120）引导到过程环境空间（152）或进入过程环境空间（152）。控制气体空间（174）和流量/压力开关空间（154）接收控制气体（160）以选择性地允许深紫外光子或等离子体到达处理环境空间（152）并与晶片（44）相互作用以进行光增强或等离子体增强晶片处理。

3. 发明授权

US06444103B1 Method and apparatus for thin film deposition using an active shutter 失效
标题翻译：使用主动快门进行薄膜沉积的方法和装置
公开(公告)号：US06444103B1
公开(公告)日：2002-09-03
申请号：US09662575
申请日：2000-09-15
申请人： Mehrdad M. Moslehi , Yong Jin Lee , Cecil J. Davis , Ajit P. Paranjpe
发明人： Mehrdad M. Moslehi , Yong Jin Lee , Cecil J. Davis , Ajit P. Paranjpe
IPC分类号： C23C1434
CPC分类号： H01J37/3447 , C23C14/3464 , C23C14/564
摘要： Material is deposited from an active shutter onto a substrate located in a processing chamber housing with a shutter target coupled to a shutter target assembly. A first target assembly located in the housing supports a target for physical-vapor deposition of a first material onto the substrate. A shutter is selectively moveable to extend into a closed or activated position and to retract into an open position. The shutter target assembly is coupled to the shutter such that when the shutter is in the closed position, the shutter target assembly is positioned to allow deposition of material from the shutter target onto the substrate. When the shutter is in the open position, the first target is positioned to deposit material onto the substrate. Alternating layers of materials may be deposited by the shutter target and first target by cycling the shutter between an open position and a closed position.
摘要翻译：材料从活动快门沉积到位于处理室壳体中的基板上，其中快门目标件联接到快门目标组件。位于壳体中的第一目标组件支撑用于将第一材料物理 - 气相沉积到衬底上的靶。快门选择性地可移动以延伸到关闭或启动位置并缩回到打开位置。快门目标组件联接到快门，使得当快门处于关闭位置时，快门目标组件被定位成允许材料从快门目标物体沉积到基板上。当快门处于打开位置时，第一目标定位成将材料沉积到基板上。通过在打开位置和关闭位置之间循环活门，可以通过快门目标和第一目标来沉积材料的交替层。

4. 发明授权

US06905578B1 Apparatus and method for multi-target physical-vapor deposition of a multi-layer material structure 失效
标题翻译：多层材料结构的多目标物理气相沉积的装置和方法
公开(公告)号：US06905578B1
公开(公告)日：2005-06-14
申请号：US09067143
申请日：1998-04-27
申请人： Mehrdad M. Moslehi , Cecil J. Davis , Christopher J. Mann , Dwain R. Jakubik , Ajit P. Paranjpe
发明人： Mehrdad M. Moslehi , Cecil J. Davis , Christopher J. Mann , Dwain R. Jakubik , Ajit P. Paranjpe
IPC分类号： C23C14/56 , C23C14/34 , C23C16/00
CPC分类号： C23C14/568
摘要： An apparatus and method for depositing plural layers of materials on a substrate within a single vacuum chamber allows high-throughput deposition of structures such as these for GMR and MRAM application. An indexing mechanism aligns a substrate with each of plural targets according to the sequence of the layers in the structure. Each target deposits material using a static physical-vapor deposition technique. A shutter can be interposed between a target and a substrate to block the deposition process for improved deposition control. The shutter can also preclean a target or the substrate and can also be used for mechanical chopping of the deposition process. In alternative embodiments, plural substrates may be aligned sequentially with plural targets to allow simultaneous deposition of plural structures within the single vacuum chamber. A monitoring and control device can be wed to optimize equipment state, process state, and wafer state parameters by sensing each respective state during or after the deposition process.
摘要翻译：用于在单个真空室内的衬底上沉积多层材料的装置和方法允许诸如这些结构的高通量沉积用于GMR和MRAM应用。分度机构根据结构中的层序列将衬底与多个靶中的每一个对准。每个目标使用静态物理气相沉积技术沉积材料。可以在目标和基板之间插入快门以阻止沉积工艺以改善沉积控制。快门还可以预清洁目标物或基底，并且还可用于沉积过程的机械切割。在替代实施例中，多个基板可以与多个靶顺序对准，以允许在单个真空室内同时沉积多个结构。可以通过在沉积过程中或之后感测每个相应的状态来优化设备状态，过程状态和晶片状态参数的监控和控制设备。

5. 发明授权

US06645847B2 Microelectronic interconnect material with adhesion promotion layer and fabrication method 失效
公开(公告)号：US06645847B2
公开(公告)日：2003-11-11
申请号：US10060548
申请日：2002-01-30
申请人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
发明人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
IPC分类号： H01L214763
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/28568 , H01L21/76843 , H01L21/76856 , H01L21/76876 , H01L21/76877 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.

6. 发明授权

US06596133B1 Method and system for physically-assisted chemical-vapor deposition 失效
标题翻译：物理辅助化学气相沉积的方法和系统
公开(公告)号：US06596133B1
公开(公告)日：2003-07-22
申请号：US09678467
申请日：2001-06-14
申请人： Mehrdad M. Moslehi , Ajit P. Paranjpe
发明人： Mehrdad M. Moslehi , Ajit P. Paranjpe
IPC分类号： C23C1432
CPC分类号： C23C14/3442 , C23C14/0031 , C23C14/3464 , C23C14/56 , C23C16/0281 , C23C16/48 , C23C16/54 , H01J37/3233 , H01J37/34
摘要： An apparatus and method for the deposition of thin film material layers provides improved use of processing chamber space for enhanced processing capability in the fabrication of microelectronic devices. In one embodiment, a physical-vapor deposition target offset from the processing chamber central axis, such as a target having an annular shape and central opening, deposits a material on a substrate while leaving the central region of the processing chamber available for other deposition techniques, including a centrally located sputtering target, CVD showerhead, or ion source. Alternatively, a collimator divides a processing chamber into sub-chambers and allows energetic species from a PVD target or ion source to pass to a substrate located in a separate sub-chamber for interaction with a CVD precursor without mixing the precursor and the plasma associated with the PVD or ion processes. The apparatus supports deposition of material from a single precursor in a manner that mimics atomic layer deposition since the process of subjecting a precursor to energetic species, such as ions or material atoms, allows disassociation of material from the precursor at lower temperatures.
摘要翻译：用于沉积薄膜材料层的装置和方法提供了改进的处理室空间的使用，用于在微电子器件的制造中增强处理能力。在一个实施例中，从处理室中心轴偏移的物理气相沉积靶，例如具有环形形状和中心开口的靶，将材料沉积在衬底上，同时使处理室的中心区域可用于其它沉积技术，包括中心位置的溅射靶，CVD喷头或离子源。或者，准直器将处理室划分为子室，并且允许来自PVD靶或离子源的能量物质传递到位于单独子室中的衬底，用于与CVD前体相互作用，而不混合前体和与 PVD或离子工艺。该设备支持以模拟原子层沉积的方式从单一前体沉积材料，因为使前体经受高能物质如离子或材料原子的过程允许材料在较低温度下与前体分离。

7. 发明授权

US06812126B1 Method for fabricating a semiconductor chip interconnect 失效
标题翻译：半导体芯片互连的制造方法
公开(公告)号：US06812126B1
公开(公告)日：2004-11-02
申请号：US09553933
申请日：2000-04-21
申请人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Randhir S. Bubber , Lino A. Velo
发明人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Randhir S. Bubber , Lino A. Velo
IPC分类号： H01L214763
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/28568 , H01L21/76843 , H01L21/76856 , H01L21/76876 , H01L21/76877 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier comprises a dopant selected from the group consisting of platinum, palladium, iridium, rhodium, and time. The barrier can comprises a refractory metal selected from the group consisting of tantalum, tungsten titanium, chromium, and cobalt, and can also comprise a third element selected from the group consisting of carbon, oxygen and nitrogen. The dopant and other barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.
摘要翻译：微电子半导体互连结构屏障和沉积方法为高性能器件互连提供改进的导电阻挡材料性质。阻挡层包括选自铂，钯，铱，铑和时间的掺杂剂。阻挡层可以包括选自钽，钨钛，铬和钴的难熔金属，并且还可以包含选自碳，氧和氮的第三元素。可以通过化学气相沉积来沉积掺杂剂和其它阻挡材料以实现良好的阶梯覆盖，并且具有良好成核表面的相对适形的薄膜用于随后的金属化，例如铜金属化。在一个实施例中，屏障抑制铜扩散到器件的其它层，包括金属间电介质，预金属电介质和晶体管结构。

8. 发明授权

US06444263B1 Method of chemical-vapor deposition of a material 失效
标题翻译：化学气相沉积材料的方法
公开(公告)号：US06444263B1
公开(公告)日：2002-09-03
申请号：US09663209
申请日：2000-09-15
申请人： Ajit P. Paranjpe , Randhir S. Bubber , Sanjay Gopinath , Thomas R. Omstead , Mehrdad M. Moslehi
发明人： Ajit P. Paranjpe , Randhir S. Bubber , Sanjay Gopinath , Thomas R. Omstead , Mehrdad M. Moslehi
IPC分类号： C23C1616
CPC分类号： C23C16/16 , C23C16/0281
摘要： A method for chemical-vapor deposition of a material film adds precursor decomposition by-product to the precursor flow to suppress premature gas-phase precursor decomposition and improve process repeatability and film quality. In one embodiment, CVD cobalt films are deposited with carbonyl precursors with reduced premature gas-phase reaction and particulate generation by the addition of excess carbon monoxide to the process chamber comprising the precursor flow. The addition of carbon monoxide not only suppresses gas-phase reaction but also improves cobalt film purity. The addition of excess carbon monoxide to CVD cobalt precursor flow provides repeatable deposition of glue and nucleation layers to support CVD copper, and is extendable to the deposition of high purity CVD cobalt for other applications and with other precursors, and also extendable for CVD CoSi2 films and other cobalt-containing applications.
摘要翻译：材料膜的化学气相沉积方法将前体分解副产物添加到前体流中以抑制过早气相前体分解，并提高工艺重复性和膜质量。在一个实施方案中，通过在包含前体流的处理室中加入过量的一氧化碳，将CVD钴膜沉积在羰基前体中，同时减少过早的气相反应和颗粒产生。加入一氧化碳不仅抑制了气相反应，而且还提高了钴膜的纯度。过量的一氧化碳添加到CVD钴前体流中提供了可重复沉积的胶和成核层以支持CVD铜，并且可扩展到用于其它应用和其它前体的高纯度CVD钴的沉积，并且还可用于CVD CoSi 2膜和其他含钴应用。

9. 发明授权

US06627995B2 Microelectronic interconnect material with adhesion promotion layer and fabrication method 失效
公开(公告)号：US06627995B2
公开(公告)日：2003-09-30
申请号：US10113191
申请日：2002-04-01
申请人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
发明人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
IPC分类号： H01L2348
CPC分类号： H01L21/76864 , H01L21/28556 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L21/76862 , H01L21/76876 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.

10. 发明授权

US06365502B1 Microelectronic interconnect material with adhesion promotion layer and fabrication method 失效
公开(公告)号：US06365502B1
公开(公告)日：2002-04-02
申请号：US09518294
申请日：2000-03-03
申请人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
发明人： Ajit P. Paranjpe , Mehrdad M. Moslehi , Boris Relja , Randhir S. Bubber , Lino A. Velo , Thomas R. Omstead , David R. Campbell, Sr. , David M. Leet , Sanjay Gopinath
IPC分类号： H01L214763
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/28568 , H01L21/76843 , H01L21/76856 , H01L21/76876 , H01L21/76877 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.

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