专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5254880A Large scale integrated circuit having low internal operating voltage 失效
标题翻译：具有低内部工作电压的大规模集成电路
公开(公告)号：US5254880A
公开(公告)日：1993-10-19
申请号：US863705
申请日：1992-04-03
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02 , H03K3/01 , H03K5/01
CPC分类号： G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , G11C5/147 , H01L27/0203
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

2. 发明授权

US5179539A Large scale integrated circuit having low internal operating voltage 失效
标题翻译：具有低内部工作电压的大规模集成电路
公开(公告)号：US5179539A
公开(公告)日：1993-01-12
申请号：US865677
申请日：1992-04-08
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02
CPC分类号： G11C5/147 , G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , H01L27/0203
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

3. 发明授权

US4994688A Semiconductor device having a reference voltage generating circuit 失效
标题翻译：具有基准电压发生电路的半导体装置
公开(公告)号：US4994688A
公开(公告)日：1991-02-19
申请号：US323966
申请日：1989-03-15
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02
CPC分类号： G11C5/147 , G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , H01L27/0203 , Y10S323/907
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

4. 发明授权

US5376839A Large scale integrated circuit having low internal operating voltage 失效
标题翻译：具有低内部工作电压的大规模集成电路
公开(公告)号：US5376839A
公开(公告)日：1994-12-27
申请号：US104340
申请日：1993-08-09
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02 , H03K3/01 , H03K3/26
CPC分类号： G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , G11C5/147 , H01L27/0203
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

5. 发明授权

US5402376A Semiconductor memory having redundancy circuit 失效
标题翻译：具有冗余电路的半导体存储器
公开(公告)号：US5402376A
公开(公告)日：1995-03-28
申请号：US103781
申请日：1993-08-10
申请人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
发明人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
IPC分类号： G11C11/413 , G11C5/14 , G11C11/401 , G11C29/00 , G11C29/04 , H01L21/82 , H01L21/8242 , H01L27/10 , H01L27/108 , G11C7/00
CPC分类号： G11C29/83 , G11C29/832 , G11C5/14
摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
摘要翻译：在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。

6. 发明授权

US5677880A Semiconductor memory having redundancy circuit 失效
标题翻译：具有冗余电路的半导体存储器
公开(公告)号：US5677880A
公开(公告)日：1997-10-14
申请号：US407850
申请日：1995-03-21
申请人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
发明人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
IPC分类号： G11C11/413 , G11C5/14 , G11C11/401 , G11C29/00 , G11C29/04 , H01L21/82 , H01L21/8242 , H01L27/10 , H01L27/108 , G11C7/00
CPC分类号： G11C29/83 , G11C29/832 , G11C5/14
摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
摘要翻译：在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。

7. 发明授权

US5262993A Semiconductor memory having redundancy circuit with means to switch power from a normal memory block to a spare memory block 失效
标题翻译：具有冗余电路的半导体存储器，具有将功率从正常存储块切换到备用存储块的装置
公开(公告)号：US5262993A
公开(公告)日：1993-11-16
申请号：US789024
申请日：1991-11-06
申请人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
发明人： Masashi Horiguchi , Jun Etoh , Masakazu Aoki , Yoshinobu Nakagome , Hitoshi Tanaka , Kiyoo Itoh
IPC分类号： G11C11/413 , G11C5/14 , G11C11/401 , G11C29/00 , G11C29/04 , H01L21/82 , H01L21/8242 , H01L27/10 , H01L27/108 , G11C7/00
CPC分类号： G11C29/83 , G11C29/832 , G11C5/14
摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
摘要翻译：在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。

8. 发明授权

US5262999A Large scale integrated circuit for low voltage operation 失效
标题翻译：用于低压运行的大规模集成电路
公开(公告)号：US5262999A
公开(公告)日：1993-11-16
申请号：US838505
申请日：1992-03-24
申请人： Jun Etoh , Kiyoo Itoh , Yoshiki Kawajiri , Yoshinobu Nakagome , Eiji Kume , Hitoshi Tanaka
发明人： Jun Etoh , Kiyoo Itoh , Yoshiki Kawajiri , Yoshinobu Nakagome , Eiji Kume , Hitoshi Tanaka
IPC分类号： G11C5/14 , G11C11/406 , G11C11/4074 , G11C11/4096 , G11C7/00
CPC分类号： G11C5/147 , G11C11/406 , G11C11/4074 , G11C11/4096
摘要： Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.
摘要翻译：公开了一种单芯片ULSI，其可以在宽范围的电源电压（1V至5.5V）中进行固定操作。该单芯片ULSI由一个电压转换器电路组成，该电路用于宽范围电源电压的固定内部电压，可适用于多个输入/输出电平的输入/输出缓冲器，一个动态RAM 可以在2V以下的电源电压下工作的这种单芯片ULSI可以应用于紧凑型便携式电子设备，例如笔记本型个人计算机，电子口袋笔记本，固态摄像机等

9. 发明授权

US5539279A Ferroelectric memory 失效
标题翻译：铁电存储器
公开(公告)号：US5539279A
公开(公告)日：1996-07-23
申请号：US362239
申请日：1994-12-22
申请人： Kan Takeuchi , Masashi Horiguchi , Masakazu Aoki , Katsumi Matsuno , Takeshi Sakata , Jun Etoh , Yoshinobu Nakagome
发明人： Kan Takeuchi , Masashi Horiguchi , Masakazu Aoki , Katsumi Matsuno , Takeshi Sakata , Jun Etoh , Yoshinobu Nakagome
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A highly reliable and high speed ferroelectric memory having a high degree of integration. In a ferroelectric memory having a multiple of memory cells M1, each constituted by one transistor and one ferroelectric capacitor, in the normal operation, the ferroelectric memory is used as a volatile memory in which a voltage on a storage node ST1 stores information in a DRAM mode. Both the electric potential at the plate PL1 of the ferroelectric capacitor and a precharge electric potential on a data line DL1(j) are Vcc/2. When the a power supply voltage is turned on, a polarization state is detected as a ferroelectric memory of a plate electric potential of Vcc/2 and a precharge electric potential of Vss (or Vcc) and the read operation is performed a FERAM mode. The switching between the DRAM mode and the FERAM mode is executed by generating a signal to designate the FERAM mode in the memory along with the turn-on of the power supply and by generating a signal to designate the DRAM mode after completion of the conversion operation from nonvolatile information to volatile information.
摘要翻译：具有高度集成度的高可靠性和高速铁电存储器。在具有由一个晶体管和一个铁电电容器构成的多个存储单元M1的铁电存储器中，在正常操作中，铁电存储器用作其中存储节点ST1上的电压将信息存储在DRAM中的易失性存储器模式。强电介质电容器的板PL1的电位和数据线DL1（j）的预充电电位都为Vcc / 2。当电源电压接通时，偏振状态被检测为Vcc / 2的电位电压和Vss（或Vcc）的预充电电位的铁电存储器，并且读取操作被执行FERAM模式。 DRAM模式和FERAM模式之间的切换通过产生一个信号来指示存储器中的FERAM模式以及电源的导通，并且在完成转换操作之后产生指定DRAM模式的信号从非易失性信息到易失性信息。

10. 发明授权

US5297097A Large scale integrated circuit for low voltage operation 失效
标题翻译：用于低压运行的大规模集成电路
公开(公告)号：US5297097A
公开(公告)日：1994-03-22
申请号：US366869
申请日：1989-06-14
申请人： Jun Etoh , Kiyoo Itoh , Yoshiki Kawajiri , Yoshinobu Nakagome , Eiji Kume , Hitoshi Tanaka
发明人： Jun Etoh , Kiyoo Itoh , Yoshiki Kawajiri , Yoshinobu Nakagome , Eiji Kume , Hitoshi Tanaka
IPC分类号： G11C5/14 , G11C11/406 , G11C11/4074 , G11C11/4096 , G11C11/407
CPC分类号： G11C11/4096 , G11C11/406 , G11C11/4074 , G11C5/147
摘要： Disclosed is a one-chip ULSI which can carry out fixed operations for a wide range of power supply voltages (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which provides a fixed internal voltage for a wide range of power supply voltages, an input/output buffer which can be adapted to several input/out interface levels, a dynamic or volatile RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.
摘要翻译：公开了一种单芯片ULSI，其可以对宽范围的电源电压（1V至5.5V）进行固定操作。该单芯片ULSI由一个电压转换器电路组成，该电路为广泛的电源电压提供固定的内部电压，可适应多个输入/输出接口电平的输入/输出缓冲器，动态或可以在2V以下的电源电压下工作的易失性RAM。该单芯片ULSI可以应用于紧凑型便携式电子设备，例如笔记本型个人计算机，电子口袋笔记本，固态摄像机等

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式