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1. 发明授权

US08860738B2 Image processing circuit, display device, and electronic device 有权
标题翻译：图像处理电路，显示设备和电子设备
公开(公告)号：US08860738B2
公开(公告)日：2014-10-14
申请号：US12639233
申请日：2009-12-16
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G06T1/00 , G06T15/00 , G09G5/36 , G09G5/39 , G09G3/20
CPC分类号： G09G3/20 , G09G5/39 , G09G2360/12
摘要： An object is to provide an image processing circuit adaptable to displays having a variety of pixel numbers. The image processing circuit includes a data adjustment circuit, a first line memory and a second line memory capable of storing K pieces of data, an output timing control circuit, and an arithmetic circuit. To the data adjustment circuit, (X×Y) pieces of pixel data are input. Y pieces of pixel data are transmitted to the first line memory. When Y is less than K, (K−Y) pieces of dummy data are added to fill the first line memory. Then, the K pieces of data are output from the first line memory to the second line memory and a new set of K data is input to the first line memory. The arithmetic circuit stores the data input from the line memories and performs filtering.
摘要翻译：目的在于提供一种适用于具有各种像素数的显示器的图像处理电路。图像处理电路包括能够存储K个数据的数据调整电路，第一行存储器和第二行存储器，输出定时控制电路和运算电路。向数据调整电路输入（X×Y）个像素数据。将Y个像素数据发送到第一行存储器。当Y小于K时，（K-Y）个虚拟数据被添加以填充第一行存储器。然后，将K个数据从第一行存储器输出到第二行存储器，并将一组新的K个数据输入到第一行存储器。算术电路存储从行存储器输入的数据并执行滤波。

2. 发明授权

US08427280B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08427280B2
公开(公告)日：2013-04-23
申请号：US13177583
申请日：2011-07-07
申请人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue
发明人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue
IPC分类号： H04Q5/22
CPC分类号： G06K19/07749
摘要： In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.
摘要翻译：在使用ASK方式进行半导体装置与读取器/写入器之间的通信方式的情况下，通过从半导体装置发送到读取器/写入器的数据，无线信号的振幅由数据不从读取器/写入器到半导体器件。因此，在某些情况下，半导体器件将从半导体器件本身发送的数据错误地从读取器/写入器发送到半导体器件的数据。半导体器件包括天线电路，发送电路，接收电路和运算处理电路。天线电路发送和接收无线电信号。发送电路向接收电路输出表示天线电路是否正在发送无线信号的信号。

3. 发明申请

US20120311365A1 PROGRAMMABLE LOGIC DEVICE 有权
标题翻译：可编程逻辑器件
公开(公告)号：US20120311365A1
公开(公告)日：2012-12-06
申请号：US13477192
申请日：2012-05-22
申请人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
发明人： Seiichi Yoneda , Jun Koyama , Yutaka Shionoiri , Masami Endo , Hiroki Dembo , Tatsuji Nishijima , Hidetomo Kobayashi , Kazuaki Ohshima
IPC分类号： G06F1/32
CPC分类号： H03K19/173 , G06F1/3243 , G06F3/0679 , H03K19/17772 , Y02D10/152
摘要： An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.
摘要翻译：目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

4. 发明申请

US20120294080A1 MEMORY DEVICE AND METHOD FOR DRIVING MEMORY DEVICE 有权
标题翻译：用于驱动存储器件的存储器件和方法
公开(公告)号：US20120294080A1
公开(公告)日：2012-11-22
申请号：US13472549
申请日：2012-05-16
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G11C11/40
CPC分类号： G11C11/4085 , G11C8/12 , G11C29/12005 , G11C29/26 , G11C2029/1206
摘要： A memory device according to the invention can be operated with a single potential, by which the use of a voltage converter can be excluded, leading to the reduction of power consumption. Such an operation can be achieved by utilizing capacitive coupling of a capacitor connected to a gate of a transistor for data writing. That is, the capacitive coupling is induced by inputting a signal, which is supplied by a delay circuit configured to delay a write signal having a potential equal to the power supply potential, to the capacitor. Increase in the potential of the gate by the capacitive coupling allows the transistor to be turned on in association with the power supply potential applied to the gate from a power supply. Data is written by inputting a signal having a potential equal to the power supply potential or a grounded potential to a node through the transistor.
摘要翻译：根据本发明的存储器件可以以单个电位工作，通过该电位可以排除使用电压转换器，导致功耗的降低。这种操作可以通过利用连接到晶体管的栅极的电容器进行数据写入的电容耦合来实现。也就是说，通过输入由延迟电路提供的信号来感应电容耦合，该延迟电路被配置为将具有等于电源电位的电位的写入信号延迟到电容器。通过电容耦合增加栅极的电位使晶体管与从电源施加到栅极的电源电位相关联地导通。通过晶体管将具有等于电源电位的电位或接地电位的信号输入到节点来写入数据。

5. 发明授权

US08261999B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08261999B2
公开(公告)日：2012-09-11
申请号：US12943591
申请日：2010-11-10
申请人： Takayuki Ikeda , Yoshiyuki Kurokawa , Masami Endo
发明人： Takayuki Ikeda , Yoshiyuki Kurokawa , Masami Endo
IPC分类号： G06K19/06
CPC分类号： G06K19/07749 , G06F1/189 , G06F1/26
摘要： A semiconductor device such as an RFID, which can easily generate a given stable potential, is provided. Circuits included in a semiconductor device are categorized depending on whether a given stable power source potential is necessary. A power source potential generated from a wireless signal received by an antenna with the use of the antenna and a rectifier circuit is supplied to a circuit which needs a given stable power source potential through a regulator. On the other hand, a power source potential generated by the rectifier circuit is supplied to a circuit other than the circuit which needs the arbitrary power source potential. Thus, a semiconductor device including a regulator circuit easily designed with a smaller layout can be provided, and the semiconductor device can easily generate a given stable power source potential.
摘要翻译：提供了诸如RFID的半导体器件，其可以容易地产生给定的稳定电位。包括在半导体器件中的电路根据是否需要给定的稳定电源电位进行分类。由使用天线和整流电路由天线接收的无线信号产生的电源电位通过调节器提供给需要给定稳定电源电位的电路。另一方面，由整流电路产生的电源电位被供给到需要任意电源电位的电路以外的电路。因此，可以提供包括容易设计成具有较小布局的调节器电路的半导体器件，并且半导体器件可以容易地产生给定的稳定的电源电位。

6. 发明授权

US08004510B2 Control circuit of display device, and display device, and display device and electronic appliance incorporating the same 有权
标题翻译：显示装置的控制电路，显示装置以及包含该装置的显示装置和电子装置
公开(公告)号：US08004510B2
公开(公告)日：2011-08-23
申请号：US12959667
申请日：2010-12-03
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G06F3/038
CPC分类号： G09G3/3275 , G09G5/399 , G09G2360/18
摘要： An object is to realize downsizing and cost reduction of a display device by efficiently using a physical region of a memory in a control circuit of the display device. A structure of a video data storage portion of the control circuit is that provided with a video data storage portion for storing video data of an n-th frame (n is a natural number), a video data storage portion for storing video data of an (n+1)th frame, and a video data storage portion for sharing video data of the n-th frame and the (n+1)th frame among received video data.
摘要翻译：目的是通过有效地使用显示装置的控制电路中的存储器的物理区域来实现显示装置的小型化和降低成本。控制电路的视频数据存储部分的结构是设置有用于存储第n帧（n是自然数）的视频数据的视频数据存储部分，用于存储第n帧的视频数据的视频数据存储部分（n + 1）帧，以及用于共享所接收的视频数据中的第n帧和第（n + 1）帧的视频数据的视频数据存储部分。

7. 发明申请

US20110096047A1 DISPLAY DEVICE AND SEMICONDUCTOR DEVICE 有权
标题翻译：显示器件和半导体器件
公开(公告)号：US20110096047A1
公开(公告)日：2011-04-28
申请号：US12908299
申请日：2010-10-20
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G09G5/10 , G01J1/32
CPC分类号： G01J1/04 , G01J1/32 , G02F1/13318 , G02F2001/13312 , G02F2001/133626 , G02F2001/136281 , G02F2001/136295 , G02F2001/13793 , G02F2201/58 , G02F2203/30 , G02F2203/68 , G06F3/0412 , G06F3/042 , G09G2360/148 , H01L27/3227 , H01L27/3269 , H04N1/00129 , H05B33/0872 , H05B37/0218 , Y02B20/46
摘要： An object is to detect reflected light from an object accurately and to improve accuracy of capturing an image in a photosensor included in a display panel. In the display panel including a photosensor, when an image of an object is captured, light is emitted from a light source to the object and reflected light enters the photosensor. In the case where the incident light is too strong with respect to sensitivity of the photosensor, luminance of the light source is lowered. In the case where the incident light is too weak with respect to sensitivity of the photosensor, the luminance of the light source is increased.
摘要翻译：目的是准确地检测来自物体的反射光，并提高在包含在显示面板中的光电传感器中拍摄图像的精度。在包括光电传感器的显示面板中，当拍摄对象的图像时，从光源发射光到物体，反射光进入光传感器。在入射光相对于光传感器的灵敏度太强的情况下，光源的亮度降低。在入射光相对于光传感器的灵敏度太弱的情况下，光源的亮度增加。

8. 发明申请

US20100156914A1 IMAGE PROCESSING CIRCUIT, DISPLAY DEVICE, AND ELECTRONIC DEVICE 有权
标题翻译：图像处理电路，显示装置和电子装置
公开(公告)号：US20100156914A1
公开(公告)日：2010-06-24
申请号：US12639233
申请日：2009-12-16
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G09G5/36 , G06F3/038 , G06T1/60
CPC分类号： G09G3/20 , G09G5/39 , G09G2360/12
摘要： An object is to provide an image processing circuit adaptable to displays having a variety of pixel numbers. The image processing circuit includes a data adjustment circuit, a first line memory and a second line memory capable of storing K pieces of data, an output timing control circuit, and an arithmetic circuit. To the data adjustment circuit, (X×Y) pieces of pixel data are input. Y pieces of pixel data are transmitted to the first line memory. When Y is less than K, (K−Y) pieces of dummy data are added to fill the first line memory. Then, the K pieces of data are output from the first line memory to the second line memory and a new set of K data is input to the first line memory. The arithmetic circuit stores the data input from the line memories and performs filtering.
摘要翻译：目的在于提供一种适用于具有各种像素数的显示器的图像处理电路。图像处理电路包括能够存储K个数据的数据调整电路，第一行存储器和第二行存储器，输出定时控制电路和运算电路。向数据调整电路输入（X×Y）个像素数据。将Y个像素数据发送到第一行存储器。当Y小于K时，（K-Y）个虚拟数据被添加以填充第一行存储器。然后，将K个数据从第一行存储器输出到第二行存储器，并将一组新的K个数据输入到第一行存储器。算术电路存储从行存储器输入的数据并执行滤波。

9. 发明申请

US20100045355A1 CLOCK SIGNAL GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE 有权
标题翻译：时钟信号发生电路和半导体器件
公开(公告)号：US20100045355A1
公开(公告)日：2010-02-25
申请号：US12609422
申请日：2009-10-30
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： H03K3/00 , H03K3/013
CPC分类号： G06F1/04
摘要： In a semiconductor device capable of radio communication, a stable clock signal is generated even if a reference clock signal for generating a clock signal has varied frequencies in each cycle. A clock signal generation circuit includes an edge detection circuit that detects an edge of an input signal and generates a synchronization signal, a reference clock signal generation circuit that generates a clock signal which functions as reference, a counter circuit that counts the number of edges of rise of the reference clock signal in accordance with the synchronization signal, a duty ratio selection circuit that selects a duty ratio of a clock signal from a count value, and a frequency division circuit that generates the clock signal having the selected duty ratio.
摘要翻译：在能够进行无线电通信的半导体器件中，即使用于产生时钟信号的参考时钟信号在每个周期中具有变化的频率，也产生稳定的时钟信号。时钟信号生成电路包括检测输入信号的边沿并产生同步信号的边沿检测电路，产生用作基准的时钟信号的基准时钟信号生成电路，对第基于同步信号的参考时钟信号的上升，从计数值选择时钟信号的占空比的占空比选择电路和产生具有所选占空比的时钟信号的分频电路。

10. 发明申请

US20090189323A1 Fluid filled type cylindrical vibration damping device 失效
标题翻译：流体填充型圆柱形减震装置
公开(公告)号：US20090189323A1
公开(公告)日：2009-07-30
申请号：US12292246
申请日：2008-11-14
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： F16F13/00
CPC分类号： F16F13/1409
摘要： A fluid filled type cylindrical vibration damping device, wherein a circumferential end of a stopper member is formed as a mating element smaller in diameter than a circumferentially center section of the stopper member, and is juxtaposed against and supported on a bottom face of a mating groove in a communication passage, to form the communication passage along an entire area between diametrically opposed faces of the mating element and an outer tubular member. A cutout portion is formed extending in a circumferential direction from a circumferential end in a widthwise medial section of the mating element, with the communication passage opening into and communicating with a first fluid chamber at a distal end section of the cutout portion, and at two widthwise side sections of the mating element, respectively, thereby defining an orifice passage connecting the first fluid chamber with a second fluid chamber.
摘要翻译：一种流体填充型圆柱形减震装置，其中止动件的周向端部形成为直径小于止动件的周向中心部分的配合元件，并且与配合槽的底面并置并支撑在其上在连通通道中，沿着配合元件的直径相对的面和外部管状构件之间的整个区域形成连通通道。从配合元件的宽度方向中间部的周向端部沿圆周方向形成有切口部，连通路与开口部的前端部的第一流体室开口连通，两端从而限定了将第一流体室与第二流体室连接的孔口通道。

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