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    • 2. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09570445B2
    • 2017-02-14
    • US14339948
    • 2014-07-24
    • Semiconductor Energy Laboratory Co., Ltd.
    • Kazuaki Ohshima
    • H01L27/108H01L27/105H01L27/06H01L27/092H01L27/12H03K19/00H03K19/177
    • H01L27/105H01L27/0605H01L27/0688H01L27/092H01L27/108H01L27/1203H03K19/0013H03K19/1776H03K19/17772
    • A semiconductor device having a novel structure is provided. The semiconductor device includes a first p-type transistor, a second n-type transistor, a third transistor, and a fourth transistor. One of a source and a drain of the third transistor is connected to a wiring supplying first potential, and the other is connected to one of a source and a drain of the first transistor. One of a source and a drain of the second transistor is connected to the other of the source and the drain of the first transistor, and the other is connected to one of a source and a drain of the fourth transistor. The other of the source and the drain of the fourth transistor is connected to a wiring supplying second potential lower than the first potential. An oxide semiconductor material is used in channel formation regions of the third transistor and the fourth transistor.
    • 提供具有新颖结构的半导体器件。 半导体器件包括第一p型晶体管,第二n型晶体管,第三晶体管和第四晶体管。 第三晶体管的源极和漏极之一连接到提供第一电位的布线,另一个连接到第一晶体管的源极和漏极之一。 第二晶体管的源极和漏极之一连接到第一晶体管的源极和漏极中的另一个,另一个连接到第四晶体管的源极和漏极之一。 第四晶体管的源极和漏极中的另一个连接到提供低于第一电位的第二电位的布线。 在第三晶体管和第四晶体管的沟道形成区域中使用氧化物半导体材料。
    • 4. 发明授权
    • Power management system for integrated circuits
    • 集成电路电源管理系统
    • US09419624B2
    • 2016-08-16
    • US14539697
    • 2014-11-12
    • Xilinx, Inc.
    • Austin H. Lesea
    • H03K19/173H03K19/177H03K19/0175
    • H03K19/17772H03K19/00384H03K19/017509H03K19/17784
    • An apparatus includes a plurality of programmable hardware resources and an analog-to-digital converter (ADC) disposed on an IC die. The ADC is configured to quantize values of one or more analog parameters of the IC die. The apparatus also includes a configuration control circuit configured to program the programmable hardware resources in response to a set of configuration data. The programmable hardware resources are programmed to implement a set of circuits specified by the configuration data and to connect the ADC to respective nodes of the IC die for sampling the analog parameters. The apparatus also includes an interface circuit coupled to the ADC and configured to generate a control signal based on quantized values of the one or more analog parameters from the ADC. The interface circuit outputs the control signal to a power supply coupled to a power terminal of the IC die.
    • 一种装置包括多个可编程硬件资源和设置在IC芯片上的模数转换器(ADC)。 ADC被配置为量化IC芯片的一个或多个模拟参数的值。 该装置还包括配置控制电路,配置为响应于一组配置数据对可编程硬件资源进行编程。 可编程硬件资源被编程为实现由配置数据指定的一组电路,并将ADC连接到IC芯片的相应节点,以对模拟参数进行采样。 该装置还包括耦合到ADC并被配置为基于来自ADC的一个或多个模拟参数的量化值产生控制信号的接口电路。 接口电路将控制信号输出到耦合到IC芯片的电源端子的电源。
    • 5. 发明授权
    • Programmable logic circuit
    • 可编程逻辑电路
    • US09397664B2
    • 2016-07-19
    • US14282288
    • 2014-05-20
    • Semiconductor Energy Laboratory Co., Ltd.
    • Yoshiya Takewaki
    • H03K19/0175H03K19/0948H03K19/177
    • H03K19/017581H03K19/0948H03K19/1776H03K19/17772
    • A logic circuit is provided which can hold a switching state of the logic circuit even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, can operate with low power consumption, and can easily switch between a NAND circuit and a NOR circuit. Switching between a NAND circuit and a NOR circuit is achieved by switching a charge holding state at a node through a transistor including an oxide semiconductor. With the use of an oxide semiconductor material which is a wide bandgap semiconductor for the transistor, the off-state current of the transistor can be sufficiently reduced; thus, the state of charge held at the node can be non-volatile.
    • 提供一种逻辑电路,即使在未提供电源电位时也能够保持逻辑电路的开关状态,在供电之后逻辑块的启动时间短,可以以低功耗工作,并且可以 容易地在NAND电路和NOR电路之间切换。 在NAND电路和NOR电路之间的切换是通过包括氧化物半导体的晶体管切换节点处的电荷保持状态来实现的。 通过使用作为晶体管的宽带隙半导体的氧化物半导体材料,可以充分降低晶体管的截止电流; 因此,在节点处保持的电荷状态可以是非易失性的。
    • 6. 发明授权
    • Programmable logic device
    • 可编程逻辑器件
    • US09165942B2
    • 2015-10-20
    • US13903165
    • 2013-05-28
    • Semiconductor Energy Laboratory Co., Ltd.
    • Tatsuji Nishijima
    • H03K19/177H01L25/00H01L27/118
    • H01L27/11803H03K19/17728H03K19/1776H03K19/17772
    • An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.
    • 本发明的目的是提供一种可编程逻辑器件,其在供电停止,高度集成并且以低功率运行后具有短的启动时间。 在包括输入/​​输出块,包括逻辑元件的多个逻辑块和连接多个逻辑块的布线的可编程逻辑器件中,逻辑元件具有用于保存配置数据和查找表的配置存储器 包括选择电路。 配置存储器包括多个存储元件,每个存储元件包括沟道区域在氧化物半导体膜中的晶体管和设置在晶体管和选择电路之间的运算电路。 配置数据根据输入信号由选择电路选择性地改变和输出。
    • 7. 发明授权
    • Logic circuit
    • 逻辑电路
    • US08779799B2
    • 2014-07-15
    • US13467500
    • 2012-05-09
    • Yoshiya Takewaki
    • Yoshiya Takewaki
    • H03K19/20G11C11/34
    • H03K19/017581H03K19/0948H03K19/1776H03K19/17772
    • A logic circuit is provided which can hold a switching state of the logic circuit even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, can operate with low power consumption, and can easily switch between a NAND circuit and a NOR circuit. Switching between a NAND circuit and a NOR circuit is achieved by switching a charge holding state at a node through a transistor including an oxide semiconductor. With the use of an oxide semiconductor material which is a wide bandgap semiconductor for the transistor, the off-state current of the transistor can be sufficiently reduced; thus, the state of charge held at the node can be non-volatile.
    • 提供一种逻辑电路,即使在未提供电源电位时也能够保持逻辑电路的开关状态,在供电之后逻辑块的启动时间短,可以以低功耗工作,并且可以 容易地在NAND电路和NOR电路之间切换。 在NAND电路和NOR电路之间的切换是通过包括氧化物半导体的晶体管切换节点处的电荷保持状态来实现的。 通过使用作为晶体管的宽带隙半导体的氧化物半导体材料,可以充分降低晶体管的截止电流; 因此,在节点处保持的电荷状态可以是非易失性的。
    • 10. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08415977B1
    • 2013-04-09
    • US13469930
    • 2012-05-11
    • Masato OdaShinichi Yasuda
    • Masato OdaShinichi Yasuda
    • H03K19/177
    • H03K19/17784H03K19/17772
    • A semiconductor integrated circuit in an embodiment includes a first circuit group that includes at least one first logic block and a second circuit group that includes second logic blocks. The number of the second logic blocks is greater than the number of the first logic blocks. The first circuit group includes a first switching block and a first power control circuit. The first power control circuit commonly controls a start of power supply and a stop of the power supply for the first logic block and the first switching block. The second circuit group includes second switching blocks and a second power control circuit. The second power control circuit commonly controls a start of power supply and a stop of the power supply for the second logic blocks and the second switching blocks.
    • 实施例中的半导体集成电路包括包括至少一个第一逻辑块的第一电路组和包括第二逻辑块的第二电路组。 第二逻辑块的数量大于第一逻辑块的数量。 第一电路组包括第一开关块和第一功率控制电路。 第一功率控制电路通常控制第一逻辑块和第一切换块的电源的开始和电源的停止。 第二电路组包括第二开关块和第二功率控制电路。 第二功率控制电路通常控制第二逻辑块和第二切换块的电源的开始和电源的停止。