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1. 发明申请

US20110209155A1 SPECULATIVE THREAD EXECUTION WITH HARDWARE TRANSACTIONAL MEMORY 有权
标题翻译：具有硬件交互式存储器的线性螺纹执行
公开(公告)号：US20110209155A1
公开(公告)日：2011-08-25
申请号：US12711352
申请日：2010-02-24
申请人： Mark E. Giampapa , Thomas M. Gooding , Raul E. Silvera , Kai-Ting Amy Wang , Peng Wu , Xiaotong Zhuang
发明人： Mark E. Giampapa , Thomas M. Gooding , Raul E. Silvera , Kai-Ting Amy Wang , Peng Wu , Xiaotong Zhuang
IPC分类号： G06F9/46 , G06F12/08 , G06F12/00
CPC分类号： G06F9/466 , G06F9/3842 , G06F9/467 , G06F9/4843 , G06F9/4881 , G06F9/5016 , G06F9/52 , G06F12/0862
摘要： In an embodiment, if a self thread has more than one conflict, a transaction of the self thread is aborted and restarted. If the self thread has only one conflict and an enemy thread of the self thread has more than one conflict, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread and the enemy thread only conflicts with the self thread and the self thread has a key that has a higher priority than a key of the enemy thread, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread, the enemy thread only conflicts with the self thread, and the self thread has a key that has a lower priority than the key of the enemy thread, the transaction of the self thread is aborted.
摘要翻译：在一个实施例中，如果自线程具有多于一个冲突，则自线程的事务被中止并重新启动。如果自线程只有一个冲突，并且自线程的敌方线程有多个冲突，则自线程的事务被提交。如果自线程只与敌方线程冲突，敌方线程只与自线程冲突，自线程的密钥优先级高于敌方线程的密钥，则自线程的事务被提交。如果自线程只与敌方线程相冲突，敌方线程只会与自身线程冲突，自线程的密钥优先级低于敌方线程的密钥，自身线程的事务中止。

2. 发明授权

US08438568B2 Speculative thread execution with hardware transactional memory 有权
标题翻译：使用硬件事务内存的推测线程执行
公开(公告)号：US08438568B2
公开(公告)日：2013-05-07
申请号：US12711352
申请日：2010-02-24
申请人： Mark E. Giampapa , Thomas M. Gooding , Raul E. Silvera , Kai-Ting Amy Wang , Peng Wu , Xiaotong Zhuang
发明人： Mark E. Giampapa , Thomas M. Gooding , Raul E. Silvera , Kai-Ting Amy Wang , Peng Wu , Xiaotong Zhuang
IPC分类号： G06F9/46 , G06F7/00 , G06F13/00
CPC分类号： G06F9/466 , G06F9/3842 , G06F9/467 , G06F9/4843 , G06F9/4881 , G06F9/5016 , G06F9/52 , G06F12/0862
摘要： In an embodiment, if a self thread has more than one conflict, a transaction of the self thread is aborted and restarted. If the self thread has only one conflict and an enemy thread of the self thread has more than one conflict, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread and the enemy thread only conflicts with the self thread and the self thread has a key that has a higher priority than a key of the enemy thread, the transaction of the self thread is committed. If the self thread only conflicts with the enemy thread, the enemy thread only conflicts with the self thread, and the self thread has a key that has a lower priority than the key of the enemy thread, the transaction of the self thread is aborted.
摘要翻译：在一个实施例中，如果自线程具有多于一个冲突，则自线程的事务被中止并重新启动。如果自线程只有一个冲突，并且自线程的敌方线程有多个冲突，则自线程的事务被提交。如果自线程只与敌方线程冲突，敌方线程只与自线程冲突，自线程的密钥优先级高于敌方线程的密钥，则自线程的事务被提交。如果自线程只与敌方线程相冲突，敌方线程只会与自身线程冲突，自线程的密钥优先级低于敌方线程的密钥，自身线程的事务中止。

3. 发明授权

US08640113B2 setjmp/longjmp for speculative execution frameworks 失效
标题翻译： setjmp / longjmp用于推测执行框架
公开(公告)号：US08640113B2
公开(公告)日：2014-01-28
申请号：US13026702
申请日：2011-02-14
申请人： Raul Esteban Silvera , Kai-Ting Amy Wang , Peng Wu , Mark Wayne Yamashita , Xiaotong Zhuang
发明人： Raul Esteban Silvera , Kai-Ting Amy Wang , Peng Wu , Mark Wayne Yamashita , Xiaotong Zhuang
IPC分类号： G06F9/45
CPC分类号： G06F9/3842 , G06F9/3004 , G06F9/30054 , G06F9/30087 , G06F9/4484
摘要： A process for check pointing in speculative execution frameworks, identifies calls to a set of setjmp/longjmp instructions to form identified calls to setjmp/longjmp, determines a control flow path between a call to a setjmp and a longjmp pair of instructions in the identified calls to setjmp/longjmp and replaces calls to the setjmp/longjmp pair of instructions with calls to an improved_setjmp and improved_longjmp instruction pair. The process creates a context data structure in memory, computes a non-volatile save/restore set and replaces the call to improved_setjmp of the setjmp/longjmp pair of instructions with instructions to save all required non-volatile and special purpose registers and replaces a call to improved_longjmp of the setjmp/longjmp pair of instructions with instructions to restore all required non-volatile and special purpose registers and to branch to an instruction immediately following a block of code containing the call to improved_setjmp.
摘要翻译：用于检查指向推测执行框架的过程，识别对一组setjmp / longjmp指令的调用以形成对setjmp / longjmp的标识的调用，确定在所识别的呼叫中对setjmp的调用和longjmp指令之间的控制流路径到setjmp / longjmp，并且通过调用一个improved_setjmp和improved_longjmp指令对来替换对setjmp / longjmp指令对的调用。该过程在内存中创建一个上下文数据结构，计算一个非易失性存储/恢复集，并用setjmp / longjmp指令对来替换一个改进_setjmp的调用，其中包含所有需要的非易失性和特殊用途寄存器的指令，并替换一个调用到具有用于恢复所有需要的非易失性和特殊目的寄存器的指令的setjmp / longjmp指令指令的改进_longjmp，并且分支到紧跟在包含对converted_setjmp的调用的代码块之后的指令。

4. 发明申请

US20110289303A1 SETJMP/LONGJMP FOR SPECULATIVE EXECUTION FRAMEWORKS 失效
标题翻译：用于统一执行框架的SETJMP / LONGJMP
公开(公告)号：US20110289303A1
公开(公告)日：2011-11-24
申请号：US13026702
申请日：2011-02-14
申请人： Raul Esteban Silvera , Kai-Ting Amy Wang , Peng Wu , Mark Wayne Yamashita , Xiaotong Zhuang
发明人： Raul Esteban Silvera , Kai-Ting Amy Wang , Peng Wu , Mark Wayne Yamashita , Xiaotong Zhuang
IPC分类号： G06F9/312
CPC分类号： G06F9/3842 , G06F9/3004 , G06F9/30054 , G06F9/30087 , G06F9/4484
摘要： A process for check pointing in speculative execution frameworks, identifies calls to a set of setjmp/longjmp instructions to form identified calls to setjmp/longjmp, determines a control flow path between a call to a setjmp and a longjmp pair of instructions in the identified calls to setjmp/longjmp and replaces calls to the setjmp/longjmp pair of instructions with calls to an improved_setjmp and improved_longjmp instruction pair. The process creates a context data structure in memory, computes a non-volatile save/restore set and replaces the call to improved_setjmp of the setjmp/longjmp pair of instructions with instructions to save all required non-volatile and special purpose registers and replaces a call to improved_longjmp of the setjmp/longjmp pair of instructions with instructions to restore all required non-volatile and special purpose registers and to branch to an instruction immediately following a block of code containing the call to improved_setjmp.
摘要翻译：用于检查指向推测执行框架的过程，识别对一组setjmp / longjmp指令的调用以形成对setjmp / longjmp的标识的调用，确定在所识别的呼叫中对setjmp的调用和longjmp指令之间的控制流路径到setjmp / longjmp，并且通过调用一个improved_setjmp和improved_longjmp指令对来替换对setjmp / longjmp指令对的调用。该过程在内存中创建一个上下文数据结构，计算一个非易失性存储/恢复集，并用setjmp / longjmp指令对来替换一个改进_setjmp的调用，其中包含所有需要的非易失性和特殊用途寄存器的指令，并替换一个调用到具有用于恢复所有需要的非易失性和特殊目的寄存器的指令的setjmp / longjmp指令指令的改进_longjmp，并且分支到紧跟在包含对converted_setjmp的调用的代码块之后的指令。

5. 发明授权

US09081501B2 Multi-petascale highly efficient parallel supercomputer 有权
标题翻译：多千兆高效并行超级计算机
公开(公告)号：US09081501B2
公开(公告)日：2015-07-14
申请号：US13004007
申请日：2011-01-10
申请人： Sameh Asaad , Ralph E. Bellofatto , Michael A. Blocksome , Matthias A. Blumrich , Peter Boyle , Jose R. Brunheroto , Dong Chen , Chen-Yong Cher , George L. Chiu , Norman Christ , Paul W. Coteus , Kristan D. Davis , Gabor J. Dozsa , Alexandre E. Eichenberger , Noel A. Eisley , Matthew R. Ellavsky , Kahn C. Evans , Bruce M. Fleischer , Thomas W. Fox , Alan Gara , Mark E. Giampapa , Thomas M. Gooding , Michael K. Gschwind , John A. Gunnels , Shawn A. Hall , Rudolf A. Haring , Philip Heidelberger , Todd A. Inglett , Brant L. Knudson , Gerard V. Kopcsay , Sameer Kumar , Amith R. Mamidala , James A. Marcella , Mark G. Megerian , Douglas R. Miller , Samuel J. Miller , Adam J. Muff , Michael B. Mundy , John K. O'Brien , Kathryn M. O'Brien , Martin Ohmacht , Jeffrey J. Parker , Ruth J. Poole , Joseph D. Ratterman , Valentina Salapura , David L. Satterfield , Robert M. Senger , Brian Smith , Burkhard Steinmacher-Burow , William M. Stockdell , Craig B. Stunkel , Krishnan Sugavanam , Yutaka Sugawara , Todd E. Takken , Barry M. Trager , James L. Van Oosten , Charles D. Wait , Robert E. Walkup , Alfred T. Watson , Robert W. Wisniewski , Peng Wu
发明人： Sameh Asaad , Ralph E. Bellofatto , Michael A. Blocksome , Matthias A. Blumrich , Peter Boyle , Jose R. Brunheroto , Dong Chen , Chen-Yong Cher , George L. Chiu , Norman Christ , Paul W. Coteus , Kristan D. Davis , Gabor J. Dozsa , Alexandre E. Eichenberger , Noel A. Eisley , Matthew R. Ellavsky , Kahn C. Evans , Bruce M. Fleischer , Thomas W. Fox , Alan Gara , Mark E. Giampapa , Thomas M. Gooding , Michael K. Gschwind , John A. Gunnels , Shawn A. Hall , Rudolf A. Haring , Philip Heidelberger , Todd A. Inglett , Brant L. Knudson , Gerard V. Kopcsay , Sameer Kumar , Amith R. Mamidala , James A. Marcella , Mark G. Megerian , Douglas R. Miller , Samuel J. Miller , Adam J. Muff , Michael B. Mundy , John K. O'Brien , Kathryn M. O'Brien , Martin Ohmacht , Jeffrey J. Parker , Ruth J. Poole , Joseph D. Ratterman , Valentina Salapura , David L. Satterfield , Robert M. Senger , Brian Smith , Burkhard Steinmacher-Burow , William M. Stockdell , Craig B. Stunkel , Krishnan Sugavanam , Yutaka Sugawara , Todd E. Takken , Barry M. Trager , James L. Van Oosten , Charles D. Wait , Robert E. Walkup , Alfred T. Watson , Robert W. Wisniewski , Peng Wu
IPC分类号： G06F15/173 , G06F9/06 , G06F15/76
CPC分类号： G06F13/287 , G06F9/06 , G06F9/3004 , G06F9/30047 , G06F9/3885 , G06F12/0811 , G06F12/0831 , G06F12/0862 , G06F12/0864 , G06F12/1027 , G06F15/17381 , G06F15/17387 , G06F15/76 , G06F15/8069 , G06F2212/1016 , G06F2212/602 , G06F2212/6022 , G06F2212/6024 , G06F2212/6032 , Y02D10/13 , Y02D10/14
摘要： A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC). Each ASIC computing node comprises a system-on-chip ASIC utilizing four or more processors integrated into one die, with each having full access to all system resources and enabling adaptive partitioning of the processors to functions such as compute or messaging I/O on an application by application basis, and preferably, enable adaptive partitioning of functions in accordance with various algorithmic phases within an application, or if I/O or other processors are underutilized, then can participate in computation or communication nodes are interconnected by a five dimensional torus network with DMA that optimally maximize the throughput of packet communications between nodes and minimize latency.
摘要翻译：具有100 petaOPS规模计算的多Petascale高效并行超级计算机，其成本，功耗和占地面积都在降低，并且允许从互连角度来看处理节点的最大封装密度。超级计算机利用了VLSI的技术进步，实现了许多处理器可以集成到单个专用集成电路（ASIC）中的计算模型。每个ASIC计算节点包括利用集成到一个管芯中的四个或更多个处理器的片上系统ASIC，每个处理器具有对所有系统资源的完全访问，并且使得处理器能够对诸如计算或消息传递I / O 并且优选地，根据应用内的各种算法阶段实现功能的自适应分割，或者如果I / O或其他处理器未被充分利用，则可以参与计算或通信节点通过五维环面网络互连使用DMA来最大限度地最大化节点之间的分组通信的吞吐量并最小化等待时间。

6. 发明申请

US20110219208A1 MULTI-PETASCALE HIGHLY EFFICIENT PARALLEL SUPERCOMPUTER 有权
标题翻译：多层高效平行超级计算机
公开(公告)号：US20110219208A1
公开(公告)日：2011-09-08
申请号：US13004007
申请日：2011-01-10
申请人： Sameh Asaad , Ralph E. Bellofatto , Michael A. Blocksome , Matthias A. Blumrich , Peter Boyle , Jose R. Brunheroto , Dong Chen , Chen-Yong Cher , George L. Chiu , Norman Christ , Paul W. Coteus , Kristan D. Davis , Gabor J. Dozsa , Alexandre E. Eichenberger , Noel A. Eisley , Matthew R. Ellavsky , Kahn C. Evans , Bruce M. Fleischer , Thomas W. Fox , Alan Gara , Mark E. Giampapa , Thomas M. Gooding , Michael K. Gschwind , John A. Gunnels , Shawn A. Hall , Rudolf A. Haring , Philip Heidelberger , Todd A. Inglett , Brant L. Knudson , Gerard V. Kopcsay , Sameer Kumar , Amith R. Mamidala , James A. Marcella , Mark G. Megerian , Douglas R. Miller , Samuel J. Miller , Adam J. Muff , Michael B. Mundy , John K. O'Brien , Kathryn M. O'Brien , Martin Ohmacht , Jeffrey J. Parker , Ruth J. Poole , Joseph D. Ratterman , Valentina Salapura , David L. Satterfield , Robert M. Senger , Brian Smith , Burkhard Steinmacher-Burow , William M. Stockdell , Craig B. Stunkel , Krishnan Sugavanam , Yutaka Sugawara , Todd E. Takken , Barry M. Trager , James L. Van Oosten , Charles D. Wait , Robert E. Walkup , Alfred T. Watson , Robert W. Wisniewski , Peng Wu
发明人： Sameh Asaad , Ralph E. Bellofatto , Michael A. Blocksome , Matthias A. Blumrich , Peter Boyle , Jose R. Brunheroto , Dong Chen , Chen-Yong Cher , George L. Chiu , Norman Christ , Paul W. Coteus , Kristan D. Davis , Gabor J. Dozsa , Alexandre E. Eichenberger , Noel A. Eisley , Matthew R. Ellavsky , Kahn C. Evans , Bruce M. Fleischer , Thomas W. Fox , Alan Gara , Mark E. Giampapa , Thomas M. Gooding , Michael K. Gschwind , John A. Gunnels , Shawn A. Hall , Rudolf A. Haring , Philip Heidelberger , Todd A. Inglett , Brant L. Knudson , Gerard V. Kopcsay , Sameer Kumar , Amith R. Mamidala , James A. Marcella , Mark G. Megerian , Douglas R. Miller , Samuel J. Miller , Adam J. Muff , Michael B. Mundy , John K. O'Brien , Kathryn M. O'Brien , Martin Ohmacht , Jeffrey J. Parker , Ruth J. Poole , Joseph D. Ratterman , Valentina Salapura , David L. Satterfield , Robert M. Senger , Brian Smith , Burkhard Steinmacher-Burow , William M. Stockdell , Craig B. Stunkel , Krishnan Sugavanam , Yutaka Sugawara , Todd E. Takken , Barry M. Trager , James L. Van Oosten , Charles D. Wait , Robert E. Walkup , Alfred T. Watson , Robert W. Wisniewski , Peng Wu
IPC分类号： G06F15/76 , G06F9/06
CPC分类号： G06F13/287 , G06F9/06 , G06F9/3004 , G06F9/30047 , G06F9/3885 , G06F12/0811 , G06F12/0831 , G06F12/0862 , G06F12/0864 , G06F12/1027 , G06F15/17381 , G06F15/17387 , G06F15/76 , G06F15/8069 , G06F2212/1016 , G06F2212/602 , G06F2212/6022 , G06F2212/6024 , G06F2212/6032 , Y02D10/13 , Y02D10/14
摘要： A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC). Each ASIC computing node comprises a system-on-chip ASIC utilizing four or more processors integrated into one die, with each having full access to all system resources and enabling adaptive partitioning of the processors to functions such as compute or messaging I/O on an application by application basis, and preferably, enable adaptive partitioning of functions in accordance with various algorithmic phases within an application, or if I/O or other processors are underutilized, then can participate in computation or communication nodes are interconnected by a five dimensional torus network with DMA that optimally maximize the throughput of packet communications between nodes and minimize latency.
摘要翻译：具有100 petaOPS规模计算的多Petascale高效并行超级计算机，其成本，功耗和占地面积都在降低，并且允许从互连角度来看处理节点的最大封装密度。超级计算机利用了VLSI的技术进步，实现了许多处理器可以集成到单个专用集成电路（ASIC）中的计算模型。每个ASIC计算节点包括利用集成到一个管芯中的四个或更多个处理器的片上系统ASIC，每个处理器具有对所有系统资源的完全访问，并且使得处理器能够对诸如计算或消息传递I / O 并且优选地，根据应用内的各种算法阶段实现功能的自适应分割，或者如果I / O或其他处理器未被充分利用，则可以参与计算或通信节点通过五维环面网络互连使用DMA来最大限度地最大化节点之间的分组通信的吞吐量并最小化等待时间。

7. 发明授权

US07730463B2 Efficient generation of SIMD code in presence of multi-threading and other false sharing conditions and in machines having memory protection support 有权
标题翻译：在存在多线程和其他虚假共享条件的情况下以及具有存储器保护支持的机器中有效地生成SIMD代码
公开(公告)号：US07730463B2
公开(公告)日：2010-06-01
申请号：US11358372
申请日：2006-02-21
申请人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu , Peng Zhao
发明人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu , Peng Zhao
IPC分类号： G06F9/45
CPC分类号： G06F9/3851 , G06F8/44
摘要： A computer implemented method, system and computer program product for automatically generating SIMD code. The method begins by analyzing data to be accessed by a targeted loop including at least one statement, where each statement has at least one memory reference, to determine if memory accesses are safe. If memory accesses are safe, the targeted loop is simdized. If not safe, it is determined if a scheme can be applied in which safety need not be guaranteed. If such a scheme can be applied, the targeted loop is simdized according to the scheme. If such a scheme cannot be applied, it is determined if padding is appropriate. If padding is appropriate, the data is padded and the targeted loop is simdized. If padding is not appropriate, non-simdized code is generated based on the targeted loop for handling boundary conditions, the targeted loop is simdized and combined with the non-simdized code.
摘要翻译：一种用于自动生成SIMD代码的计算机实现的方法，系统和计算机程序产品。该方法开始于分析要由目标循环访问的数据，包括至少一个语句，其中每个语句具有至少一个存储器引用，以确定存储器访问是否安全。如果存储器访问是安全的，则对象循环被简化。如果不安全，则确定是否可以应用不需要保证安全性的方案。如果可以应用这种方案，则根据该方案对目标循环进行模拟。如果不能应用这种方案，则确定填充是否合适。如果填充是合适的，则填充数据并对目标循环进行模拟。如果填充不合适，则基于用于处理边界条件的目标循环生成非模拟代码，目标循环被简化并与非模拟代码组合。

8. 发明授权

US07475392B2 SIMD code generation for loops with mixed data lengths 失效
标题翻译：具有混合数据长度的循环的SIMD代码生成
公开(公告)号：US07475392B2
公开(公告)日：2009-01-06
申请号：US10919131
申请日：2004-08-16
申请人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu
发明人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu
IPC分类号： G06F9/45
CPC分类号： G06F8/4452
摘要： Generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop operates on datatypes having different lengths, is disclosed. Further, a preferred embodiment of the present invention includes a novel technique to efficiently realign or shift arbitrary streams to an arbitrary offset, regardless whether the alignments or offsets are known at the compile time or not. This technique enables the application of advanced alignment optimizations to runtime alignment. Length conversion operations, for packing and unpacking data values, are included in the alignment handling framework. These operations are formally defined in terms of standard SIMD instructions that are readily available on various SIMD platforms. This allows sequential loop code operating on datatypes of disparate length to be transformed (“simdized”) into optimized SIMD code through a fully automated process.
摘要翻译：公开了在单指令多数据路径（SIMD）架构中生成循环码，其循环对具有不同长度的数据类型进行操作。此外，本发明的优选实施例包括一种用于有效地将任意流重新对准或将任意流移动到任意偏移的新技术，无论在编译时是否知道对准或偏移。这种技术使得可以将高级对齐优化应用于运行时对齐。用于打包和解包数据值的长度转换操作包含在对齐处理框架中。这些操作根据在各种SIMD平台上容易获得的标准SIMD指令正式定义。这允许对具有不同长度的数据类型的顺序循环代码通过完全自动化的过程进行转换（“模拟化”）成优化的SIMD代码。

9. 发明申请

US20080127144A1 METHOD TO EXPLOIT SUPERWORD-LEVEL PARALLELISM USING SEMI-ISOMORPHIC PACKING 失效
标题翻译：使用半正交包装开发超级平行平行的方法
公开(公告)号：US20080127144A1
公开(公告)日：2008-05-29
申请号：US11536990
申请日：2006-09-29
申请人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu , Peng Zhao
发明人： Alexandre E. Eichenberger , Kai-Ting Amy Wang , Peng Wu , Peng Zhao
IPC分类号： G06F9/45
CPC分类号： G06F8/456
摘要： A computer program product is provided for extracting SIMD parallelism. The computer program product includes instructions for providing a stream of input code comprising basic blocks; identifying pairs of statements that are semi-isomorphic with respect to each other within a basic block; iteratively combining into packs, pairs of statements that are semi-isomorphic with respect to each other, and combining packs into combined packs; collecting packs whose statements can be scheduled together for processing; and generating SIMD instructions for each pack to provide for extracting the SIMD parallelism.
摘要翻译：提供了一种用于提取SIMD并行性的计算机程序产品。计算机程序产品包括用于提供包括基本块的输入代码流的指令; 识别在基本块内相对于彼此半同构的语句对; 迭代地组合成包，相对于半同构的语句对，以及将包合并成组合包; 收集包，其陈述可以一起安排处理; 并为每个包生成SIMD指令以提供SIMD并行性。

10. 发明授权

US10430208B2 Multi-version asynchronous dynamic software update system and method for applications with multiple threads 有权
公开(公告)号：US10430208B2
公开(公告)日：2019-10-01
申请号：US15584785
申请日：2017-05-02
申请人： Kai-Ting Amy Wang , Peng Wu , Brice Dobry , Haichuan Wang
发明人： Kai-Ting Amy Wang , Peng Wu , Brice Dobry , Haichuan Wang
IPC分类号： G06F9/445 , G06F8/656 , G06F9/448 , G06F9/38 , G06F8/41 , G06F8/71 , G06F9/22
摘要： A method and system for using multiple versions of a software component, includes storing, in memory, a first function table that points to executable code in the memory for functions from a first version of the software component, and storing, in the memory, a second function table that points to executable code in the memory for functions from a second version of the software component, referencing the first function table, when running a first application thread, to execute the functions from the first version of the software component; and referencing the second function table, when running a second application thread that is active concurrently with the first application thread, to execute the functions from the second version of the software component.

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