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    • 1. 发明申请
    • Liquid crystal display device
    • 液晶显示装置
    • US20050219436A1
    • 2005-10-06
    • US11024807
    • 2004-12-30
    • Keuk KwonDae ParkSeong HwangSung KangJong LeeBung KimJong Choi
    • Keuk KwonDae ParkSeong HwangSung KangJong LeeBung KimJong Choi
    • G02F1/1368G02F1/136G02F1/1362
    • G02F1/136209G02F1/136213G02F2001/136218
    • An LCD device with improved an aperture ratio and decreased parasitic capacitance has a passivation layer of an inorganic material and which includes a gate line on a first substrate; a gate insulating layer on an entire surface of the first substrate including the gate line; a data line on the gate insulating layer in perpendicular to the gate line, to define a pixel region; a thin film transistor at a crossing portion of the gate and data lines; a passivation layer on the entire surface of the first substrate including the thin film transistor; a pixel electrode on the passivation layer, for being connected with a drain electrode of the thin film transistor; and a light-shielding metal for receiving a voltage, formed between the data line and the pixel electrode, to prevent a parasitic capacitance between the data line and the pixel electrode.
    • 具有提高开口率和降低的寄生电容的LCD器件具有无机材料的钝化层,并且在第一衬底上包括栅极线; 在包括栅极线的第一基板的整个表面上的栅极绝缘层; 栅极绝缘层上垂直于栅极线的数据线,以限定像素区域; 在栅极和数据线的交叉部分处的薄膜晶体管; 在包括薄膜晶体管的第一衬底的整个表面上的钝化层; 钝化层上的像素电极,用于与薄膜晶体管的漏电极连接; 以及用于接收形成在数据线和像素电极之间的电压的遮光金属,以防止数据线和像素电极之间的寄生电容。
    • 2. 发明申请
    • Pad structure of liquid crystal display device and fabrication method thereof
    • 液晶显示装置的垫结构及其制造方法
    • US20060001791A1
    • 2006-01-05
    • US11159277
    • 2005-06-23
    • Seong HwangJong ChoiJong Yim
    • Seong HwangJong ChoiJong Yim
    • G02F1/136
    • G02F1/1345G02F2001/13629
    • A pad structure of a liquid crystal display (LCD) device and a fabrication method thereof are provided. The pad structure of the LCD device includes: a bottom electrode formed with a predetermined area at one edge side of each of signal lines formed on an array substrate; an insulation layer formed over the bottom electrode; a contact hole for exposing the bottom electrode, the contact hole formed as a predetermined portion of the insulation layer is etched; and a terminal electrode formed over the contact hole, thereby being connected with the bottom electrode, wherein the bottom electrode is formed in a dual structure including an aluminum alloy layer using AlNd and a molybdenum (Mo) layer and a thickness of the Mo layer is greater than at least about one quarter of the thickness of the aluminum alloy layer formed beneath the Mo layer.
    • 提供了一种液晶显示器(LCD)器件的焊盘结构及其制造方法。 LCD装置的焊盘结构包括:在阵列基板上形成的每条信号线的一个边缘侧形成有预定区域的底部电极; 形成在底部电极上的绝缘层; 蚀刻用于暴露底部电极的接触孔,形成为绝缘层的预定部分的接触孔; 以及形成在所述接触孔上的端子电极,由此与所述底部电极连接,其中所述底部电极形成为包括使用AlNd和钼(Mo)层的铝合金层和所述Mo层的厚度的双重结构 大于在Mo层下面形成的铝合金层的厚度的至少约四分之一。
    • 3. 发明申请
    • Method of forming floating gate array of flash memory device
    • 形成闪存器件的浮栅阵列的方法
    • US20070141785A1
    • 2007-06-21
    • US11641034
    • 2006-12-19
    • Jong Choi
    • Jong Choi
    • H01L21/336
    • H01L27/11521H01L27/115
    • The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined by device isolation films; (b) patterning the first nitride film to form a first nitride film pattern; (c) forming first oxide film spacers on sidewalls of the first nitride film pattern; (d) selectively removing the first nitride film pattern; (e) forming a plurality of second nitride film patterns separated by the first oxide film spacers on the capping oxide film; (f) selectively removing the first oxide film spacers interposed between the plurality of second nitride film patterns and a portion of the capping oxide film to expose a surface of the floating gate forming film between the second nitride film patterns; (g) forming a plurality of floating gate patterns by removing a portion of the floating gate forming film exposed using the second nitride film patterns as an etching mask; and (h) oxidizing the sidewall of each of the plurality of floating gate patterns to form sidewall oxide films therebetween.
    • 形成闪速存储器件的浮置栅极阵列的方法包括:(a)在半导体衬底上依次形成隧道氧化膜,浮栅形成膜,封盖氧化物膜和第一氮化物膜,其中定义有源器件区域 通过器件隔离膜; (b)图案化所述第一氮化物膜以形成第一氮化物膜图案; (c)在第一氮化物膜图案的侧壁上形成第一氧化膜间隔物; (d)选择性地除去第一氮化物膜图案; (e)在所述封盖氧化膜上形成由所述第一氧化膜间隔物分离的多个第二氮化物膜图案; (f)选择性地去除夹在所述多个第二氮化物膜图案之间的所述第一氧化物膜间隔物和所述封盖氧化膜的一部分,以暴露所述第二氮化物膜图案之间的所述浮栅形成膜的表面; (g)通过去除使用第二氮化物膜图案暴露的浮栅形成膜的一部分作为蚀刻掩模来形成多个浮栅图案; 和(h)氧化多个浮栅图案中的每一个的侧壁以在其间形成侧壁氧化膜。
    • 4. 发明申请
    • Backlight unit
    • 背光单元
    • US20060221639A1
    • 2006-10-05
    • US11395163
    • 2006-04-03
    • Hoon JangJong Choi
    • Hoon JangJong Choi
    • F21V7/04
    • H01J65/046G02F1/133604G02F2001/133612G09G3/3406G09G2330/06H01J61/325
    • A backlight unit includes a case; a plurality of fluorescent lamps on the case, each fluorescent lamp having ends arranged in one direction, and having first and second electrodes provided at respective ends; a first power supply line connected with the first electrode; a second power supply line connected with the second electrode; a common electrode PCB arranged adjacent to the ends of the fluorescent lamps; a first common electrode on the common electrode PCB and connected with the first power supply line; a second common electrode on the common electrode PCB and connected with the second power supply line, the first and second common electrodes being spaced apart from each other; and an inverter to apply voltages to the first and second common electrodes.
    • 背光单元包括壳体; 在所述壳体上的多个荧光灯,每个荧光灯具有沿一个方向布置的端部,并且具有设置在各个端部的第一和第二电极; 与第一电极连接的第一电源线; 与第二电极连接的第二电源线; 布置成与荧光灯的端部相邻的公共电极PCB; 在公共电极PCB上的第一公共电极并与第一电源线连接; 在公共电极PCB上的与第二电源线连接的第二公共电极,第一和第二公共电极彼此间隔开; 以及向第一和第二公共电极施加电压的反相器。
    • 8. 发明申请
    • Method of scaling partial area of main picture
    • 缩放主画面部分区域的方法
    • US20050151885A1
    • 2005-07-14
    • US11005938
    • 2004-12-06
    • Jong Choi
    • Jong Choi
    • H04N7/01G06T3/40H04N5/44H04N5/45H04N9/74
    • H04N5/44G06T3/40H04N5/45H04N21/4316H04N21/440245H04N21/440263H04N21/4728
    • The present invention provides a method of scaling a partial area of a main picture, by which the partial area of the main picture can be magnified in a manner of scaling the partial area of the picture displayed on a screen like using a virtual magnifier without employing a separate expensive hardware resource. The present invention comprises a first step of making a main scaler extract image data of the partial area to be scaled from full image data according to prescribed scaling information including magnification/reduction information for the partial area of a display picture, a second step of making a sub-scaler scale the extracted image data of the partial area at a prescribed rate, and a third step of overlaying the scaled image data of the partial area on the full image data provided from the main scaler.
    • 本发明提供一种缩放主图像的部分区域的方法,通过该方法可以以不使用虚拟放大镜的方式缩放显示在屏幕上的图像的部分区域的方式放大主图像的部分区域 一个单独的昂贵的硬件资源。 本发明包括:第一步骤,使主缩放器根据包括用于显示图像的局部区域的放大/缩小信息的规定缩放信息,从全图像数据中提取部分区域的图像数据,第二步骤 以规定的速率对所提取的部分区域的图像数据进行分分割比例缩放;以及第三步骤,将部分区域的缩放图像数据重叠在从主缩放器提供的完整图像数据上。