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    • 3. 发明申请
    • Distributed authentication system and communication control apparatus
    • 分布式认证系统和通信控制装置
    • US20070192484A1
    • 2007-08-16
    • US11338724
    • 2006-01-25
    • Ryouji YamaokaKazuhiko Sagara
    • Ryouji YamaokaKazuhiko Sagara
    • G06F15/173
    • H04L63/08H04L63/0428
    • Provided is a distributed authentication system and a communication control apparatus which allow a user to use a service with retained security. The distributed authentication system includes: a terminal; a communication control apparatus; and a server for distributing a service, the terminal, the communication control apparatus, and the server being connected to one another through a communication network, the communication control apparatus controlling communication between the terminal and the server, and in the system: the communication control apparatus includes a judgment module for judging whether to approve an access request from the terminal to the server; and the judgment module calculates a security level for the access request, requests the terminal to retrieve detailed information corresponding to the calculated security level, and approves the access request by authenticating the terminal of an access request source based on the detailed information received from the terminal.
    • 提供了允许用户使用具有保留的安全性的服务的分布式认证系统和通信控制装置。 分布式认证系统包括:终端; 通信控制装置; 以及用于通过通信网络彼此连接的用于分发服务的服务器,终端,通信控制装置和服务器,所述通信控制装置控制终端与服务器之间的通信,并且在系统中:通信控制 装置包括判断模块,用于判断是否批准从终端到服务器的访问请求; 并且判断模块计算访问请求的安全级别,请求终端检索对应于所计算的安全级别的详细信息,并且基于从终端接收到的详细信息来认证访问请求源的终端来批准访问请求 。
    • 5. 发明授权
    • Semiconductor memory having writing and reading transistors, method of
fabrication thereof, and method of use thereof
    • 具有写入和读取晶体管的半导体存储器,其制造方法及其使用方法
    • US5357464A
    • 1994-10-18
    • US22937
    • 1993-02-26
    • Shuji ShukuriToru KogaShinichiro KimuraDigh HisamotoKazuhiko SagaraTokuo KureEiji Takeda
    • Shuji ShukuriToru KogaShinichiro KimuraDigh HisamotoKazuhiko SagaraTokuo KureEiji Takeda
    • H01L27/10G11C11/401G11C11/402H01L21/8242H01L27/108G11C11/40
    • G11C11/401H01L27/108
    • Disclosed is a semiconductor memory having a self-amplifying cell structure, using (1) a writing transistor and (2) a reading transistor with a floating gate as a charge storage node for each memory cell, and a method of fabricating the memory cell. The writing transistor and reading transistor are of opposite conductivity type to each other; for example, the writing transistor uses a P-channel MOS transistor and the reading transistor (having the floating gate) uses an N-channel MOS transistor. The floating gate of the reading transistor is connected to a single bit line through a source-drain path of the writing transistor, the source-drain path of the reading transistor is connected between the single bit line and a predetermined potential, and the gate electrodes of the writing and reading transistors are connected to a single word line. At least the reading transistor can be formed in a trench, and the word line can be formed overlying the writing transistor and the reading transistor in the trench. Also disclosed is a method of operating the memory cell, wherein the voltage applied to the word line, in a standby condition, is intermediate to the voltage applied to the word line during the writing operation and during the reading operation.
    • 公开了具有自放大单元结构的半导体存储器,其使用(1)写入晶体管和(2)具有浮置栅极的读取晶体管作为每个存储单元的电荷存储节点,以及制造该存储单元的方法。 写入晶体管和读取晶体管彼此具有相反的导电类型; 例如,写入晶体管使用P沟道MOS晶体管,并且读取晶体管(具有浮置栅极)使用N沟道MOS晶体管。 读取晶体管的浮置栅极通过写入晶体管的源极 - 漏极连接到单个位线,读取晶体管的源极 - 漏极连接在单个位线和预定电位之间,并且栅电极 的写和读晶体管连接到单个字线。 至少读取晶体管可以形成在沟槽中,并且字线可以形成在沟槽中的写入晶体管和读取晶体管的上方。 还公开了一种操作存储单元的方法,其中在备用状态下施加到字线的电压在写入操作期间和在读取操作期间施加到字线的电压的中间。