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1. 发明授权

US5745336A Capacitor for semiconductor integrated circuit 失效
标题翻译：半导体集成电路电容器
公开(公告)号：US5745336A
公开(公告)日：1998-04-28
申请号：US417839
申请日：1995-04-06
申请人： Katsuaki Saito , Michio Ohue , Takuya Fukuda , JaiHo Choi , Yukinobu Miyamoto
发明人： Katsuaki Saito , Michio Ohue , Takuya Fukuda , JaiHo Choi , Yukinobu Miyamoto
IPC分类号： H01G7/06 , H01L21/02 , H01L27/115 , H01G4/06
CPC分类号： H01L27/11502 , H01G7/06 , H01L28/55
摘要： A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film and the top portion is removed. As a result, a fact that an oxide of each electrode, which deteriorates the relative permittivity, is formed on the interface between the electrode and the ferroelectric material is prevented, and a large capacity can be realized with respect to the area of the substrate because the ferroelectric thin film is formed into the columnar and elongated shape, resulting in that the capacitance of the capacitor is not reduced in which the electrodes and the oxide dielectric material having a high permittivity are, in series, connected to each other. The capacitor is formed into a DRAM or an FRAM memory cell so as to realize a semiconductor memory revealing a high degree of integration and a high processing speed.
摘要翻译：根据本发明的半导体集成电路装置具有电容器，其形成为在其基板上形成MOS晶体管之后形成铁电薄膜，由例如PbZrTiO 3或SrTiO 3制成的铁电薄膜或类似物形成为柱状，以形成与所述柱状铁电薄膜的侧壁部分直接接触的电极，并且去除顶部部分。结果，防止了在电极和铁电材料之间的界面上形成各种电极的氧化物，导致相对介电常数下降的事实，因此能够相对于基板的面积实现大容量，因为铁电薄膜形成为柱状和细长形状，导致电容器的电容不降低，其中具有高介电常数的电极和氧化物介电材料串联连接。电容器形成为DRAM或FRAM存储单元，以实现显示高集成度和高处理速度的半导体存储器。

2. 发明授权

US5434742A Capacitor for semiconductor integrated circuit and method of manufacturing the same 失效
标题翻译：半导体集成电路用电容器及其制造方法
公开(公告)号：US5434742A
公开(公告)日：1995-07-18
申请号：US995977
申请日：1992-12-23
申请人： Katsuaki Saito , Michio Ohue , Takuya Fukuda , JaiHo Choi , Yukinobu Miyamoto
发明人： Katsuaki Saito , Michio Ohue , Takuya Fukuda , JaiHo Choi , Yukinobu Miyamoto
IPC分类号： H01G7/06 , H01L21/02 , H01L27/115 , H01G4/008 , H01G4/12
CPC分类号： H01L27/11502 , H01G7/06 , H01L28/55
摘要： A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film, and the top portion is removed. As a result, a fact that an oxide of each electrode, which deteriorates the relative permittivity, is formed on the interface between the electrode and the ferroelectric material is prevented, and a large capacity can be realized with respect to the area of the substrate because the ferroelectric thin film is formed into the columnar and elongated shape, resulting in that the capacitance of the capacitor is not reduced in which the electrodes and the oxide dielectric material having a high permittivity are, in series, connected to each other.The capacitor is formed into a DRAM or an FRAM memory cell so as to realize a semiconductor memory revealing a high degree of integration and a high processing speed.
摘要翻译：根据本发明的半导体集成电路装置具有电容器，其形成为在其基板上形成MOS晶体管之后形成铁电薄膜，由例如PbZrTiO 3或SrTiO 3制成的铁电薄膜或类似物形成为柱状，以形成与所述柱状铁电薄膜的侧壁部直接接触的电极，并且去除顶部。结果，防止了在电极和铁电材料之间的界面上形成各种电极的氧化物，导致相对介电常数下降的事实，因此能够相对于基板的面积实现大容量，因为铁电薄膜形成为柱状和细长形状，导致电容器的电容不降低，其中具有高介电常数的电极和氧化物介电材料串联连接。电容器形成为DRAM或FRAM存储单元，以实现显示高集成度和高处理速度的半导体存储器。

3. 发明授权

US5211825A Plasma processing apparatus and the method of the same 失效
标题翻译：等离子体处理装置及其方法相同
公开(公告)号：US5211825A
公开(公告)日：1993-05-18
申请号：US764161
申请日：1991-09-23
申请人： Katsuaki Saito , Takuya Fukuda , Michio Ohue , Tadasi Sonobe
发明人： Katsuaki Saito , Takuya Fukuda , Michio Ohue , Tadasi Sonobe
IPC分类号： C23C16/50 , C23C16/44 , C23C16/511 , C23F4/00 , H01J37/32 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31 , H05H1/46
CPC分类号： H01J37/32862 , C23C16/4405 , C23C16/511 , H01J37/32192 , H01J37/3266 , H05H1/46
摘要： A plasma processing apparatus performs a sample processing and cleaning processing. The sample processing is carried out by generating a reaction gas plasma within a vacuum vessel of the apparatus using an electron cyclotron resonance excitation. The cleaning processing is carried out to clean the inner wall of the vacuum vessel by generating a cleaning gas plasma within the vacuum vessel. Generation of the cleaning gas plasma takes place by using either one of the following processes:(1) The plasma diameter during the cleaning processing is made larger than that during the sample processing. The end of the plasma during cleaning processing is made to reach the inside wall of the vacuum vessel.(2) The cleaning gas plasma is scanned within the vacuum vessel.
摘要翻译：等离子体处理装置进行样品处理和清洗处理。通过使用电子回旋共振激发在装置的真空容器内产生反应气体等离子体来进行样品处理。进行清洁处理以通过在真空容器内产生清洁气体等离子体来清洁真空容器的内壁。清洁气体等离子体的产生通过使用以下任一方法进行：（1）清洁处理期间的等离子体直径大于样品处理期间的等离子体直径。在清洁处理期间等离子体的末端到达真空容器的内壁。（2）在真空容器内扫描清洁气体等离子体。

4. 发明授权

US5347100A Semiconductor device, process for the production thereof and apparatus for microwave plasma treatment 失效
标题翻译：半导体装置，其制造方法和微波等离子体处理装置
公开(公告)号：US5347100A
公开(公告)日：1994-09-13
申请号：US857658
申请日：1992-03-26
申请人： Takuya Fukuda , Michio Ohue , Fumiyuki Kanai , Atsuyoshi Koike , Katsuaki Saito , Kazuo Suzuki
发明人： Takuya Fukuda , Michio Ohue , Fumiyuki Kanai , Atsuyoshi Koike , Katsuaki Saito , Kazuo Suzuki
IPC分类号： H01L21/768 , H01L23/532 , B23K9/00 , B44C1/22
CPC分类号： H01L21/76801 , H01L21/76834 , H01L23/5329 , H01L2924/0002
摘要： Disclosed are a semiconductor device comprising a semiconductor substrate, a first metal connection layers, a first substrate oxide layer having a specific form, and a second connection pattern layer; a process for producing the device; and a microwave plasma treatment apparatus having gas feed ports in a specific position. The highly reliable semiconductor devices can be produced at a high rate at high yields.
摘要翻译：公开了一种半导体器件，包括半导体衬底，第一金属连接层，具有特定形式的第一衬底氧化物层和第二连接图案层; 一种生产该装置的方法; 以及具有特定位置的气体供给口的微波等离子体处理装置。高可靠性的半导体器件可以以高产率高产率生产。

5. 发明授权

US5496410A Plasma processing apparatus and method of processing substrates by using same apparatus 失效
标题翻译：等离子体处理装置和使用相同装置处理基板的方法
公开(公告)号：US5496410A
公开(公告)日：1996-03-05
申请号：US29054
申请日：1993-03-10
申请人： Takuya Fukuda , Michio Ohue , Kazuo Suzuki
发明人： Takuya Fukuda , Michio Ohue , Kazuo Suzuki
IPC分类号： C23C14/54 , C23C16/44 , C23C16/448 , C23C16/455 , C23C16/50 , C23C16/511 , C30B25/14 , H01J37/32 , H01L21/31 , C23C16/00
CPC分类号： H01J37/3244 , C23C16/4401 , C23C16/4481 , C23C16/455 , C23C16/511
摘要： In a plasma processing apparatus which forms a gaseous raw material into a plasma by using electron cyclotron resonance and processes a substrate, leading-edge opening portions of an introduction tube into which a gaseous raw material is introduced are formed in the inner wall surface of the container in such a way that they do not project within the vacuum container. A heater is wound around the introduction pipe so that the opening portions thereof can be heated. With this construction, even if a gaseous raw material which is a liquid or solid at normal temperature and normal pressure is made to flow, the gaseous raw material can be prevented from being liquefied or solidified in the opening portions of the introduction pipe, and the opening portions of the introduction pipe can be prevented from being clogged. In addition, since there are no projections within the vacuum container, the propagation of microwaves is not impeded, making it possible to uniformity process the substrate.
摘要翻译：在通过使用电子回旋共振将气态原料形成等离子体并处理基板的等离子体处理装置中，在其内壁面上形成导入气体原料的导入管的前端开口部容器，使得它们不在真空容器内投影。加热器缠绕在引入管周围，使得其开口部分能够被加热。利用这种结构，即使使常温常压下的液体或固体的气体原料流动，也可以防止气体原料在导入管的开口部分液化或凝固，能够防止导入管的开口部堵塞。此外，由于在真空容器内没有凸起，所以不妨碍微波的传播，能够使基板均匀化。

6. 发明授权

US5182495A Plasma processing method and apparatus using electron cyclotron resonance 失效
标题翻译：使用电子回旋共振的等离子体处理方法和装置
公开(公告)号：US5182495A
公开(公告)日：1993-01-26
申请号：US619338
申请日：1990-11-29
申请人： Takuya Fukuda , Michio Ohue , Tadasi Sonobe
发明人： Takuya Fukuda , Michio Ohue , Tadasi Sonobe
IPC分类号： C23C14/40 , C23C14/34 , C23C14/35 , C23C16/50 , C23C16/511 , C23F4/00 , H01J37/32 , H01L21/203 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31
CPC分类号： H01J37/32477 , H01J37/32192 , H01J37/32678 , H01J37/32706 , H01J2237/0206
摘要： In a plasma processing apparatus using ECR, faces in contact with plasma excepting a substance to be processed are covered by an insulating material. By such configuration, discharge caused between the plasma and the substance to be processed in plasma processing is prevented beforehand.
摘要翻译：在使用ECR的等离子体处理装置中，除了被处理物质以外的与等离子体接触的面被绝缘材料覆盖。通过这样的结构，可以预先防止等离子体和等离子体处理物质之间产生的放电。

7. 发明授权

US5162633A Microwave-excited plasma processing apparatus 失效
标题翻译：微波激发等离子体处理装置
公开(公告)号：US5162633A
公开(公告)日：1992-11-10
申请号：US372716
申请日：1989-06-27
申请人： Tadasi Sonobe , Kazuo Suzuki , Takuya Fukuda , Michio Ohue
发明人： Tadasi Sonobe , Kazuo Suzuki , Takuya Fukuda , Michio Ohue
IPC分类号： C23C14/34 , C23C16/511 , C23F4/00 , H01J37/32 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31 , H05B6/80
CPC分类号： H01J37/32678 , H01J37/32192 , H01J37/32238 , H01J37/32697 , H05B6/80
摘要： The present invention relates to a plasma treatment apparatus for making plasma surface processing of a specimen such as thin-film formation, etching, sputtering or plasma oxidation by use of plasma produced through microwave discharge. In a specimen chamber provided with a specimen table for holding at least one specimen thereon, a microwave is introduced from a direction intersecting a magnetic line of force so as to propagate in the longitudinal direction of an ECR region or in a direction along the plane of the ECR region. Since the microwave is introduced from the transverse direction of the specimen chamber, the provision of a microwave introducing window at an upper portion of the specimen chamber is not required and hence a counter electrode for applying an electric field to the specimen can be disposed at the upper portion of the specimen chamber, thereby making it possible to apply a uniform electric field to the specimen so that the specimen is subjected to a uniform treatment.
摘要翻译：本发明涉及一种等离子体处理装置，其用于通过使用通过微波放电产生的等离子体来进行诸如薄膜形成，蚀刻，溅射或等离子体氧化等试样的等离子体表面处理。在设置有用于保持至少一个样本的样本台的样本室中，从与磁力线相交的方向引入微波，以沿ECR区域的纵向方向或沿着ECR区域的平面的方向传播微波 ECR地区。由于微波从试样室的横向导入，因此不需要在试样室的上部设置微波导入窗，因此可以在试样室的上部设置用于向试样施加电场的对电极从而能够对试样施加均匀的电场，使样品经受均匀的处理。

8. 发明授权

US5084355A Laminar structure comprising organic material and inorganic material 失效
标题翻译：包含有机材料和无机材料的层压结构
公开(公告)号：US5084355A
公开(公告)日：1992-01-28
申请号：US336788
申请日：1989-04-13
申请人： Shigeru Takahashi , Takuya Fukuda , Toshiya Satoh , Seikichi Tanno , Michio Ohue , Naohiro Momma , Yutaka Misawa
发明人： Shigeru Takahashi , Takuya Fukuda , Toshiya Satoh , Seikichi Tanno , Michio Ohue , Naohiro Momma , Yutaka Misawa
IPC分类号： G11B7/243 , G11B7/244 , G11B7/253 , G11B7/2533 , G11B7/254 , G11B7/257 , G11B7/2578 , G11B7/26 , H01L23/14 , H01L23/498 , H05K3/38
CPC分类号： H05K3/388 , G11B7/2533 , G11B7/257 , G11B7/26 , H01L23/145 , H01L23/49866 , G11B2007/24306 , G11B2007/25706 , G11B2007/25708 , G11B2007/2571 , G11B7/2578 , H01L2924/0002 , Y10S428/90 , Y10S428/901 , Y10T428/31678
摘要： A laminar structure comprising an organic material and an inorganic material; for example, a coating structure on an organic substrate comprising an organic material on which an inorganic film must be formed and a method of producing the structure, a structure which is suitable for increasing the reliability of an optical disk and a method of producing this, a wiring structure on an organic substrate comprising the organic material on which electric wiring must be formed and a method of producing this, and a structure suitable for increasing the reliability of a semiconductor integrated circuit device and a method of producing this. In order to provide a laminar structure which exhibits a high degree of reliability with respect to prevention of cracks or separation and which comprises an organic material and an inorganic material and a method of producing this structure and a device which utilizes this structure, the present invention provides a laminar structure on an organic substrate comprising the organic substrate comprising an organic material and a thin film which is caused to adhere to the surface of the organic substrate and which comprises an inorganic material a second element which produces a metal bonding or covalent bonding with the first element that forms the thin film being contained in the organic substrate in the vicinity of the surface thereof.

9. 发明授权

US06479899B1 Semiconductor integrated circuit device and process for manufacturing the same 失效
公开(公告)号：US06479899B1
公开(公告)日：2002-11-12
申请号：US09051978
申请日：1998-04-24
申请人： Takuya Fukuda , Nobuyoshi Kobayashi , Yoshitaka Nakamura , Masayoshi Saito , Shinichi Fukada , Yoshifumi Kawamoto
发明人： Takuya Fukuda , Nobuyoshi Kobayashi , Yoshitaka Nakamura , Masayoshi Saito , Shinichi Fukada , Yoshifumi Kawamoto
IPC分类号： H01L2348
CPC分类号： H01L27/10808 , H01L27/108
摘要： The new structure of a memory cell which enables avoiding the problem of a step without increasing the number of processes, the structure of a semiconductor integrated circuit in which a common part of the same substrate in a manufacturing process is increased and the structure of the semiconductor integrated circuit which allows measures for environment obstacles without increasing the number of processes are disclosed. Memory cell structure in which a capacitor is formed in the uppermost layer of plural metal wiring layers by connecting the storage node of the capacitor to a diffusion layer via plugs and pads is adopted. It is desirable that a dielectric film formed in a metal wiring layer under the uppermost layer and a supplementary capacitor composed of a storage node and a plate electrode are connected to the capacitor. It is also desirable that the plate electrode of the capacitor covers the chip.

10. 发明授权

US5552625A Semiconductor device having a semi-insulating layer 失效
标题翻译：具有半绝缘层的半导体器件
公开(公告)号：US5552625A
公开(公告)日：1996-09-03
申请号：US208138
申请日：1994-03-09
申请人： Susumu Murakami , Takuya Fukuda , Yoshiteru Shimizu , Yoshitaka Sugawara
发明人： Susumu Murakami , Takuya Fukuda , Yoshiteru Shimizu , Yoshitaka Sugawara
IPC分类号： H01L29/06 , H01L29/40
CPC分类号： H01L29/404 , H01L29/0626 , H01L29/408
摘要： A semiconductor device has a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type contacted by respective first and second electrodes. A semi-insulating layer extends between the first and second electrodes and there is a first insulating layer between the semi-insulating layer and the first semiconductor region. The sheet resistivity of the semi-insulating layer varies, and this improves the high breakdown voltage of the p-n junction of the semiconductor device between the first and second semiconductor layers, by acting as a shield for charges included on a passivation insulation layer covering the semi-insulating layer and the first and second electrodes. Third semiconductor regions, with corresponding third electrodes, extend around, and are spaced from, the second semiconductor region. The third electrodes extend over the parts of the first semiconductor region adjacent the third semiconductor regions, and this also serve to improve the breakdown voltage. The second electrode may also extend over the part of the first semiconductor region adjacent the second semiconductor region to cover the p-n junction therebetween.
摘要翻译：半导体器件具有第一导电类型的第一半导体区域和与第一和第二电极接触的第二导电类型的第二半导体区域。半绝缘层在第一和第二电极之间延伸，并且在半绝缘层和第一半导体区之间存在第一绝缘层。半绝缘层的薄层电阻率变化，这通过充当覆盖半导体层的钝化绝缘层上的电荷的屏蔽来改善第一和第二半导体层之间的半导体器件的pn结的高击穿电压绝缘层和第一和第二电极。具有对应的第三电极的第三半导体区域围绕第二半导体区域延伸并且与第二半导体区域间隔开。第三电极在与第三半导体区域相邻的第一半导体区域的部分上延伸，这也用于提高击穿电压。第二电极还可以在与第二半导体区域相邻的第一半导体区域的部分上延伸以覆盖它们之间的p-n结。

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