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1. 发明申请

US20100227474A1 FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US20100227474A1
公开(公告)日：2010-09-09
申请号：US12781816
申请日：2010-05-18
申请人： Toshiyuki ARAI , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
发明人： Toshiyuki ARAI , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
IPC分类号： H01L21/768
CPC分类号： H01L21/76843 , H01L21/0206 , H01L21/02068 , H01L21/3105 , H01L21/321 , H01L21/76807 , H01L21/76819 , H01L21/76838 , H01L21/7684 , H01L21/7685
摘要： A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.
摘要翻译：例如，制造半导体集成电路器件的方法包括抛光晶片边缘的整个区域，使用抛光滚筒抛光晶片边缘的上表面的三个抛光滚筒，研磨滚筒抛光晶片边缘的中心部分和抛光滚筒抛光晶片边缘的下表面，从而防止导致晶片边缘上的薄膜脱落的障碍物的出现。

2. 发明授权

US07052995B2 Process of manufacturing semiconductor device including chemical-mechanical polishing 失效
标题翻译：制造半导体器件的工艺包括化学机械抛光
公开(公告)号：US07052995B2
公开(公告)日：2006-05-30
申请号：US10176666
申请日：2002-06-24
申请人： Nobuhito Katsumura , Yoshiteru Katsumura , Hidemi Sato , Norihiro Uchida , Fumiyuki Kanai
发明人： Nobuhito Katsumura , Yoshiteru Katsumura , Hidemi Sato , Norihiro Uchida , Fumiyuki Kanai
IPC分类号： H01L21/302
CPC分类号： H01L21/7684 , H01L21/31053 , H01L21/3212 , H01L21/76802 , H01L21/76804 , H01L21/76819
摘要： A buried film and a barrier film are polished together using a slurry in which the polishing rate on a substrate material (in particular, silicon oxide), that on a buried-film material (in particular, tungsten) and that on a barrier-film material (in particular, titanium oxide) are substantially equal to one another. This can materialize a buried structure free from any step or steps, at a high polishing rate.
摘要翻译：将掩埋膜和阻挡膜使用其中衬底材料（特别是氧化硅）上的抛光速率，掩埋膜材料（特别是钨）上的抛光速率和阻挡膜上的抛光速率材料（特别是氧化钛）基本上彼此相等。这可以以高抛光速率实现没有任何步骤或步骤的掩埋结构。

3. 发明授权

US07977234B2 Fabrication method of semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US07977234B2
公开(公告)日：2011-07-12
申请号：US12781816
申请日：2010-05-18
申请人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
发明人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/0206 , H01L21/02068 , H01L21/3105 , H01L21/321 , H01L21/76807 , H01L21/76819 , H01L21/76838 , H01L21/7684 , H01L21/7685
摘要： A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.
摘要翻译：例如，制造半导体集成电路器件的方法包括抛光晶片边缘的整个区域，使用抛光滚筒抛光晶片边缘的上表面的三个抛光滚筒，研磨滚筒抛光晶片边缘的中心部分和抛光滚筒抛光晶片边缘的下表面，从而防止导致晶片边缘上的薄膜脱落的障碍物的出现。

4. 发明授权

US07905562B2 Liquid guiding device and liquid ejecting apparatus 有权
标题翻译：液体引导装置和液体喷射装置
公开(公告)号：US07905562B2
公开(公告)日：2011-03-15
申请号：US11853695
申请日：2007-09-11
申请人： Fumiyuki Kanai
发明人： Fumiyuki Kanai
IPC分类号： B41J3/00 , B41J29/38 , B41J2/155
CPC分类号： B41J2/1721 , B41J11/0065 , B41J11/06
摘要： To provide a liquid guiding device such that, when liquid is dumped onto a sloping guiding surface portion located in a region where ink is dumped, the liquid is easily guided to an ink absorber and no liquid remains on the guiding surface portion. A guiding surface portion 29 is provided in a liquid dumping region 23 in which ink absorbers 25 and 26 are provided and on the upstream edge of a downstream portion 24 of a platen. The upper surface of the guiding surface portions 29 slopes down toward the upstream side, that is, toward the liquid dumping region 23. In the guiding surface portion 29 is formed a guiding structure portion 31 that guides ink attached to the guiding surface portion to the ink absorber 25. The guiding structure portion may include an edge portion 31 that guides liquid by capillary action. The edge portion may extend to the ink absorbers 25 and 26.
摘要翻译：为了提供液体引导装置，使得当液体被倾倒到位于墨水被倾倒的区域中的倾斜引导表面部分上时，液体容易地被引导到墨水吸收器，并且在引导表面部分上没有液体残留。引导表面部分29设置在其中设置有墨吸收器25和26的液体倾倒区域23中以及在压板的下游部分24的上游边缘上。引导表面部分29的上表面向上游侧，即朝向液体倾倒区域23倾斜。在引导表面部分29中形成有引导结构部分31，引导结构部分31将附着到引导表面部分的墨水引导到吸墨器25.引导结构部分可以包括通过毛细作用引导液体的边缘部分31。边缘部分可延伸到吸墨器25和26。

5. 发明申请

US20070259522A1 Fabrication method of semiconductor integrated circuit device 有权
公开(公告)号：US20070259522A1
公开(公告)日：2007-11-08
申请号：US11778494
申请日：2007-07-16
申请人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
发明人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/0206 , H01L21/02068 , H01L21/3105 , H01L21/321 , H01L21/76807 , H01L21/76819 , H01L21/76838 , H01L21/7684 , H01L21/7685
摘要： A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.

6. 发明授权

US06979649B2 Fabrication method of semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US06979649B2
公开(公告)日：2005-12-27
申请号：US10085063
申请日：2002-03-01
申请人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
发明人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
IPC分类号： H01L21/76 , H01L21/304 , H01L21/3105 , H01L21/3205 , H01L21/321 , H01L21/768 , H01L21/302
CPC分类号： H01L21/76843 , H01L21/0206 , H01L21/02068 , H01L21/3105 , H01L21/321 , H01L21/76807 , H01L21/76819 , H01L21/76838 , H01L21/7684 , H01L21/7685
摘要： A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the water, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edges of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.
摘要翻译：例如，制造半导体集成电路器件的方法包括抛光晶片边缘的整个区域，使用抛光滚筒抛光水边缘上表面的三个抛光滚筒，抛光滚筒抛光晶片边缘的中心部分和抛光滚筒抛光晶片边缘的下表面，从而防止造成晶片边缘上薄膜脱落的障碍物。

7. 发明授权

US06512245B2 Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US06512245B2
公开(公告)日：2003-01-28
申请号：US09859045
申请日：2001-05-17
申请人： Shuji Ikeda , Satoshi Meguro , Kyoichiro Asayama , Eri Fujita , Koichiro Ishibashi , Toshiro Aoto , Sadayuki Morita , Atsuyoshi Koike , Masayuki Kojima , Yasuo Kiguchi , Kazuyuki Suko , Fumiyuki Kanai , Naotaka Hashimoto , Toshiaki Yamanaka
发明人： Shuji Ikeda , Satoshi Meguro , Kyoichiro Asayama , Eri Fujita , Koichiro Ishibashi , Toshiro Aoto , Sadayuki Morita , Atsuyoshi Koike , Masayuki Kojima , Yasuo Kiguchi , Kazuyuki Suko , Fumiyuki Kanai , Naotaka Hashimoto , Toshiaki Yamanaka
IPC分类号： H01L2972
CPC分类号： H01L27/11 , H01L27/1104 , Y10S257/903 , Y10S257/904
摘要： A static random access memory comprising memory cells each composed of transfer MISFETs controlled by word lines and of a flip-flop circuit made of driver MISFETs and load MISFETs. The top of the load MISFETs is covered with supply voltage lines so that capacitor elements of a stacked structure are formed between the gate electrodes of the load MISFETs and the supply voltage lines.
摘要翻译：一种静态随机存取存储器，包括由字线控制的转移MISFET和由驱动器MISFET和负载MISFET构成的触发电路组成的存储单元。负载MISFET的顶部覆盖有电源电压线，使得层叠结构的电容器元件形成在负载MISFET的栅电极和电源电压线之间。

8. 发明授权

US5670409A Method of fabricating a semiconductor IC DRAM device enjoying enhanced focus margin 失效
标题翻译：制造具有增强的聚焦余量的半导体IC DRAM器件的方法
公开(公告)号：US5670409A
公开(公告)日：1997-09-23
申请号：US511810
申请日：1995-08-07
申请人： Hiroshi Otori , Kazuhiko Kajigaya , Kazuyuki Miyazawa , Masaharu Kubo , Atsuyoshi Koike , Fumiyuki Kanai
发明人： Hiroshi Otori , Kazuhiko Kajigaya , Kazuyuki Miyazawa , Masaharu Kubo , Atsuyoshi Koike , Fumiyuki Kanai
IPC分类号： H01L21/304 , H01L21/8239 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/1052
摘要： A method of fabricating a semiconductor integrated circuit device includes: recessing a second surface portion of a semiconductor substrate; forming elements of a first circuit region capable of performing a first function at a first surface portion of the semiconductor substrate and elements of a second circuit region capable of performing a second function at the recessed second surface portion of the semiconductor substrate, the elements of the first circuit region and those of the second circuit region having relatively small and large sizes as generally measured in a direction perpendicular to the surface portions of the semiconductor substrate, respectively; forming an insulating film to cover the first and second circuit regions, with a result that a level difference is caused between first and second portions of the insulating film on the first and second circuit regions at a relatively lower level and at a relatively higher level, respectively; effecting chemical-mechanical planarization of the insulating film to suppress the level difference in the insulating film for enhancing a focus margin for successive photolithographic steps; and forming wiring conductors on the insulating film with the suppressed level difference, enjoying the enhanced focus margin.
摘要翻译：一种制造半导体集成电路器件的方法包括：使半导体衬底的第二表面部分凹陷; 形成能够在半导体衬底的第一表面部分处执行第一功能的第一电路区域的元件和能够在半导体衬底的凹入的第二表面部分执行第二功能的第二电路区域的元件，第一电路区域和第二电路区域的第一电路区域分别具有通常在垂直于半导体衬底的表面部分的方向上测量的相对较小和大的尺寸; 形成绝缘膜以覆盖第一和第二电路区域，结果是在第一和第二电路区域上的绝缘膜的第一和第二部分之间在相对较低的电平和相对较高的水平上产生电平差，分别; 实现绝缘膜的化学机械平面化，以抑制绝缘膜中的水平差，以提高连续光刻步骤的聚焦余量; 并且在绝缘膜上形成具有抑制的电平差的布线导体，享受增强的聚焦余量。

9. 发明授权

US07718526B2 Fabrication method of semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件的制造方法
公开(公告)号：US07718526B2
公开(公告)日：2010-05-18
申请号：US11778494
申请日：2007-07-16
申请人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
发明人： Toshiyuki Arai , Ryousei Kawai , Hirofumi Tsuchiyama , Fumiyuki Kanai , Shinichi Nakabayashi
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/0206 , H01L21/02068 , H01L21/3105 , H01L21/321 , H01L21/76807 , H01L21/76819 , H01L21/76838 , H01L21/7684 , H01L21/7685
摘要： A method of fabrication of a semiconductor integrated circuit device, including polishing the entire area of an edge of a wafer, for example, uses three polishing drums in which a polishing drum polishes the upper surface of the edge of the wafer, a polishing drum polishes the central portion of the edge of the wafer and a polishing drum polishes the lower surface of the edge of the wafer, thereby preventing occurrence of obstacles which cause defoliation of thin films on the edge of the wafer.
摘要翻译：例如，制造半导体集成电路器件的方法包括抛光晶片边缘的整个区域，使用抛光滚筒抛光晶片边缘的上表面的三个抛光滚筒，研磨滚筒抛光晶片边缘的中心部分和抛光滚筒抛光晶片边缘的下表面，从而防止导致晶片边缘上的薄膜脱落的障碍物的出现。

10. 发明申请

US20080106570A1 Liquid guiding device and liquid ejecting apparatus 有权
标题翻译：液体引导装置和液体喷射装置
公开(公告)号：US20080106570A1
公开(公告)日：2008-05-08
申请号：US11853695
申请日：2007-09-11
申请人： Fumiyuki KANAI
发明人： Fumiyuki KANAI
IPC分类号： B41J2/165
CPC分类号： B41J2/1721 , B41J11/0065 , B41J11/06
摘要： To provide a liquid guiding device such that, when liquid is dumped onto a sloping guiding surface portion located in a region where ink is dumped, the liquid is easily guided to an ink absorber and no liquid remains on the guiding surface portion. A guiding surface portion 29 is provided in a liquid dumping region 23 in which ink absorbers 25 and 26 are provided and on the upstream edge of a downstream portion 24 of a platen. The upper surface of the guiding surface portions 29 slopes down toward the upstream side, that is, toward the liquid dumping region 23. In the guiding surface portion 29 is formed a guiding structure portion 31 that guides ink attached to the guiding surface portion to the ink absorber 25. The guiding structure portion may include an edge portion 31 that guides liquid by capillary action. The edge portion may extend to the ink absorbers 25 and 26.
摘要翻译：为了提供液体引导装置，使得当液体被倾倒到位于墨水被倾倒的区域中的倾斜引导表面部分上时，液体容易地被引导到墨水吸收器，并且在引导表面部分上没有液体残留。引导表面部分29设置在其中设置有墨吸收器25和26的液体倾倒区域23中以及在压板的下游部分24的上游边缘上。引导面部29的上表面向上游侧倾斜，也就是向液体倾倒区域23倾斜。在引导表面部分29中形成有引导结构部分31，引导结构部分31将附着到引导表面部分的墨水引导到吸墨器25。引导结构部分可以包括通过毛细作用引导液体的边缘部分31。边缘部分可延伸到吸墨器25和26。

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