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1. 发明授权

US09117860B2 Controlled ambient system for interface engineering 有权
标题翻译：接口工程控制环境系统
公开(公告)号：US09117860B2
公开(公告)日：2015-08-25
申请号：US11639752
申请日：2006-12-15
申请人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin W. Mooring , John Parks , William Thie , Fritz C. Redeker , Arthur M. Howald , Alan Schoepp , David Hemker , Carl Woods , Hyungsuk Alexander Yoon , Aleksander Owczarz
发明人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin W. Mooring , John Parks , William Thie , Fritz C. Redeker , Arthur M. Howald , Alan Schoepp , David Hemker , Carl Woods , Hyungsuk Alexander Yoon , Aleksander Owczarz
IPC分类号： H05H1/24 , C23C16/00 , H01L21/67 , H01L21/288 , H01L21/768
CPC分类号： H01L21/67225 , H01L21/288 , H01L21/6704 , H01L21/67167 , H01L21/67184 , H01L21/6723 , H01L21/76849
摘要： A cluster architecture and methods for processing a substrate are disclosed. The cluster architecture includes a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules. The lab-ambient controlled transfer module and the one or more wet substrate processing modules are configured to manage a first ambient environment. A vacuum transfer module that is coupled to the lab-ambient controlled transfer module and one or more plasma processing modules is also provided. The vacuum transfer module and the one or more plasma processing modules are configured to manage a second ambient environment. And, a controlled ambient transfer module that is coupled to the vacuum transfer module and one or more ambient processing modules is also included. The controlled ambient transfer module and the one or more ambient processing modules are configured to manage a third ambient environment. The cluster architecture therefore enables controlled processing of the substrate in either the first, second or third ambient environments, as well as during associated transitions.
摘要翻译：公开了用于处理衬底的簇结构和方法。集群架构包括耦合到一个或多个湿式衬底处理模块的实验室环境受控传输模块。实验室环境控制传递模块和一个或多个湿式衬底处理模块被配置为管理第一环境环境。还提供耦合到实验室环境受控传输模块和一个或多个等离子体处理模块的真空传输模块。真空转移模块和一个或多个等离子体处理模块被配置成管理第二周边环境。并且，还包括耦合到真空传输模块和一个或多个环境处理模块的受控环境转移模块。受控环境传输模块和一个或多个环境处理模块被配置为管理第三环境环境。因此，集群架构使得能够在第一，第二或第三环境环境中以及在相关联的转换期间对衬底进行受控处理。

2. 发明申请

US20120269987A1 Processes and Systems for Engineering a Barrier Surface for Copper Deposition 审中-公开
标题翻译：用于铜沉积的阻挡层表面工艺和系统
公开(公告)号：US20120269987A1
公开(公告)日：2012-10-25
申请号：US13534366
申请日：2012-06-27
申请人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
发明人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
IPC分类号： C23C18/54 , C23C16/06 , B05D5/12
CPC分类号： H01L21/7685 , C23C18/1632 , C23C18/1651 , C23C18/1844 , H01L21/0206 , H01L21/02063 , H01L21/02068 , H01L21/02074 , H01L21/28518 , H01L21/288 , H01L21/32115 , H01L21/32135 , H01L21/32136 , H01L21/67161 , H01L21/67207 , H01L21/76814 , H01L21/7684 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76862 , H01L21/76867 , H01L21/76871 , H01L21/76879
摘要： An integrated system for processing a substrate in controlled environment to enable deposition of a thin copper seed layer on a surface of a metallic barrier layer of a copper interconnect is provided. The system includes a lab-ambient transfer chamber, a vacuum transfer chamber, a vacuum process module for cleaning an exposed surface of a metal oxide of a underlying metal, a vacuum process module for depositing the metallic barrier layer, and a controlled-ambient transfer chamber filled with an inert gas, wherein at least one controlled-ambient process module is coupled to the controlled-ambient transfer chamber. In addition, the system includes an electroless copper deposition process module used to deposit the thin layer of copper seed layer on the surface of the metallic barrier layer.
摘要翻译：提供了一种用于在受控环境中处理衬底以使薄铜种子层在铜互连的金属阻挡层的表面上沉积的集成系统。该系统包括实验室环境转移室，真空转移室，用于清洁下面金属的金属氧化物的暴露表面的真空处理模块，用于沉积金属阻挡层的真空处理模块和受控环境转移室内装有惰性气体，其中至少一个受控环境的过程模块耦合到受控环境的传送室。此外，该系统包括用于在金属阻挡层的表面上沉积铜籽晶层的薄层的无电铜沉积工艺模块。

3. 发明授权

US08241701B2 Processes and systems for engineering a barrier surface for copper deposition 有权
标题翻译：用于工程用于铜沉积的阻挡面的工艺和系统
公开(公告)号：US08241701B2
公开(公告)日：2012-08-14
申请号：US11514038
申请日：2006-08-30
申请人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
发明人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
IPC分类号： B05D5/12
CPC分类号： H01L21/7685 , C23C18/1632 , C23C18/1651 , C23C18/1844 , H01L21/0206 , H01L21/02063 , H01L21/02068 , H01L21/02074 , H01L21/28518 , H01L21/288 , H01L21/32115 , H01L21/32135 , H01L21/32136 , H01L21/67161 , H01L21/67207 , H01L21/76814 , H01L21/7684 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76862 , H01L21/76867 , H01L21/76871 , H01L21/76879
摘要： The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically barrier-to-copper interface. An exemplary method of preparing a substrate surface of a substrate to deposit a metallic barrier layer to line a copper interconnect structure of the substrate and to deposit a thin copper seed layer on a surface of the metallic barrier layer in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes cleaning an exposed surface of a underlying metal to remove surface metal oxide in the integrated system, wherein the underlying metal is part of a underlying interconnect electrically connected to the copper interconnect. The method also includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, wherein after depositing the metallic barrier layer, the substrate is transferred and processed in controlled environment to prevent the formation of metallic barrier oxide. The method further includes depositing the thin copper seed layer in the integrated system, and depositing a gap-fill copper layer over the thin copper seed layer in the integrated system. An exemplary system to practice the exemplary method described above is also provided.
摘要翻译：这些实施方案通过提供改进的工艺和系统来提供改进的金属 - 金属界面，更具体地说是阻隔层，提高了电迁移性能，提供较低的金属电阻率，以及改进铜互连的金属 - 金属界面粘附的需要，到铜接口。一种制备衬底的衬底表面的示例性方法，以沉积金属阻挡层以对衬底的铜互连结构进行排列并且在集成系统中在金属阻挡层的表面上沉积薄铜籽晶层以改善电迁移性能的铜互连。该方法包括清洁底层金属的暴露表面以去除集成系统中的表面金属氧化物，其中下面的金属是与铜互连电连接的底层互连件的一部分。该方法还包括沉积金属阻挡层以在集成系统中对铜互连结构进行排列，其中在沉积金属阻挡层之后，将基底在受控环境中转移和加工以防止形成金属阻挡氧化物。该方法还包括在集成系统中沉积薄铜籽晶层，以及在集成系统中的薄铜种子层上沉积间隙填充铜层。还提供了用于实践上述示例性方法的示例性系统。

4. 发明申请

US20070292603A1 Processes and systems for engineering a barrier surface for copper deposition 有权
标题翻译：用于工程用于铜沉积的阻挡面的工艺和系统
公开(公告)号：US20070292603A1
公开(公告)日：2007-12-20
申请号：US11514038
申请日：2006-08-30
申请人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
发明人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , William Thie , Arthur M. Howald
IPC分类号： B05D5/12 , C23C16/00 , B05D3/00 , C23C14/00 , B05C13/02 , H05K3/00 , B29C71/04 , C23C14/32
CPC分类号： H01L21/7685 , C23C18/1632 , C23C18/1651 , C23C18/1844 , H01L21/0206 , H01L21/02063 , H01L21/02068 , H01L21/02074 , H01L21/28518 , H01L21/288 , H01L21/32115 , H01L21/32135 , H01L21/32136 , H01L21/67161 , H01L21/67207 , H01L21/76814 , H01L21/7684 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76862 , H01L21/76867 , H01L21/76871 , H01L21/76879
摘要： The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve metal-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce an improved metal-to-metal interface, more specifically barrier-to-copper interface. An exemplary method of preparing a substrate surface of a substrate to deposit a metallic barrier layer to line a copper interconnect structure of the substrate and to deposit a thin copper seed layer on a surface of the metallic barrier layer in an integrated system to improve electromigration performance of the copper interconnect is provided. The method includes cleaning an exposed surface of a underlying metal to remove surface metal oxide in the integrated system, wherein the underlying metal is part of a underlying interconnect electrically connected to the copper interconnect. The method also includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, wherein after depositing the metallic barrier layer, the substrate is transferred and processed in controlled environment to prevent the formation of metallic barrier oxide. The method further includes depositing the thin copper seed layer in the integrated system, and depositing a gap-fill copper layer over the thin copper seed layer in the integrated system. An exemplary system to practice the exemplary method described above is also provided.
摘要翻译：这些实施方案通过提供改进的工艺和系统来提供改进的金属 - 金属界面，更具体地说是阻隔层，提高了电迁移性能，提供较低的金属电阻率，以及改进铜互连的金属 - 金属界面粘附的需要，到铜接口。一种制备衬底的衬底表面的示例性方法，以沉积金属阻挡层以对衬底的铜互连结构进行排列并且在集成系统中在金属阻挡层的表面上沉积薄铜籽晶层以改善电迁移性能的铜互连。该方法包括清洁底层金属的暴露表面以去除集成系统中的表面金属氧化物，其中下面的金属是与铜互连电连接的底层互连件的一部分。该方法还包括沉积金属阻挡层以在集成系统中对铜互连结构进行排列，其中在沉积金属阻挡层之后，将基底在受控环境中转移和加工以防止形成金属阻挡氧化物。该方法还包括在集成系统中沉积薄铜籽晶层，以及在集成系统中的薄铜籽晶层上沉积间隙填充铜层。还提供了用于实践上述示例性方法的示例性系统。

5. 发明申请

US20080057182A1 METHOD FOR GAP FILL IN CONTROLLED AMBIENT SYSTEM 审中-公开
标题翻译：控制环境系统中填隙的方法
公开(公告)号：US20080057182A1
公开(公告)日：2008-03-06
申请号：US11611758
申请日：2006-12-15
申请人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
发明人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
IPC分类号： B05D5/12 , B05D1/36
CPC分类号： H01L21/67207 , H01L21/76843 , H01L21/76877
摘要： A method for filling a trench of a substrate in a controlled environment is provided. The method initiates with etching a trench in the substrate in a first chamber of a cluster tool. A barrier layer configured to prevent electromigration is deposited over an exposed surface of the trench in a second chamber of the cluster tool and the trench is filled with a gap fill material deposited directly onto the barrier layer in the cluster tool. A semiconductor device fabricated by the method is also provided.
摘要翻译：提供了一种用于在受控环境中填充衬底的沟槽的方法。该方法通过在簇工具的第一室中蚀刻衬底中的沟槽来启动。构造成防止电迁移的阻挡层沉积在簇工具的第二腔中的沟槽的暴露表面上，并且沟槽填充有直接沉积在簇工具中的阻挡层上的间隙填充材料。还提供了通过该方法制造的半导体器件。

6. 发明申请

US20090304914A1 Self assembled monolayer for improving adhesion between copper and barrier layer 审中-公开
标题翻译：自组装单层以改善铜和阻挡层之间的粘附性
公开(公告)号：US20090304914A1
公开(公告)日：2009-12-10
申请号：US11639012
申请日：2006-12-13
申请人： Praveen Nalla , William Thie , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , Yezdi Dordi
发明人： Praveen Nalla , William Thie , John Boyd , Tiruchirapalli Arunagiri , Hyungsuk Alexander Yoon , Fritz C. Redeker , Yezdi Dordi
IPC分类号： B05D3/10
CPC分类号： C23C16/45525 , C23C16/18 , H01L21/288 , H01L21/76843 , H01L21/76855 , H01L21/76856 , H01L21/76861
摘要： The embodiments fill the need enabling deposition of a thin and conformal barrier layer, and a copper layer in the copper interconnect with good electro-migration performance and with reduced risk of stress-induce voiding of copper interconnect. Electromigration and stress-induced voiding are affected by the adhesion between the barrier layer and the copper layer. A functionalization layer is deposited over the barrier layer to enable the copper layer being deposit in the copper interconnect. The functionalization layer forms strong bonds with barrier layer and with copper to improve adhesion property between the two layers. An exemplary method of preparing a substrate surface of a substrate to deposit a functionalization layer over a metallic barrier layer of a copper interconnect to assist deposition of a copper layer in the copper interconnect in order to improve electromigration performance of the copper interconnect is provided. The method includes depositing the metallic barrier layer to line the copper interconnect structure in the integrated system, and oxidizing a surface of the metallic barrier layer. The method also includes depositing the functionalization layer over the oxidized surface of the metallic barrier layer, and depositing the copper layer in the copper interconnect structure after the funcationalization layer is deposited over the metallic barrier layer.
摘要翻译：这些实施例满足了能够沉积薄且保形的阻挡层和铜互连中的铜层的需要，具有良好的电迁移性能并且具有降低的铜互连的应力诱发空穴的风险。电迁移和应力引起的空隙受到阻挡层和铜层之间的粘附的影响。在阻挡层上沉积功能化层，以使铜层沉积在铜互连中。官能化层与阻挡层和铜形成强结合，以改善两层之间的粘附性。提供了制备衬底的衬底表面以在铜互连的金属阻挡层上沉积功能化层以辅助铜层沉积在铜互连中以便提高铜互连的电迁移性能的示例性方法。该方法包括沉积金属阻挡层以在集成系统中对铜互连结构进行排列，以及氧化金属阻挡层的表面。该方法还包括将功能化层沉积在金属阻挡层的氧化表面上，并且在功能层沉积在金属阻挡层上之后，将铜层沉积在铜互连结构中。

7. 发明申请

US20080057221A1 Controlled ambient system for interface engineering 有权
标题翻译：接口工程控制环境系统
公开(公告)号：US20080057221A1
公开(公告)日：2008-03-06
申请号：US11639752
申请日：2006-12-15
申请人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
发明人： John Boyd , Yezdi Dordi , Tiruchirapalli Arunagiri , Benjamin Mooring , John Parks , William Thie , Fritz Redeker , Arthur Howald , Alan Schoepp , David Hemker
IPC分类号： H05H1/24 , C23C16/00
CPC分类号： H01L21/67225 , H01L21/288 , H01L21/6704 , H01L21/67167 , H01L21/67184 , H01L21/6723 , H01L21/76849
摘要： A cluster architecture and methods for processing a substrate are disclosed. The cluster architecture includes a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules. The lab-ambient controlled transfer module and the one or more wet substrate processing modules are configured to manage a first ambient environment. A vacuum transfer module that is coupled to the lab-ambient controlled transfer module and one or more plasma processing modules is also provided. The vacuum transfer module and the one or more plasma processing modules are configured to manage a second ambient environment. And, a controlled ambient transfer module that is coupled to the vacuum transfer module and one or more ambient processing modules is also included. The controlled ambient transfer module and the one or more ambient processing modules are configured to manage a third ambient environment. The cluster architecture therefore enables controlled processing of the substrate in either the first, second or third ambient environments, as well as during associated transitions.
摘要翻译：公开了用于处理衬底的簇结构和方法。集群架构包括耦合到一个或多个湿式衬底处理模块的实验室环境受控传输模块。实验室环境控制传递模块和一个或多个湿式衬底处理模块被配置为管理第一环境环境。还提供耦合到实验室环境受控传输模块和一个或多个等离子体处理模块的真空传输模块。真空转移模块和一个或多个等离子体处理模块被配置成管理第二周边环境。并且，还包括耦合到真空传输模块和一个或多个环境处理模块的受控环境转移模块。受控环境传输模块和一个或多个环境处理模块被配置为管理第三环境环境。因此，集群架构使得能够在第一，第二或第三环境环境中以及在相关联的转换期间对衬底进行受控处理。

8. 发明授权

US08747960B2 Processes and systems for engineering a silicon-type surface for selective metal deposition to form a metal silicide 有权
标题翻译：用于工程化硅型表面以进行选择性金属沉积以形成金属硅化物的工艺和系统
公开(公告)号：US08747960B2
公开(公告)日：2014-06-10
申请号：US11513446
申请日：2006-08-30
申请人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Johan Vertommen , Fritz C. Redeker , William Thie , Arthur M. Howald
发明人： Yezdi Dordi , John Boyd , Tiruchirapalli Arunagiri , Johan Vertommen , Fritz C. Redeker , William Thie , Arthur M. Howald
IPC分类号： C23C14/02 , H05H1/00
CPC分类号： C23C18/1651 , C23C18/1893 , H01L21/0206 , H01L21/02063 , H01L21/02068 , H01L21/02074 , H01L21/28518 , H01L21/288 , H01L21/32115 , H01L21/32135 , H01L21/32136 , H01L21/67161 , H01L21/67207 , H01L21/76814 , H01L21/7684 , H01L21/76843 , H01L21/76846 , H01L21/76849 , H01L21/76862 , Y02P70/605
摘要： The embodiments fill the need to enhance electro-migration performance, provide lower metal resistivity, and improve silicon-to-metal interfacial adhesion for copper interconnects by providing improved processes and systems that produce a silicon-to-metal interface. An exemplary method of preparing a substrate surface of a substrate to selectively deposit a layer of a metal on a silicon or polysilicon surface of the substrate to form a metal silicide in an integrated system is provided. The method includes removing organic contaminants from the substrate surface in the integrated system, and reducing the silicon or polysilicon surface in the integrated system after removing organic contaminants to convert silicon oxide on the silicon or polysilicon surface to silicon, wherein after reducing the silicon or polysilicon surface, the substrate is transferred and processed in controlled environment to prevent the formation of silicon oxide, the silicon or polysilicon surface is reduced to increase the selectivity of the metal on the silicon surface. The method further includes selectively depositing the layer of the metal on the silicon or polysilicon surface of substrate in the integrated system after reducing the silicon or polysilicon surface. An exemplary system to practice the exemplary method described above is also provided.
摘要翻译：这些实施方案通过提供产生硅 - 金属界面的改进的工艺和系统来满足增强电迁移性能，提供较低金属电阻率以及改进铜互连的硅 - 金属界面粘附的需要。提供了制备衬底的衬底表面以在衬底的硅或多晶硅表面上选择性地沉积金属层以在集成系统中形成金属硅化物的示例性方法。该方法包括从集成系统中的衬底表面去除有机污染物，以及在去除有机污染物之后减少集成系统中的硅或多晶硅表面，以将硅或多晶硅表面上的氧化硅转化为硅，其中在还原硅或多晶硅之后表面，在受控环境中转移和处理衬底以防止形成氧化硅，减少硅或多晶硅表面以增加金属在硅表面上的选择性。该方法还包括在减少硅或多晶硅表面之后，在集成系统中的衬底的硅或多晶硅表面上选择性地沉积金属层。还提供了用于实践上述示例性方法的示例性系统。

9. 发明授权

US07884017B2 Thermal methods for cleaning post-CMP wafers 有权
标题翻译：用于清洁CMP后晶圆的热处理方法
公开(公告)号：US07884017B2
公开(公告)日：2011-02-08
申请号：US12699518
申请日：2010-02-03
申请人： Zhonghui Alex Wang , Tiruchirapalli Arunagiri , Fritz C. Redeker , Yezdi Dordi , John Boyd , Mikhail Korolik , Arthur M. Howald , William Thie , Praveen Nalla
发明人： Zhonghui Alex Wang , Tiruchirapalli Arunagiri , Fritz C. Redeker , Yezdi Dordi , John Boyd , Mikhail Korolik , Arthur M. Howald , William Thie , Praveen Nalla
IPC分类号： H01L21/44 , H01L21/31 , H01L21/469 , H01L21/24 , H01L21/40
CPC分类号： H01L21/02074
摘要： Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating.
摘要翻译：提供了化学机械抛光后的半导体晶片清洗方法。一种示例性方法将晶片暴露于氧化环境中的热处理，然后在还原环境中进行热处理。在氧化环境中的热处理既去除残留物，又氧化暴露的铜表面以形成氧化铜层。然后，在还原环境中的热处理将氧化铜还原为元素铜。这使得暴露的铜清洁并进行进一步处理，例如化学镀。

10. 发明申请

US20080280456A1 Thermal methods for cleaning post-CMP wafers 有权
标题翻译：用于清洁CMP后晶圆的热处理方法
公开(公告)号：US20080280456A1
公开(公告)日：2008-11-13
申请号：US11801269
申请日：2007-05-08
申请人： Zhonghui Alex Wang , Tiruchirapalli Arunagiri , Fritz C. Redeker , Yezdi Dordi , John Boyd , Mikhail Korolik , Arthur M. Howald , William Thie , Praveen Nalla
发明人： Zhonghui Alex Wang , Tiruchirapalli Arunagiri , Fritz C. Redeker , Yezdi Dordi , John Boyd , Mikhail Korolik , Arthur M. Howald , William Thie , Praveen Nalla
IPC分类号： H01L21/00
CPC分类号： H01L21/02074
摘要： Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating.
摘要翻译：提供了化学机械抛光后的半导体晶片清洗方法。一种示例性方法将晶片暴露于氧化环境中的热处理，然后在还原环境中进行热处理。在氧化环境中的热处理既去除残留物，又氧化暴露的铜表面以形成氧化铜层。然后，在还原环境中的热处理将氧化铜还原为元素铜。这使得暴露的铜清洁并进行进一步处理，例如化学镀。

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