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1. 发明授权

US07282429B2 Method of manufacturing Schottky diode device 有权
标题翻译：制造肖特基二极管器件的方法
公开(公告)号：US07282429B2
公开(公告)日：2007-10-16
申请号：US11208374
申请日：2005-08-19
申请人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
发明人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
IPC分类号： H01L21/28
CPC分类号： H01L29/66143 , H01L21/32105 , H01L21/32139 , H01L27/0814
摘要： Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing the polysilicon layer to form a poly oxide layer on the polysilicon layer; (d) forming and defining a photoresist layer on the poly oxide layer for exposing parts of the poly oxide layer; (e) etching the poly oxide layer, the polysilicon layer and the gate oxide layer via the photoresist layer for forming a poly oxide structure, a polysilicon structure and a gate oxide structure; and (f) removing the photoresist layer. The present invention introduces a poly oxide layer instead of the CVD oxide for preventing the photoresist lifting issue.
摘要翻译：本发明的实施例提供一种制造肖特基二极管器件的方法。在一个实施例中，该方法包括：（a）提供衬底; （b）在基板上依次形成栅氧化层和多晶硅层; （c）在所述多晶硅层上部分氧化所述多晶硅层以形成多晶氧化物层; （d）在所述多晶氧化物层上形成和限定光致抗蚀剂层，以暴露所述多晶氧化物层的部分; （e）经由用于形成多晶氧化物结构的光致抗蚀剂层，多晶硅结构和栅极氧化物结构蚀刻多晶氧化物层，多晶硅层和栅极氧化物层; 和（f）去除光致抗蚀剂层。本发明引入了用于防止光致抗蚀剂提升问题的多氧化物层代替CVD氧化物。

2. 发明授权

US06991994B2 Method of forming rounded corner in trench 有权
标题翻译：在沟槽中形成圆角的方法
公开(公告)号：US06991994B2
公开(公告)日：2006-01-31
申请号：US10771688
申请日：2004-02-03
申请人： Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
发明人： Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
IPC分类号： H01L21/76
CPC分类号： H01L21/76235
摘要： A method for forming a trench having rounded corners in a semiconductor device comprises providing a substrate; forming a first pad oxide layer, a first silicon nitride layer, and a first oxide layer on the substrate sequentially; removing portions of the first oxide layer, the first silicon nitride layer, the first pad oxide layer, and the substrate to form at least one trench; and removing portions of the first oxide layer, the first silicon nitride layer, and the first pad oxide layer in the trench above an upper corner of the substrate in the trench. The substrate includes a lower corner at a bottom of the trench. The method further comprises forming a second pad oxide layer in the trench; forming a second silicon nitride layer on the second pad oxide layer and the first oxide layer; removing portions of the second silicon nitride layer to expose the second pad oxide layer on the corners and the bottom of the trench; forming a thermal oxide layer on the second pad oxide layer exposed by removing the portions of the second nitride layer; and removing the second silicon nitride layer, the thermal oxide layer, and the second pad oxide layer.
摘要翻译：在半导体器件中形成具有圆角的沟槽的方法包括提供衬底; 在基板上依次形成第一衬垫氧化物层，第一氮化硅层和第一氧化物层; 去除第一氧化物层，第一氮化硅层，第一衬垫氧化物层和衬底的部分，以形成至少一个沟槽; 以及在沟槽中的衬底的上角上方的沟槽中去除第一氧化物层，第一氮化硅层和第一衬垫氧化物层的部分。衬底包括沟槽底部的下角。该方法还包括在沟槽中形成第二衬垫氧化物层; 在所述第二焊盘氧化物层和所述第一氧化物层上形成第二氮化硅层; 去除第二氮化硅层的部分以暴露沟槽的角部和底部上的第二焊盘氧化物层; 通过去除所述第二氮化物层的所述部分而在所述第二焊盘氧化物层上形成热氧化层; 以及去除所述第二氮化硅层，所述热氧化物层和所述第二衬垫氧化物层。

3. 发明授权

US07432204B2 Wafer and the manufacturing and reclaiming methods thereof 有权
标题翻译：晶圆及其制造和回收方法
公开(公告)号：US07432204B2
公开(公告)日：2008-10-07
申请号：US10917696
申请日：2004-08-13
申请人： Jen Chieh Chang , Yi Fu Chung , Pei-Feng Sun
发明人： Jen Chieh Chang , Yi Fu Chung , Pei-Feng Sun
IPC分类号： H01L21/31 , H01L23/12 , H01L21/469 , H01L21/8238
CPC分类号： H01L21/02032 , H01L21/02079
摘要： A wafer and the manufacturing and reclaiming methods thereof are disclosed. The wafer includes a semiconductor substrate and a protective layer formed on the surface of the semiconductor substrate. The reclaiming method of the wafer includes providing a wafer having a semiconductor substrate, a protective layer formed on the semiconductor substrate, and a polysilicon layer formed on the protective layer; and removing the polysilicon layer. The wafer and the reclaiming method of the wafer can prevent the substrate of the wafer from being destroyed during the reclaiming process and increase the reclaiming rate of the wafer.
摘要翻译：公开了一种晶片及其制造和回收方法。晶片包括形成在半导体衬底的表面上的半导体衬底和保护层。晶片的回收方法包括提供具有半导体衬底的晶片，形成在半导体衬底上的保护层和形成在保护层上的多晶硅层; 并去除多晶硅层。晶片的晶片和回收方法可以防止晶片的基板在回收过程中被破坏并且增加晶片的回收率。

4. 发明授权

US06492248B2 Few-particle-induced low-pressure TEOS process 有权
标题翻译：微粒诱导的低压TEOS工艺
公开(公告)号：US06492248B2
公开(公告)日：2002-12-10
申请号：US09888398
申请日：2001-06-26
申请人： Jen Chieh Chang , Yi Fu Chung , Ching-Cheng Hsieh , Pei-Feng Sun
发明人： Jen Chieh Chang , Yi Fu Chung , Ching-Cheng Hsieh , Pei-Feng Sun
IPC分类号： H01L2120
CPC分类号： H01L21/02164 , C23C16/402 , H01L21/02271 , H01L21/02337 , H01L21/31612
摘要： A few-particle-induced low-pressure TEOS process is disclosed. First, a lot of semiconductor substrates are arranged on a boat and transferred into a TEOS reactor. Silicon oxide films are then deposited on the semiconductor substrates by performing a low-pressure TEOS process. Before the substrates are sent out of the reactor, an annealing process is performed by injecting oxygen gas into the reactor to solidify the oxide films on the corners of the boat's flanges.
摘要翻译：公开了几种颗粒诱导的低压TEOS工艺。首先，将许多半导体衬底布置在船上并转移到TEOS反应器中。然后通过执行低压TEOS工艺将氧化硅膜沉积在半导体衬底上。在将基板送出反应器之前，通过将氧气注入反应器中以固化船的凸缘的角部上的氧化膜来进行退火处理。

5. 发明申请

US20060094254A1 Method for forming field oxide 有权
标题翻译：形成场氧化物的方法
公开(公告)号：US20060094254A1
公开(公告)日：2006-05-04
申请号：US11204479
申请日：2005-08-15
申请人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
发明人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76213
摘要： A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.
摘要翻译：公开了一种形成场氧化物的方法。在一个实施例中，该方法包括提供具有衬底，衬垫氧化物和图案化阻挡层的半导体结构，进行干氧化处理以在未被阻挡层覆盖的区域中的衬底上形成第一场氧化物，通过引入纯干氧，并进行湿氧化处理，以通过引入氢和氧形成与第一场氧化物相邻的第二场氧化物。本发明的方法可以提高半导体器件的质量和电气性能，提高产量，降低成本。

6. 发明授权

US07211523B2 Method for forming field oxide 有权
标题翻译：形成场氧化物的方法
公开(公告)号：US07211523B2
公开(公告)日：2007-05-01
申请号：US11204479
申请日：2005-08-15
申请人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
发明人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76213
摘要： A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.
摘要翻译：公开了一种形成场氧化物的方法。在一个实施例中，该方法包括提供具有衬底，衬垫氧化物和图案化阻挡层的半导体结构，进行干氧化处理以在未被阻挡层覆盖的区域中的衬底上形成第一场氧化物，通过引入纯干氧，并进行湿氧化处理，以通过引入氢和氧形成与第一场氧化物相邻的第二场氧化物。本发明的方法可以提高半导体器件的质量和电气性能，提高产量，降低成本。

7. 发明授权

US07592240B2 Method for forming a gate structure through an amorphous silicon layer and applications thereof 有权
标题翻译：通过非晶硅层形成栅极结构的方法及其应用
公开(公告)号：US07592240B2
公开(公告)日：2009-09-22
申请号：US11202698
申请日：2005-08-12
申请人： Jen Chieh Chang , Shih-Chi Lai , Yi Fu Chung , Tun-Fu Hung
发明人： Jen Chieh Chang , Shih-Chi Lai , Yi Fu Chung , Tun-Fu Hung
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/28035 , H01L21/32055 , H01L29/4916 , H01L29/66734
摘要： A fabrication method for forming a gate structure through an amorphous silicon layer includes providing a substrate layer, forming an amorphous silicon layer of a selected thickness on the substrate layer at a reaction temperature between about 520° C. and 560° C., and forming a doped amorphous silicon layer in a upper portion of the amorphous silicon layer at a reaction temperature between about 520° C. and 560° C.
摘要翻译：用于通过非晶硅层形成栅极结构的制造方法包括提供衬底层，在约520℃至560℃的反应温度下在衬底层上形成所选厚度的非晶硅层，并形成在约520℃至560℃的反应温度下在非晶硅层的上部的掺杂非晶硅层。

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