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1. 发明授权

US06991994B2 Method of forming rounded corner in trench 有权
标题翻译：在沟槽中形成圆角的方法
公开(公告)号：US06991994B2
公开(公告)日：2006-01-31
申请号：US10771688
申请日：2004-02-03
申请人： Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
发明人： Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
IPC分类号： H01L21/76
CPC分类号： H01L21/76235
摘要： A method for forming a trench having rounded corners in a semiconductor device comprises providing a substrate; forming a first pad oxide layer, a first silicon nitride layer, and a first oxide layer on the substrate sequentially; removing portions of the first oxide layer, the first silicon nitride layer, the first pad oxide layer, and the substrate to form at least one trench; and removing portions of the first oxide layer, the first silicon nitride layer, and the first pad oxide layer in the trench above an upper corner of the substrate in the trench. The substrate includes a lower corner at a bottom of the trench. The method further comprises forming a second pad oxide layer in the trench; forming a second silicon nitride layer on the second pad oxide layer and the first oxide layer; removing portions of the second silicon nitride layer to expose the second pad oxide layer on the corners and the bottom of the trench; forming a thermal oxide layer on the second pad oxide layer exposed by removing the portions of the second nitride layer; and removing the second silicon nitride layer, the thermal oxide layer, and the second pad oxide layer.
摘要翻译：在半导体器件中形成具有圆角的沟槽的方法包括提供衬底; 在基板上依次形成第一衬垫氧化物层，第一氮化硅层和第一氧化物层; 去除第一氧化物层，第一氮化硅层，第一衬垫氧化物层和衬底的部分，以形成至少一个沟槽; 以及在沟槽中的衬底的上角上方的沟槽中去除第一氧化物层，第一氮化硅层和第一衬垫氧化物层的部分。衬底包括沟槽底部的下角。该方法还包括在沟槽中形成第二衬垫氧化物层; 在所述第二焊盘氧化物层和所述第一氧化物层上形成第二氮化硅层; 去除第二氮化硅层的部分以暴露沟槽的角部和底部上的第二焊盘氧化物层; 通过去除所述第二氮化物层的所述部分而在所述第二焊盘氧化物层上形成热氧化层; 以及去除所述第二氮化硅层，所述热氧化物层和所述第二衬垫氧化物层。

2. 发明授权

US07282429B2 Method of manufacturing Schottky diode device 有权
标题翻译：制造肖特基二极管器件的方法
公开(公告)号：US07282429B2
公开(公告)日：2007-10-16
申请号：US11208374
申请日：2005-08-19
申请人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
发明人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
IPC分类号： H01L21/28
CPC分类号： H01L29/66143 , H01L21/32105 , H01L21/32139 , H01L27/0814
摘要： Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing the polysilicon layer to form a poly oxide layer on the polysilicon layer; (d) forming and defining a photoresist layer on the poly oxide layer for exposing parts of the poly oxide layer; (e) etching the poly oxide layer, the polysilicon layer and the gate oxide layer via the photoresist layer for forming a poly oxide structure, a polysilicon structure and a gate oxide structure; and (f) removing the photoresist layer. The present invention introduces a poly oxide layer instead of the CVD oxide for preventing the photoresist lifting issue.
摘要翻译：本发明的实施例提供一种制造肖特基二极管器件的方法。在一个实施例中，该方法包括：（a）提供衬底; （b）在基板上依次形成栅氧化层和多晶硅层; （c）在所述多晶硅层上部分氧化所述多晶硅层以形成多晶氧化物层; （d）在所述多晶氧化物层上形成和限定光致抗蚀剂层，以暴露所述多晶氧化物层的部分; （e）经由用于形成多晶氧化物结构的光致抗蚀剂层，多晶硅结构和栅极氧化物结构蚀刻多晶氧化物层，多晶硅层和栅极氧化物层; 和（f）去除光致抗蚀剂层。本发明引入了用于防止光致抗蚀剂提升问题的多氧化物层代替CVD氧化物。

3. 发明申请

US20060091589A1 Monitoring method for furnace apparatus 审中-公开
标题翻译：炉装置监控方法
公开(公告)号：US20060091589A1
公开(公告)日：2006-05-04
申请号：US11202734
申请日：2005-08-12
申请人： Ming-Hung Chiu , Pei-Feng Sun , Kuo-Pin Pan , Sheng-Lung Wu
发明人： Ming-Hung Chiu , Pei-Feng Sun , Kuo-Pin Pan , Sheng-Lung Wu
IPC分类号： C21D11/00
CPC分类号： F27B17/0025 , C21D11/00 , F27D19/00 , F27D21/0014 , F27D21/04 , H01L21/67109 , H01L21/67248
摘要： The present invention relates to a monitoring method for a furnace apparatus. The monitoring method includes powering on the furnace apparatus to a specific power value; recording the rate of increase of the temperature of the furnace apparatus; and comparing the rate of increase of the temperature with a predetermined threshold value, wherein the furnace apparatus is to be replaced when the rate of increase of the temperature of the furnace apparatus is less than the predetermined threshold value.
摘要翻译：本发明涉及炉装置的监视方法。监测方法包括将炉装置上电到特定功率值; 记录炉装置温度升高的速度; 以及将所述温度的增加率与预定阈值进行比较，其中当所述炉装置的温度升高速度小于所述预定阈值时，所述炉设备将被更换。

4. 发明授权

US6147013A Method of LPCVD silicon nitride deposition 有权
标题翻译： LPCVD氮化硅沉积方法
公开(公告)号：US6147013A
公开(公告)日：2000-11-14
申请号：US236577
申请日：1999-01-26
申请人： Pei-Feng Sun , Ching-Cheng Hsieh , Chien-Hung Chen , May-Jane Chen
发明人： Pei-Feng Sun , Ching-Cheng Hsieh , Chien-Hung Chen , May-Jane Chen
IPC分类号： C23C16/34 , C23C16/44 , C23C16/455 , H01L21/314 , H01L21/318 , H01L21/31
CPC分类号： C23C16/45523 , C23C16/345 , C23C16/4401 , C23C16/4408 , H01L21/3185
摘要： A method of LPCVD silicon nitride deposition for decreasing particles is disclosed. First, a silicon nitride layer is formed on a semiconductor substrate by LPCVD. Next, low gas flow rate purging step and cycle purging step are executed sequentially. Finally, the semiconductor substrate is taken out from the LPCVD tube. The key point of this invention is decreasing the gas flow rate of purging and cycle purging by inputting nitrogen gas slowly. Thereby the substrate surface contamination problem induced by conventional method can be avoided.
摘要翻译：公开了一种用于减小颗粒的LPCVD氮化硅沉积的方法。首先，通过LPCVD在半导体衬底上形成氮化硅层。接下来，顺序地执行低气体流量吹扫步骤和循环净化步骤。最后，将半导体衬底从LPCVD管中取出。本发明的关键是通过缓慢输入氮气来减少清洗和循环清洗的气体流量。从而可以避免常规方法引起的基板表面污染问题。

5. 发明授权

US07432204B2 Wafer and the manufacturing and reclaiming methods thereof 有权
标题翻译：晶圆及其制造和回收方法
公开(公告)号：US07432204B2
公开(公告)日：2008-10-07
申请号：US10917696
申请日：2004-08-13
申请人： Jen Chieh Chang , Yi Fu Chung , Pei-Feng Sun
发明人： Jen Chieh Chang , Yi Fu Chung , Pei-Feng Sun
IPC分类号： H01L21/31 , H01L23/12 , H01L21/469 , H01L21/8238
CPC分类号： H01L21/02032 , H01L21/02079
摘要： A wafer and the manufacturing and reclaiming methods thereof are disclosed. The wafer includes a semiconductor substrate and a protective layer formed on the surface of the semiconductor substrate. The reclaiming method of the wafer includes providing a wafer having a semiconductor substrate, a protective layer formed on the semiconductor substrate, and a polysilicon layer formed on the protective layer; and removing the polysilicon layer. The wafer and the reclaiming method of the wafer can prevent the substrate of the wafer from being destroyed during the reclaiming process and increase the reclaiming rate of the wafer.
摘要翻译：公开了一种晶片及其制造和回收方法。晶片包括形成在半导体衬底的表面上的半导体衬底和保护层。晶片的回收方法包括提供具有半导体衬底的晶片，形成在半导体衬底上的保护层和形成在保护层上的多晶硅层; 并去除多晶硅层。晶片的晶片和回收方法可以防止晶片的基板在回收过程中被破坏并且增加晶片的回收率。

6. 发明申请

US20060046368A1 Method of manufacturing schottky diode device 有权
标题翻译：制造肖特基二极管器件的方法
公开(公告)号：US20060046368A1
公开(公告)日：2006-03-02
申请号：US11208374
申请日：2005-08-19
申请人： Shih-Chi Lai , Pei-Feng Sun , Yi Chung , Jen Chang
发明人： Shih-Chi Lai , Pei-Feng Sun , Yi Chung , Jen Chang
IPC分类号： H01L21/8238 , H01L21/302 , H01L21/31
CPC分类号： H01L29/66143 , H01L21/32105 , H01L21/32139 , H01L27/0814
摘要： Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing the polysilicon layer to form a poly oxide layer on the polysilicon layer; (d) forming and defining a photoresist layer on the poly oxide layer for exposing parts of the poly oxide layer; (e) etching the poly oxide layer, the polysilicon layer and the gate oxide layer via the photoresist layer for forming a poly oxide structure, a polysilicon structure and a gate oxide structure; and (f) removing the photoresist layer. The present invention introduces a poly oxide layer instead of the CVD oxide for preventing the photoresist lifting issue.
摘要翻译：本发明的实施例提供一种制造肖特基二极管器件的方法。在一个实施例中，该方法包括：（a）提供衬底; （b）在基板上依次形成栅氧化层和多晶硅层; （c）在所述多晶硅层上部分氧化所述多晶硅层以形成多晶氧化物层; （d）在所述多晶氧化物层上形成和限定光致抗蚀剂层，以暴露所述多晶氧化物层的部分; （e）经由用于形成多晶氧化物结构的光致抗蚀剂层，多晶硅结构和栅极氧化物结构蚀刻多晶氧化物层，多晶硅层和栅极氧化物层; 和（f）去除光致抗蚀剂层。本发明引入了用于防止光致抗蚀剂提升问题的多氧化物层代替CVD氧化物。

7. 发明申请

US20050248004A1 Wafer and the manufacturing and reclaiming methods thereof 有权
标题翻译：晶圆及其制造和回收方法
公开(公告)号：US20050248004A1
公开(公告)日：2005-11-10
申请号：US10917696
申请日：2004-08-13
申请人： Jen Chang , Yi Chung , Pei-Feng Sun
发明人： Jen Chang , Yi Chung , Pei-Feng Sun
IPC分类号： H01L21/00 , H01L21/02 , H01L21/46 , H01L23/58
CPC分类号： H01L21/02032 , H01L21/02079
摘要： A wafer and the manufacturing and reclaiming methods thereof are disclosed. The wafer includes a semiconductor substrate and a protective layer formed on the surface of the semiconductor substrate. The reclaiming method of the wafer includes providing a wafer having a semiconductor substrate, a protective layer formed on the semiconductor substrate, and a polysilicon layer formed on the protective layer; and removing the polysilicon layer. The wafer and the reclaiming method of the wafer can prevent the substrate of the wafer from being destroyed during the reclaiming process and increase the reclaiming rate of the wafer.
摘要翻译：公开了一种晶片及其制造和回收方法。晶片包括形成在半导体衬底的表面上的半导体衬底和保护层。晶片的回收方法包括提供具有半导体衬底的晶片，形成在半导体衬底上的保护层和形成在保护层上的多晶硅层; 并去除多晶硅层。晶片的晶片和回收方法可以防止晶片的基板在回收过程中被破坏并且增加晶片的回收率。

8. 发明授权

US06828196B2 Trench filling process for preventing formation of voids in trench 有权
标题翻译：用于防止在沟槽中形成空隙的沟槽填充过程
公开(公告)号：US06828196B2
公开(公告)日：2004-12-07
申请号：US10652635
申请日：2003-08-28
申请人： Pei-Feng Sun , Shih-Chi Lai , Mao-Song Tseng , Yi-Fu Chung
发明人： Pei-Feng Sun , Shih-Chi Lai , Mao-Song Tseng , Yi-Fu Chung
IPC分类号： H01L21336
CPC分类号： H01L21/76224
摘要： Embodiments of the present invention relate to a process for filling a trench structure of a semiconductor device to prevent formation of voids in the trench structure so as to minimize current leakage and provide excellent electrical properties. In one embodiment, a process for filling a trench of a semiconductor device comprises providing a semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate; forming an oxide layer on the silicon nitride layer; partially removing the oxide layer, the silicon nitride layer and the semiconductor substrate to form at least one trench; forming a sacrificial oxide layer on sidewalls of the trench; removing the sacrificial oxide layer; performing an etching procedure to remove portions of the silicon nitride layer protruding from the sidewalls of the trench so as to form substantially even sidewalls of the trench; and forming a trench-fill layer to fill the trench and deposit on the oxide layer.
摘要翻译：本发明的实施例涉及一种用于填充半导体器件的沟槽结构以防止在沟槽结构中形成空隙的方法，以便使电流泄漏最小化并提供优异的电性能。在一个实施例中，用于填充半导体器件的沟槽的工艺包括提供半导体衬底; 在所述半导体衬底上形成氮化硅层; 在所述氮化硅层上形成氧化物层; 部分去除氧化物层，氮化硅层和半导体衬底以形成至少一个沟槽; 在所述沟槽的侧壁上形成牺牲氧化物层; 去除牺牲氧化物层; 执行蚀刻步骤以去除从沟槽的侧壁突出的部分氮化硅层，以形成沟槽的基本均匀的侧壁; 以及形成沟槽填充层以填充沟槽并沉积在氧化物层上。

9. 发明授权

US06492248B2 Few-particle-induced low-pressure TEOS process 有权
标题翻译：微粒诱导的低压TEOS工艺
公开(公告)号：US06492248B2
公开(公告)日：2002-12-10
申请号：US09888398
申请日：2001-06-26
申请人： Jen Chieh Chang , Yi Fu Chung , Ching-Cheng Hsieh , Pei-Feng Sun
发明人： Jen Chieh Chang , Yi Fu Chung , Ching-Cheng Hsieh , Pei-Feng Sun
IPC分类号： H01L2120
CPC分类号： H01L21/02164 , C23C16/402 , H01L21/02271 , H01L21/02337 , H01L21/31612
摘要： A few-particle-induced low-pressure TEOS process is disclosed. First, a lot of semiconductor substrates are arranged on a boat and transferred into a TEOS reactor. Silicon oxide films are then deposited on the semiconductor substrates by performing a low-pressure TEOS process. Before the substrates are sent out of the reactor, an annealing process is performed by injecting oxygen gas into the reactor to solidify the oxide films on the corners of the boat's flanges.
摘要翻译：公开了几种颗粒诱导的低压TEOS工艺。首先，将许多半导体衬底布置在船上并转移到TEOS反应器中。然后通过执行低压TEOS工艺将氧化硅膜沉积在半导体衬底上。在将基板送出反应器之前，通过将氧气注入反应器中以固化船的凸缘的角部上的氧化膜来进行退火处理。

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