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1. 发明申请

US20080280430A1 METHOD OF FORMING FILMS IN A TRENCH 审中-公开
标题翻译：在TRENCH中形成膜的方法
公开(公告)号：US20080280430A1
公开(公告)日：2008-11-13
申请号：US12120885
申请日：2008-05-15
申请人： Shih-Chi Lai , Tun-Fu Hung , Yi-Fu Chung , Jen-Chieh Chang
发明人： Shih-Chi Lai , Tun-Fu Hung , Yi-Fu Chung , Jen-Chieh Chang
IPC分类号： H01L21/283
CPC分类号： H01L29/513 , H01L21/31053 , H01L21/31662 , H01L21/3185 , H01L29/66734
摘要： A method of forming films in a trench is applied to the manufacturing process of a power MOS device. In one embodiment, the method comprises providing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a first dielectric layer on sidewalls of the trench, forming a second dielectric layer on the first dielectric layer, and forming a polysilicon layer in the trench. The method of forming films in a trench of the present invention can reduce or eliminate the thermal stress resulting from the different thermal expansion coefficients of different material layers after high temperature process.
摘要翻译：在沟槽中形成膜的方法被应用于功率MOS器件的制造过程。在一个实施例中，该方法包括提供半导体衬底，在半导体衬底中形成沟槽，在沟槽的侧壁上形成第一电介质层，在第一电介质层上形成第二电介质层，以及在沟槽中形成多晶硅层。在本发明的沟槽中形成膜的方法可以降低或消除由高温处理后的不同材料层的不同热膨胀系数产生的热应力。

2. 发明申请

US20050266641A1 Method of forming films in a trench 审中-公开
标题翻译：在沟槽中形成膜的方法
公开(公告)号：US20050266641A1
公开(公告)日：2005-12-01
申请号：US10961575
申请日：2004-10-08
申请人： Shih-Chi Lai , Tun-Fu Hung , Yi-Fu Chung , Jen-Chieh Chang
发明人： Shih-Chi Lai , Tun-Fu Hung , Yi-Fu Chung , Jen-Chieh Chang
IPC分类号： H01L21/306 , H01L21/3105 , H01L21/316 , H01L21/318 , H01L21/336 , H01L29/51
CPC分类号： H01L29/513 , H01L21/31053 , H01L21/31662 , H01L21/3185 , H01L29/66734
摘要： A method of forming films in a trench is applied to the manufacturing process of a power MOS device. In one embodiment, the method comprises providing a semiconductor substrate, forming a trench in the semiconductor substrate, forming a first dielectric layer on sidewalls of the trench, forming a second dielectric layer on the first dielectric layer, and forming a polysilicon layer in the trench. The method of forming films in a trench of the present invention can reduce or eliminate the thermal stress resulting from the different thermal expansion coefficients of different material layers after high temperature process.
摘要翻译：在沟槽中形成膜的方法被应用于功率MOS器件的制造过程。在一个实施例中，该方法包括提供半导体衬底，在半导体衬底中形成沟槽，在沟槽的侧壁上形成第一电介质层，在第一电介质层上形成第二电介质层，以及在沟槽中形成多晶硅层。在本发明的沟槽中形成膜的方法可以降低或消除由高温处理后的不同材料层的不同热膨胀系数产生的热应力。

3. 发明授权

US07592240B2 Method for forming a gate structure through an amorphous silicon layer and applications thereof 有权
标题翻译：通过非晶硅层形成栅极结构的方法及其应用
公开(公告)号：US07592240B2
公开(公告)日：2009-09-22
申请号：US11202698
申请日：2005-08-12
申请人： Jen Chieh Chang , Shih-Chi Lai , Yi Fu Chung , Tun-Fu Hung
发明人： Jen Chieh Chang , Shih-Chi Lai , Yi Fu Chung , Tun-Fu Hung
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L21/28035 , H01L21/32055 , H01L29/4916 , H01L29/66734
摘要： A fabrication method for forming a gate structure through an amorphous silicon layer includes providing a substrate layer, forming an amorphous silicon layer of a selected thickness on the substrate layer at a reaction temperature between about 520° C. and 560° C., and forming a doped amorphous silicon layer in a upper portion of the amorphous silicon layer at a reaction temperature between about 520° C. and 560° C.
摘要翻译：用于通过非晶硅层形成栅极结构的制造方法包括提供衬底层，在约520℃至560℃的反应温度下在衬底层上形成所选厚度的非晶硅层，并形成在约520℃至560℃的反应温度下在非晶硅层的上部的掺杂非晶硅层。

4. 发明授权

US07282429B2 Method of manufacturing Schottky diode device 有权
标题翻译：制造肖特基二极管器件的方法
公开(公告)号：US07282429B2
公开(公告)日：2007-10-16
申请号：US11208374
申请日：2005-08-19
申请人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
发明人： Shih-Chi Lai , Pei-Feng Sun , Yi Fu Chung , Jen Chieh Chang
IPC分类号： H01L21/28
CPC分类号： H01L29/66143 , H01L21/32105 , H01L21/32139 , H01L27/0814
摘要： Embodiments of the invention provide a method of manufacturing a Schottky diode device. In one embodiment, the method includes: (a) providing a substrate; (b) sequentially forming a gate oxide layer and a polysilicon layer on the substrate; (c) partially oxidizing the polysilicon layer to form a poly oxide layer on the polysilicon layer; (d) forming and defining a photoresist layer on the poly oxide layer for exposing parts of the poly oxide layer; (e) etching the poly oxide layer, the polysilicon layer and the gate oxide layer via the photoresist layer for forming a poly oxide structure, a polysilicon structure and a gate oxide structure; and (f) removing the photoresist layer. The present invention introduces a poly oxide layer instead of the CVD oxide for preventing the photoresist lifting issue.
摘要翻译：本发明的实施例提供一种制造肖特基二极管器件的方法。在一个实施例中，该方法包括：（a）提供衬底; （b）在基板上依次形成栅氧化层和多晶硅层; （c）在所述多晶硅层上部分氧化所述多晶硅层以形成多晶氧化物层; （d）在所述多晶氧化物层上形成和限定光致抗蚀剂层，以暴露所述多晶氧化物层的部分; （e）经由用于形成多晶氧化物结构的光致抗蚀剂层，多晶硅结构和栅极氧化物结构蚀刻多晶氧化物层，多晶硅层和栅极氧化物层; 和（f）去除光致抗蚀剂层。本发明引入了用于防止光致抗蚀剂提升问题的多氧化物层代替CVD氧化物。

5. 发明申请

US20060094254A1 Method for forming field oxide 有权
标题翻译：形成场氧化物的方法
公开(公告)号：US20060094254A1
公开(公告)日：2006-05-04
申请号：US11204479
申请日：2005-08-15
申请人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
发明人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76213
摘要： A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.
摘要翻译：公开了一种形成场氧化物的方法。在一个实施例中，该方法包括提供具有衬底，衬垫氧化物和图案化阻挡层的半导体结构，进行干氧化处理以在未被阻挡层覆盖的区域中的衬底上形成第一场氧化物，通过引入纯干氧，并进行湿氧化处理，以通过引入氢和氧形成与第一场氧化物相邻的第二场氧化物。本发明的方法可以提高半导体器件的质量和电气性能，提高产量，降低成本。

6. 发明申请

US20050250277A1 Method for reclaiming and reusing wafers 有权
标题翻译：回收再利用晶圆的方法
公开(公告)号：US20050250277A1
公开(公告)日：2005-11-10
申请号：US10942690
申请日：2004-09-15
申请人： Jen-Chieh Chang , Shih-Chi Lai , Yi-Fu Chung , Chih-Shin Tsai
发明人： Jen-Chieh Chang , Shih-Chi Lai , Yi-Fu Chung , Chih-Shin Tsai
IPC分类号： H01L21/00 , H01L21/02 , H01L21/8238
CPC分类号： H01L21/02079
摘要： Embodiments of the present invention provide a method for reclaiming and reusing a wafer. In one embodiment, a method for reclaiming a wafer comprises providing a used, nonproductive wafer having a semiconductor substrate and a polysilicon layer formed on the semiconductor substrate; oxidizing a first part of the polysilicon layer to form a first oxide layer; removing the first oxide layer; and oxidizing a second part of the polysilicon layer to form a second oxide layer on the used wafer which is to be used as a reclaimed wafer. The nonproductive wafer is used to improve the quality of a deposition process of the polysilicon layer on one or more productive wafers.
摘要翻译：本发明的实施例提供了一种用于回收和再利用晶片的方法。在一个实施例中，一种用于回收晶片的方法包括提供使用的非生产性晶片，其具有形成在半导体衬底上的半导体衬底和多晶硅层; 氧化多晶硅层的第一部分以形成第一氧化物层; 去除第一氧化物层; 以及氧化所述多晶硅层的第二部分，以在用作再生晶片的所用晶片上形成第二氧化物层。非生产性晶片用于提高多晶硅层在一个或多个生产性晶片上的沉积工艺的质量。

7. 发明授权

US07375005B2 Method for reclaiming and reusing wafers 有权
标题翻译：回收再利用晶圆的方法
公开(公告)号：US07375005B2
公开(公告)日：2008-05-20
申请号：US10942690
申请日：2004-09-15
申请人： Jen-Chieh Chang , Shih-Chi Lai , Yi-Fu Chung , Chih-Shin Tsai
发明人： Jen-Chieh Chang , Shih-Chi Lai , Yi-Fu Chung , Chih-Shin Tsai
IPC分类号： H01L21/46
CPC分类号： H01L21/02079
摘要： Embodiments of the present invention provide a method for reclaiming and reusing a wafer. In one embodiment, a method for reclaiming a wafer comprises providing a used, nonproductive wafer having a semiconductor substrate and a polysilicon layer formed on the semiconductor substrate; oxidizing a first part of the polysilicon layer to form a first oxide layer; removing the first oxide layer; and oxidizing a second part of the polysilicon layer to form a second oxide layer on the used wafer which is to be used as a reclaimed wafer. The nonproductive wafer is used to improve the quality of a deposition process of the polysilicon layer on one or more productive wafers.
摘要翻译：本发明的实施例提供了一种用于回收和再利用晶片的方法。在一个实施例中，一种用于回收晶片的方法包括提供使用的非生产性晶片，其具有形成在半导体衬底上的半导体衬底和多晶硅层; 氧化多晶硅层的第一部分以形成第一氧化物层; 去除第一氧化物层; 以及氧化所述多晶硅层的第二部分，以在用作再生晶片的所用晶片上形成第二氧化物层。非生产性晶片用于提高多晶硅层在一个或多个生产性晶片上的沉积工艺的质量。

8. 发明授权

US07211523B2 Method for forming field oxide 有权
标题翻译：形成场氧化物的方法
公开(公告)号：US07211523B2
公开(公告)日：2007-05-01
申请号：US11204479
申请日：2005-08-15
申请人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
发明人： Yi Fu Chung , Shih-Chi Lai , Jen Chieh Chang
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/76213
摘要： A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer, performing a dry oxidation process to form a first field oxide on the substrate in a region not covered with the barrier layer by introducing pure dry oxygen, and performing a wet oxidation process to form a second field oxide adjacent the first field oxide by introducing hydrogen and oxygen. The method of the present invention can improve the quality and electrical property of the semiconductor device, increase the yield, and reduce the cost.
摘要翻译：公开了一种形成场氧化物的方法。在一个实施例中，该方法包括提供具有衬底，衬垫氧化物和图案化阻挡层的半导体结构，进行干氧化处理以在未被阻挡层覆盖的区域中的衬底上形成第一场氧化物，通过引入纯干氧，并进行湿氧化处理，以通过引入氢和氧形成与第一场氧化物相邻的第二场氧化物。本发明的方法可以提高半导体器件的质量和电气性能，提高产量，降低成本。

9. 发明授权

US06709952B2 Method of forming a bottom oxide layer in a trench 有权
标题翻译：在沟槽中形成底部氧化物层的方法
公开(公告)号：US06709952B2
公开(公告)日：2004-03-23
申请号：US10453771
申请日：2003-06-02
申请人： Shih-Chi Lai , Yi-Fu Chung , Jen-Chieh Chang , Ching-Chiu Chu
发明人： Shih-Chi Lai , Yi-Fu Chung , Jen-Chieh Chang , Ching-Chiu Chu
IPC分类号： H01L2176
CPC分类号： H01L21/76224
摘要： Embodiments of the present invention are directed to a method of forming a bottom oxide layer in a trench on a semiconductor substrate. In one embodiment, a method for forming a bottom oxide layer in a trench on a semiconductor substrate comprises depositing an oxide layer along the surface of the sidewall and the bottom of a trench on a semiconductor substrate which has top layers, depositing a nitride layer along the surface of the said oxide layer, and forming a photo-resist filler in a trench. The top surface of the photo-resist filler is lower than the top surface of the substrate to expose a portion of the nitride layer uncovered by the photo-resist filler. The exposed portion of the nitride layer is removed to expose the oxide layer underneath. A portion of the oxide layer on the sidewalls of a trench is removed to form a bottom oxide layer in a trench.
摘要翻译：本发明的实施例涉及在半导体衬底上的沟槽中形成底部氧化物层的方法。在一个实施例中，用于在半导体衬底上的沟槽中形成底部氧化物层的方法包括沿着具有顶层的半导体衬底上的沟槽的侧壁和沟槽的表面沉积氧化物层，沿着所述氧化物层的表面，并在沟槽中形成光致抗蚀剂填料。光刻胶填料的顶表面低于衬底的顶表面，以露出未被光刻胶填料覆盖的氮化物层的一部分。去除氮化物层的暴露部分以露出下面的氧化物层。去除沟槽侧壁上的氧化物层的一部分以在沟槽中形成底部氧化物层。

10. 发明申请

US20060046364A1 Method for forming a gate structure through an amorphous silicon layer and applications thereof 有权
公开(公告)号：US20060046364A1
公开(公告)日：2006-03-02
申请号：US11202698
申请日：2005-08-12
申请人： Jen Chang , Shih-Chi Lai , Yi Chung , Tun-Fu Hung
发明人： Jen Chang , Shih-Chi Lai , Yi Chung , Tun-Fu Hung
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： H01L29/7813 , H01L21/28035 , H01L21/32055 , H01L29/4916 , H01L29/66734
摘要： A fabrication method for forming a gate structure through an amorphous silicon layer includes providing a substrate layer, forming an amorphous silicon layer of a selected thickness on the substrate layer at a reaction temperature between about 520° C. and 560° C., and forming a doped amorphous silicon layer in a upper portion of the amorphous silicon layer at a reaction temperature between about 520° C. and 560° C.

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