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1. 发明授权

US5757688A Method and apparatus for high speed division 失效
标题翻译：高速分割的方法和装置
公开(公告)号：US5757688A
公开(公告)日：1998-05-26
申请号：US527793
申请日：1995-09-13
申请人： Jason Chen , Paul Chen , George Chang
发明人： Jason Chen , Paul Chen , George Chang
IPC分类号： G06F7/52 , G06F7/535
CPC分类号： G06F7/535
摘要： A high speed division method and apparatus that does not require the use of dividers are provided. The method and apparatus utilize a binary shift-add technique to simplify a divisional computation process and to enable computational error to be contained in a predetermined range, and to obtain a higher computing speed. The apparatus includes a divisor left-shift apparatus for inputting a divisor and to left-shift the divisor, a dividend left-shift apparatus for inputting a dividend and to left-shift the dividend, a left-shift controller for controlling the left-shift motion of the divisor, a quotient right-shift apparatus for inputting the indexes from a division table and then right-shift the quotient. The apparatus utilizes left-shift or right-shift to achieve a multiplication or division by 2.
摘要翻译：提供了不需要使用分频器的高速分割方法和装置。该方法和装置利用二进制移位加法技术简化分割计算过程，并使计算误差能够包含在预定范围内，并获得更高的计算速度。该装置包括用于输入除数和左移除数的除数左移装置，用于输入被除数和左移除数的除数左移装置，用于控制左移的左移控制器除数的运动，用于从分割表输入索引然后右移该商的商右移装置。该装置利用左移或右移来实现乘法或除法2。

2. 发明授权

US5715187A Method and apparatus for integer multiplication 失效
标题翻译：整数乘法的方法和装置
公开(公告)号：US5715187A
公开(公告)日：1998-02-03
申请号：US610410
申请日：1996-03-04
申请人： Jason Chen , Paul Chen , George Chang
发明人： Jason Chen , Paul Chen , George Chang
IPC分类号： G06F1/03 , G06F7/52
CPC分类号： G06F1/03
摘要： A binary multiplication method utilizing a combined table lookup and long multiplication to simplify the multiplication procedure, to improve the computational speed, and to save half of the memory space normally required. The method is executed by first moving the least significant bit (LSB) of the multiplier to another memory device before the start of the computation and then using the shortened multiplier in the multiplication operation since the multiplier is reduced by one bit, the memory space required for the multiplication table is reduced by half. The method does not require the use of a multiplying device and only needs small memory space. The manufacturing cost of a microprocessor can be reduced accordingly.
摘要翻译：使用组合表查找和长乘法的二进制乘法方法来简化乘法过程，提高计算速度，并节省通常所需的一半存储空间。该方法通过首先在计算开始之前将乘法器的最低有效位（LSB）移动到另一个存储器件，然后在乘法运算中使用缩短的乘法器来执行，因为乘法器被减少一位，所需存储器空间对于乘法表减少了一半。该方法不需要使用乘法器，只需要较小的存储空间。可以相应地减少微处理器的制造成本。

3. 发明授权

US5737257A Method and apparatus for compression of integer multiplication table 失效
标题翻译：用于整数乘法表压缩的方法和装置
公开(公告)号：US5737257A
公开(公告)日：1998-04-07
申请号：US527792
申请日：1995-09-13
申请人： Jason Chen , Paul Chen , George Chang
发明人： Jason Chen , Paul Chen , George Chang
IPC分类号： G06F1/035 , G06F7/52
CPC分类号： G06F7/53 , G06F1/0356
摘要： A method of compressing an integer multiplication table including the steps of first eliminating one of the two symmetrical and identical sections in the table, eliminating the products of 0 multiplier and 0 multiplicand, moving the product of the multiplier having an index of n into the location of index (n-1) for the multiplier, using one-half of the number of the largest multiplier as the largest multiplier index for the compressed multiplication table, moving into the non-continuous memory space of the compressed multiplication table by a page-filling method the product of the largest multiplier index value that is larger than the compressed multiplication table such that the multiplication table after compression can be stored on the same page.
摘要翻译：一种压缩整数乘法表的方法，包括以下步骤：首先消除表中两个对称和相同部分之一，消除0乘法器和0乘法器的乘积，将具有索引为n的乘法器的乘积移动到位置（n-1），使用最大乘数的数目的一半作为压缩乘法表的最大乘数索引，通过页面转换到压缩乘法表的非连续存储器空间中，填充方法是大于压缩乘数表的最大乘数指数值的乘积，使得压缩后的乘法表可以存储在同一页上。

4. 发明授权

US5694351A Method and apparatus for generating degree of membership in fuzzy inference 失效
标题翻译：产生模糊推理隶属度的方法和装置
公开(公告)号：US5694351A
公开(公告)日：1997-12-02
申请号：US611793
申请日：1996-03-06
申请人： George Chang , Paul Chen , Jason Chen
发明人： George Chang , Paul Chen , Jason Chen
IPC分类号： G06N7/04 , G06G7/00 , G06F15/18
CPC分类号： G06N7/04 , Y10S706/90
摘要： A method and apparatus for determining the degree of membership in a fuzzy inference by using a subtractor and a divider without the need for a complicated multiplication, division circuit or software that is normally required in a conventional method. A fuzzy inference database for the degree of membership is first established in a microprocessor by a fuzzy inference method, the membership function in the fuzzy database has a range between 0 to 1 at full scale for the degree of membership function. When the microprocessor detects an input data, a slope distance ratio and the corresponding coordinates are determined and compared using the input data and the fuzzy database established in the microprocessor. The ratio determined by the greatly simplified method is the degree of membership function.
摘要翻译：一种用于通过使用减法器和分频器来确定模糊推理的隶属程度的方法和装置，而不需要常规方法中通常需要的复杂的乘法，除法电路或软件。首先在微处理器中通过模糊推理方法建立了隶属程度的模糊推理数据库，模糊数据库中的隶属函数在隶属度函数的范围内范围为0到1。当微处理器检测到输入数据时，使用输入数据和微处理器中建立的模糊数据确定和比较相应的坐标。通过大大简化的方法确定的比例是隶属函数的程度。

5. 发明申请

US20060039217A1 Power efficient read circuit for a serial output memory device and method 有权
标题翻译：用于串行输出存储器件和方法的高效读取电路
公开(公告)号：US20060039217A1
公开(公告)日：2006-02-23
申请号：US10921754
申请日：2004-08-17
申请人： Neal Berger , George Chang , Pearl Cheng , Anne Koh
发明人： Neal Berger , George Chang , Pearl Cheng , Anne Koh
IPC分类号： G11C7/00
CPC分类号： G11C7/08 , G11C7/1027 , G11C7/103
摘要： An integrated circuit memory device has a plurality of memory cells arranged in a plurality of arrays. Each array has a plurality of rows, and a plurality of column lines, and a plurality of row lines connecting to the memory cells in each array. The memory cell in an array is addressable by a column line and a row line. A column address decoder receives a column address signal and selects one or more column lines of each array in response. A row address decoder receives a row address signal and selects a row line of each array in response. The memory device also has a plurality (k) of sense amplifiers, with one sense amplifier associated with each array, connectable to one or more column lines of the array and receives a signal therefrom supplied from an addressed memory cell. The memory device further has a register; and a control circuit. The control circuit receives a read command, and a clock signal, and in response to the read command activates a first plurality (j) of the plurality (k) of sense amplifiers (j
摘要翻译：集成电路存储器件具有以多个阵列排列的多个存储单元。每个阵列具有多个行，多个列线以及连接到每个阵列中的存储器单元的多条行线。阵列中的存储单元可由列线和行行寻址。列地址解码器接收列地址信号并且响应地选择每个阵列的一个或多个列线。行地址解码器接收行地址信号并且响应地选择每个阵列的行线。存储器件还具有多个（k）个读出放大器，其中一个读出放大器与每个阵列相关联，可连接到阵列的一个或多个列线，并接收从寻址的存储器单元提供的信号。存储器件还具有寄存器; 和控制电路。控制电路接收读取命令，并且时钟信号，并且响应于读取命令，激活多个（k）个读出放大器（k）中的第一个（j）一段足以感测信号的时间段在与多个（j）个读出放大器中的每一个相关联的连接列线上。控制电路将信号锁存到寄存器中; 并且去激活所述第一多个（j）读出放大器; 并响应于时钟信号串行输出来自寄存器的信号。

6. 发明授权

US5968950A Apo B-secretion/MTP inhibitor hydrochloride salt 失效
标题翻译： Apo B分泌/ MTP抑制剂盐酸盐
公开(公告)号：US5968950A
公开(公告)日：1999-10-19
申请号：US33506
申请日：1998-03-02
申请人： George J. Quallich , George Chang , Lewin T. Wint
发明人： George J. Quallich , George Chang , Lewin T. Wint
IPC分类号： A61K31/47 , A61K31/472 , A61P1/00 , A61P3/04 , A61P3/06 , A61P3/08 , A61P3/10 , A61P9/10 , A61P43/00 , C07D217/02 , C07D217/04 , A01N43/42
CPC分类号： C07D217/02 , C07D217/04
摘要： A hydrochloride salt of an Apo B secretion/MTP inhibitor, methods of making the salt, methods of using the salt and pharmaceutical compositions containing the salt are disclosed.
摘要翻译：公开了Apo B分泌物/ MTP抑制剂的盐酸盐，盐的制备方法，盐的使用方法和含有该盐的药物组合物。

7. 发明授权

US08291737B2 Automatic extrusion device 失效
标题翻译：自动挤出装置
公开(公告)号：US08291737B2
公开(公告)日：2012-10-23
申请号：US12763157
申请日：2010-04-19
申请人： Roger Huang , Newer Wang , George Chang , Jason Liao
发明人： Roger Huang , Newer Wang , George Chang , Jason Liao
IPC分类号： B21D41/02
CPC分类号： B21D41/021
摘要： An automatic extrusion device includes a main body, a driving unit, a first transmission unit, a second transmission unit and an extrusion unit. The second transmission unit has a clutch slip function for the automatic extrusion device to extrude the front of the pipe to be in the form of a bell for a fast connection of pipes. Through the slip function of the second transmission unit, it not only prevents the extrusion unit from over extrusion but also makes the front end of the pipe round so as to beautify the interface of the pipe.
摘要翻译：自动挤出装置包括主体，驱动单元，第一传动单元，第二传动单元和挤出单元。第二传动单元具有用于自动挤出装置的离合器打滑功能，以将管的前部挤出成为用于快速连接管道的钟形式。通过第二传动单元的滑动功能，不仅可以防止挤出单元过度挤压，而且使管的前端圆形，从而美化管道的界面。

8. 发明授权

US07955943B2 High voltage sensor device and method therefor 有权
标题翻译：高压传感器装置及其方法
公开(公告)号：US07955943B2
公开(公告)日：2011-06-07
申请号：US12570300
申请日：2009-09-30
申请人： Jefferson W. Hall , Mohammed Tanvir Quddus , Richard S. Burton , Kazunori Oikawa , George Chang
发明人： Jefferson W. Hall , Mohammed Tanvir Quddus , Richard S. Burton , Kazunori Oikawa , George Chang
IPC分类号： H01L21/02
CPC分类号： H01L27/0288 , H01L23/5228 , H01L27/0629 , H01L27/0802 , H01L28/20 , H01L29/0696 , H01L29/1045 , H01L29/405 , H01L29/7835 , H01L2924/0002 , H03K17/102 , H01L2924/00
摘要： In one embodiment, a high voltage element is formed overlying a doped semiconductor region that can be depleted during the operation of the high voltage element includes a conductor overlying a space in a resistor.
摘要翻译：在一个实施例中，高电压元件被形成为覆盖在高电压元件的操作期间可以耗尽的掺杂半导体区域，包括覆盖电阻器中的空间的导体。

9. 发明申请

US20090162988A1 METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR 有权
公开(公告)号：US20090162988A1
公开(公告)日：2009-06-25
申请号：US12395076
申请日：2009-02-27
申请人： Thomas Keena , Ki Chang , Francine Y. Robb , Mingjiao Liu , Ali Salih , John Michael Parsey, JR. , George Chang
发明人： Thomas Keena , Ki Chang , Francine Y. Robb , Mingjiao Liu , Ali Salih , John Michael Parsey, JR. , George Chang
IPC分类号： H01L21/77 , H01L21/762
CPC分类号： H01L29/8613 , H01L27/0255 , H01L29/8618 , Y10S257/929 , Y10S438/966 , Y10S438/983
摘要： In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.

10. 发明申请

US20080258210A1 SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20080258210A1
公开(公告)日：2008-10-23
申请号：US11737923
申请日：2007-04-20
申请人： Prasad Venkatraman , Gordon M. Grivna , Francine Y. Robb , George Chang , Carroll Casteel
发明人： Prasad Venkatraman , Gordon M. Grivna , Francine Y. Robb , George Chang , Carroll Casteel
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7811 , H01L29/0696 , H01L29/41766 , H01L29/4236 , H01L29/42376 , H01L29/4238 , H01L29/66727 , H01L29/66734 , H01L29/7813
摘要： A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in the region of P-type conductivity. Trenches are formed in a semiconductor material and extend through the regions of N-type and P-type conductivities. A field oxide is formed from the semiconductor material such that portions of the trenches extend under the field oxide. The field oxide serves as an implant mask in the formation of source regions. Body contact regions are formed from the semiconductor material and an electrical conductor is formed in contact with the source and body regions. An electrical conductor is formed in contact with the backside of the semiconductor material.
摘要翻译：能够抑制寄生双极型晶体管的形成的半导体元件和使用减少数量的掩模步骤来制造半导体元件的方法。提供具有P型导电性区域的N型导电性的半导体材料。在P型导电性区域形成N型导电性的掺杂区域。沟槽形成在半导体材料中并延伸通过N型和P型导电性的区域。由半导体材料形成场氧化物，使得沟槽的部分在场氧化物的下方延伸。场氧化物在源区的形成中用作注入掩模。主体接触区域由半导体材料形成，并且形成与源区和身体区域接触的电导体。形成与半导体材料的背面接触的电导体。

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