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1. 发明授权

US07629270B2 Remote plasma activated nitridation 有权
标题翻译：远程等离子体激活氮化
公开(公告)号：US07629270B2
公开(公告)日：2009-12-08
申请号：US11212503
申请日：2005-08-24
申请人： Johan Swerts , Hilde De Witte , Jan Willem Maes , Christophe F. Pomarede , Ruben Haverkort , Yuet Mei Wan , Marinus J. De Blank , Cornelius A. Van Der Jeugd , Jacobus Johannes Beulens
发明人： Johan Swerts , Hilde De Witte , Jan Willem Maes , Christophe F. Pomarede , Ruben Haverkort , Yuet Mei Wan , Marinus J. De Blank , Cornelius A. Van Der Jeugd , Jacobus Johannes Beulens
IPC分类号： H01L21/31
CPC分类号： H01L21/28194 , C23C16/345 , C23C16/452 , C23C16/45523 , C23C16/45578 , C23C16/515 , H01L21/02381 , H01L21/02422 , H01L21/02532 , H01L21/0262 , H01L21/28202 , H01L21/28211 , H01L21/3141 , H01L21/3144 , H01L21/3145 , H01L21/3148 , H01L21/3185 , H01L29/518
摘要： A nitrogen precursor that has been activated by exposure to a remotely excited species is used as a reactant to form nitrogen-containing layers. The remotely excited species can be, e.g., N2, Ar, and/or He, which has been excited in a microwave radical generator. Downstream of the microwave radical generator and upstream of the substrate, the flow of excited species is mixed with a flow of NH3. The excited species activates the NH3. The substrate is exposed to both the activated NH3 and the excited species. The substrate can also be exposed to a precursor of another species to form a compound layer in a chemical vapor deposition. In addition, already-deposited layers can be nitrided by exposure to the activated NH3 and to the excited species, which results in higher levels of nitrogen incorporation than plasma nitridation using excited N2 alone, or thermal nitridation using NH3 alone, with the same process temperatures and nitridation durations.
摘要翻译：通过暴露于远程激发的物质而活化的氮前体被用作形成含氮层的反应物。远程激发的物质可以是例如已经在微波自由基发生器中激发的N 2，Ar和/或He。在微波自由基发生器的下游和衬底的上游，受激物质的流动与NH 3流混合。激发的物质激活NH3。底物暴露于活化的NH 3和被激发的物质。衬底也可以暴露于另一物质的前体，以在化学气相沉积中形成化合物层。此外，已经沉积的层可以通过暴露于活化的NH 3和被激发的物质而被氮化，这导致比等离子体氮化更高的氮掺入水平，使用单独的使用激发的N 2，或者使用单独的NH 3进行热氮化，具有相同的工艺温度和氮化时间。

2. 发明授权

US09136180B2 Process for depositing electrode with high effective work function 有权
标题翻译：具有高效功能的电极沉积工艺
公开(公告)号：US09136180B2
公开(公告)日：2015-09-15
申请号：US13359385
申请日：2012-01-26
申请人： Vladimir Machkaoutsan , Jan Willem Maes , Qi Xie
发明人： Vladimir Machkaoutsan , Jan Willem Maes , Qi Xie
IPC分类号： H01L21/8238 , H01L21/28 , H01L29/49 , H01L29/66 , H01L29/78
CPC分类号： H01L21/823842 , H01L21/28088 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： According to some embodiments, an electrode have a high effective work function is formed. The electrode may be the gate electrode of a transistor and may be formed on a high-k gate dielectric by depositing a first layer of conductive material, exposing that first layer to a hydrogen-containing gas, and depositing a second layer of conductive material over the first layer. The first layer may be deposited using a non-plasma process in which the substrate is not exposed to plasma or plasma-generated radicals. The hydrogen-containing gas to which the first layer is exposed may include an excited hydrogen species, which may be part of a hydrogen-containing plasma, and may be hydrogen-containing radicals. The first layer may also be exposed to oxygen before depositing the second layer. The work function of the gate electrode in the gate stack may be about 5 eV or higher in some embodiments.
摘要翻译：根据一些实施例，形成具有高有效功函数的电极。电极可以是晶体管的栅极，并且可以通过沉积第一层导电材料，将第一层暴露于含氢气体，并将第二层导电材料沉积在高k栅极电介质上形成第一层。可以使用其中衬底不暴露于等离子体或等离子体产生的自由基的非等离子体工艺来沉积第一层。第一层露出的含氢气体可以包括可以是含氢等离子体的一部分的被激发的氢物质，并且可以是含氢基团。在沉积第二层之前，第一层也可能暴露于氧气。在一些实施例中，栅极堆叠中的栅电极的功函数可以为约5eV或更高。

3. 发明授权

US09117773B2 High concentration water pulses for atomic layer deposition 有权
标题翻译：用于原子层沉积的高浓度水脉冲
公开(公告)号：US09117773B2
公开(公告)日：2015-08-25
申请号：US12547911
申请日：2009-08-26
申请人： Eric J. Shero , Mohith Verghese , Jan Willem Maes
发明人： Eric J. Shero , Mohith Verghese , Jan Willem Maes
IPC分类号： H01L21/31 , H01L21/314 , C23C16/40 , C23C16/455 , H01L21/02 , H01L21/316
CPC分类号： H01L21/3141 , C23C16/405 , C23C16/45527 , H01L21/02181 , H01L21/0228 , H01L21/31645
摘要： Methods are provided herein for forming thin films comprising oxygen by atomic layer deposition. The thin films comprising oxygen can be deposited by providing higher concentration water pulses, a higher partial pressure of water in the reaction space, and/or a higher flow rate of water to a substrate in a reaction space. Thin films comprising oxygen can be used, for example, as dielectric oxides in transistors, capacitors, integrated circuits, and other semiconductor applications.
摘要翻译：本文提供了通过原子层沉积形成包含氧的薄膜的方法。包含氧的薄膜可以通过提供较高浓度的水脉冲，在反应空间中较高的水分压力和/或较高的反应空间中的基质流速来沉积。包含氧的薄膜可以用作例如晶体管，电容器，集成电路和其它半导体应用中的电介质氧化物。

4. 发明申请

US20100022099A1 METHOD OF FORMING NON-CONFORMAL LAYERS 有权
标题翻译：形成非一致层的方法
公开(公告)号：US20100022099A1
公开(公告)日：2010-01-28
申请号：US12573008
申请日：2009-10-02
申请人： Sebastian E. Van Nooten , Jan Willem Maes , Steven Marcus , Glen Wilk , Petri Räisänen , Kai-Erik Elers
发明人： Sebastian E. Van Nooten , Jan Willem Maes , Steven Marcus , Glen Wilk , Petri Räisänen , Kai-Erik Elers
IPC分类号： H01L21/302
CPC分类号： H01J37/32082 , C23C16/045 , C23C16/403 , C23C16/448 , C23C16/45519 , C23C16/45525 , C23C16/45542 , C23C16/45565 , C23C16/50 , C23C16/5096 , C23C16/52 , H01J37/3244 , H01J37/32935 , H01L21/02178 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/3162 , H01L29/66181
摘要： In one aspect, non-conformal layers are formed by variations of plasma enhanced atomic layer deposition, where one or more of pulse duration, separation, RF power on-time, reactant concentration, pressure and electrode spacing are varied from true self-saturating reactions to operate in a depletion-effect mode. Deposition thus takes place close to the substrate surface but is controlled to terminate after reaching a specified distance into openings (e.g., deep DRAM trenches, pores, etc.). Reactor configurations that are suited to such modulation include showerhead, in situ plasma reactors, particularly with adjustable electrode spacing. In another aspect, alternately and sequentially contacting a substrate, the substrate including openings, with at least two different reactants, wherein an under-saturated dose of at least one of the reactants has been predetermined and the under-saturated dose is provided uniformly across the substrate surface, deposits a film that less than fully covers surfaces of the openings, leading to depletion effects in less accessible regions on the substrate surface
摘要翻译：在一个方面，通过等离子体增强原子层沉积的变化形成非共形层，其中脉冲持续时间，分离，RF功率导通时间，反应物浓度，压力和电极间距中的一个或多个从真实的自饱和反应变化以耗尽效应模式运行。因此，沉积物靠近基底表面发生，但是在到达开口（例如，深的DRAM沟槽，孔隙等）中的特定距离之后被控制终止。适用于这种调制的反应器配置包括喷头，原位等离子体反应器，特别是具有可调节的电极间距。在另一方面，交替地和顺序地接触基底，包括开口的基底与至少两种不同的反应物接触，其中至少一种反应物的饱和剂量已被预先确定，并且不饱和剂量被均匀地提供在衬底表面沉积小于完全覆盖开口表面的膜，导致在衬底表面上较不易接近的区域中的耗尽效应

5. 发明授权

US07629267B2 High stress nitride film and method for formation thereof 有权
标题翻译：高应力氮化物膜及其形成方法
公开(公告)号：US07629267B2
公开(公告)日：2009-12-08
申请号：US11370228
申请日：2006-03-06
申请人： Yuet Mei Wan , René de Blank , Jan Willem Maes
发明人： Yuet Mei Wan , René de Blank , Jan Willem Maes
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02321 , C23C16/345 , C23C16/45523 , H01L21/02115 , H01L21/0217 , H01L21/02205 , H01L21/3115 , H01L21/3185 , H01L21/67017 , H01L21/67115 , H01L29/7833 , H01L29/7843
摘要： A silicon nitride film is formed on a substrate in a reaction chamber by introducing trisilane and a reactive nitrogen species into the chamber in separate pulses. A carbon precursor gas is also flowed into the chamber during introduction of the trisilane and/or during introduction of the reactive nitrogen species, or in pulses separate from the trisilane and reactive nitrogen species pulses. The carbon is used as a dopant in the silicon nitride film and advantageously allows a high stress silicon nitride film to be formed.
摘要翻译：通过将丙硅烷和反应性氮物质以分开的脉冲引入室中，在反应室中的基板上形成氮化硅膜。在引入丙硅烷期间和/或在引入反应性氮物质期间或在与丙硅烷和反应性氮物质脉冲分开的脉冲中，碳前体气体也流入室中。碳在氮化硅膜中用作掺杂剂，有利地形成高应力氮化硅膜。

6. 发明授权

US08399344B2 Method for adjusting the threshold voltage of a gate stack of a PMOS device 有权
标题翻译：用于调整PMOS器件的栅极堆叠的阈值电压的方法
公开(公告)号：US08399344B2
公开(公告)日：2013-03-19
申请号：US12898911
申请日：2010-10-06
申请人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
发明人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
IPC分类号： H01L21/28
CPC分类号： H01L29/513 , H01L21/28194 , H01L29/517
摘要： A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3.
摘要翻译：一种用于制造半导体器件的方法，包括栅极电介质和栅电极的栅极堆叠，所述方法包括在半导体衬底上形成具有第一电负性的金属氧化物或半金属氧化物的栅极介电层; 形成电介质VT调整层，电介质VT调整层是具有第二电负性的金属氧化物或半金属氧化物; 以及在所述栅极电介质层和所述VT调整层上形成栅电极; 其中所述栅极叠层的有效功函数通过调谐介电VT调整层的厚度和组成而被调谐到期望值，并且其中第二电负性值高于第一电负性值和Al 2 O 3的电负性。

7. 发明申请

US20120309181A1 PROCESS FOR DEPOSITING ELECTRODE WITH HIGH EFFECTIVE WORK FUNCTION 有权
标题翻译：具有高效工作功能沉积电极的工艺
公开(公告)号：US20120309181A1
公开(公告)日：2012-12-06
申请号：US13359385
申请日：2012-01-26
申请人： Vladimir Machkaoutsan , Jan Willem Maes , Qi Xie
发明人： Vladimir Machkaoutsan , Jan Willem Maes , Qi Xie
IPC分类号： H01L21/28
CPC分类号： H01L21/823842 , H01L21/28088 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： According to some embodiments, an electrode have a high effective work function is formed. The electrode may be the gate electrode of a transistor and may be formed on a high-k gate dielectric by depositing a first layer of conductive material, exposing that first layer to a hydrogen-containing gas, and depositing a second layer of conductive material over the first layer. The first layer may be deposited using a non-plasma process in which the substrate is not exposed to plasma or plasma-generated radicals. The hydrogen-containing gas to which the first layer is exposed may include an excited hydrogen species, which may be part of a hydrogen-containing plasma, and may be hydrogen-containing radicals. The first layer may also be exposed to oxygen before depositing the second layer. The work function of the gate electrode in the gate stack may be about 5 eV or higher in some embodiments.
摘要翻译：根据一些实施例，形成具有高有效功函数的电极。电极可以是晶体管的栅极，并且可以通过沉积第一层导电材料，将第一层暴露于含氢气体，并将第二层导电材料沉积在高k栅极电介质上形成第一层。可以使用其中衬底不暴露于等离子体或等离子体产生的自由基的非等离子体工艺来沉积第一层。第一层露出的含氢气体可以包括可以是含氢等离子体的一部分的被激发的氢物质，并且可以是含氢基团。在沉积第二层之前，第一层也可能暴露于氧气。在一些实施例中，栅极堆叠中的栅电极的功函数可以为约5eV或更高。

8. 发明申请

US20110081775A1 METHOD FOR ADJUSTING THE THRESHOLD VOLTAGE OF A GATE STACK OF A PMOS DEVICE 有权
标题翻译：调整PMOS器件门极电压的方法
公开(公告)号：US20110081775A1
公开(公告)日：2011-04-07
申请号：US12898911
申请日：2010-10-06
申请人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
发明人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
IPC分类号： H01L21/28
CPC分类号： H01L29/513 , H01L21/28194 , H01L29/517
摘要： A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3
摘要翻译：一种用于制造半导体器件的方法，包括栅极电介质和栅电极的栅极堆叠，所述方法包括在半导体衬底上形成具有第一电负性的金属氧化物或半金属氧化物的栅极介电层; 形成电介质VT调整层，电介质VT调整层是具有第二电负性的金属氧化物或半金属氧化物; 以及在所述栅极电介质层和所述VT调整层上形成栅电极; 其中通过调谐介电VT调整层的厚度和组成将所述栅极叠层的有效功函数调谐到期望值，并且其中第二电负性值高于Al2O3的第一电负性值和电负性

9. 发明授权

US07795160B2 ALD of metal silicate films 有权
标题翻译：金属硅酸盐膜的ALD
公开(公告)号：US07795160B2
公开(公告)日：2010-09-14
申请号：US11490875
申请日：2006-07-21
申请人： Chang-gong Wang , Eric J. Shero , Glen Wilk , Jan Willem Maes
发明人： Chang-gong Wang , Eric J. Shero , Glen Wilk , Jan Willem Maes
IPC分类号： H01L21/31
CPC分类号： H01L21/3141 , C23C16/401 , C23C16/405 , C23C16/45531 , C23C16/45542 , H01L21/28194 , H01L21/31612 , H01L21/31645
摘要： Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a metal source chemical, a silicon source chemical and an oxidizing agent. In preferred embodiments, an alkyl amide metal compound and a silicon halide compound are used. Methods according to preferred embodiments can be used to form hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surfaces comprising high aspect ratio features (e.g., vias and/or trenches).
摘要翻译：提供了形成金属硅酸盐膜的方法。所述方法包括使基板与金属源化学品，硅源化学品和氧化剂的交替和顺序的气相脉冲接触。在优选的实施方案中，使用烷基酰胺金属化合物和卤化硅化合物。根据优选实施方案的方法可以用于在包含高纵横比特征（例如，通孔和/或沟槽）的衬底表面上形成具有基本上均匀的薄膜覆盖率的硅酸铪硅酸盐膜和硅酸锆膜。

10. 发明申请

US20090079016A1 METHOD FOR FORMING A DIELECTRIC STACK 审中-公开
标题翻译：形成介质堆叠的方法
公开(公告)号：US20090079016A1
公开(公告)日：2009-03-26
申请号：US12272614
申请日：2008-11-17
申请人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
发明人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
IPC分类号： H01L29/78 , H01L23/58
CPC分类号： H01L21/02274 , C23C16/0218 , C23C16/308 , C23C16/345 , C23C16/405 , C23C16/45525 , C23C16/45529 , C23C16/45531 , C23C16/45536 , C23C16/56 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/022 , H01L21/02211 , H01L21/0228 , H01L21/02304 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/3141 , H01L21/3144 , H01L21/31604 , H01L21/31645 , H01L21/318 , H01L21/3185 , H01L29/513 , H01L29/517 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
摘要翻译：本发明提供了一种用于在集成电路中制造电介质叠层的方法，包括以下步骤：（i）在半导体衬底上形成高k电介质层，（ii）使具有高k电介质层的半导体衬底经受包含气相反应物的氮和包含气相反应物的硅在等离子体增强化学气相沉积工艺（PECVD）或等离子体增强原子层化学气相沉积（PE ALCVD）工艺中。此外，本发明提供了一种集成电路中的电介质堆叠，包括（i）至少包含高k材料的高k电介质层，（ii）至少包含硅和氮的电介质层; （iii）设置在高k电介质层和电介质层之间的中间层，中间层包含高k材料，硅和氮。

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