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1. 发明申请

US20090079016A1 METHOD FOR FORMING A DIELECTRIC STACK 审中-公开
标题翻译：形成介质堆叠的方法
公开(公告)号：US20090079016A1
公开(公告)日：2009-03-26
申请号：US12272614
申请日：2008-11-17
申请人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
发明人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
IPC分类号： H01L29/78 , H01L23/58
CPC分类号： H01L21/02274 , C23C16/0218 , C23C16/308 , C23C16/345 , C23C16/405 , C23C16/45525 , C23C16/45529 , C23C16/45531 , C23C16/45536 , C23C16/56 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02178 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/02189 , H01L21/022 , H01L21/02211 , H01L21/0228 , H01L21/02304 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/3141 , H01L21/3144 , H01L21/31604 , H01L21/31645 , H01L21/318 , H01L21/3185 , H01L29/513 , H01L29/517 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
摘要翻译：本发明提供了一种用于在集成电路中制造电介质叠层的方法，包括以下步骤：（i）在半导体衬底上形成高k电介质层，（ii）使具有高k电介质层的半导体衬底经受包含气相反应物的氮和包含气相反应物的硅在等离子体增强化学气相沉积工艺（PECVD）或等离子体增强原子层化学气相沉积（PE ALCVD）工艺中。此外，本发明提供了一种集成电路中的电介质堆叠，包括（i）至少包含高k材料的高k电介质层，（ii）至少包含硅和氮的电介质层; （iii）设置在高k电介质层和电介质层之间的中间层，中间层包含高k材料，硅和氮。

2. 发明授权

US07465626B2 Method for forming a high-k dielectric stack 有权
标题翻译：用于形成高k电介质叠层的方法
公开(公告)号：US07465626B2
公开(公告)日：2008-12-16
申请号：US11138746
申请日：2005-05-25
申请人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
发明人： Peijun Jerry Chen , Tsai Wilman , Mathieu Caymax , Jan Willem Maes
IPC分类号： H01L21/31 , H01L21/8242
CPC分类号： H01L21/28194 , C23C16/0218 , C23C16/308 , C23C16/345 , C23C16/405 , C23C16/45525 , C23C16/45529 , C23C16/45531 , C23C16/45536 , C23C16/56 , H01L21/28185 , H01L21/28202 , H01L21/3141 , H01L21/3144 , H01L21/31604 , H01L21/31645 , H01L21/318 , H01L21/3185 , H01L29/513 , H01L29/517 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
摘要翻译：本发明提供了一种用于在集成电路中制造电介质叠层的方法，包括以下步骤：（i）在半导体衬底上形成高k电介质层，（ii）使具有高k电介质层的半导体衬底经受包含气相反应物的氮和包含气相反应物的硅在等离子体增强化学气相沉积工艺（PECVD）或等离子体增强原子层化学气相沉积（PE ALCVD）工艺中。此外，本发明提供了一种集成电路中的电介质堆叠，包括（i）至少包含高k材料的高k电介质层，（ii）至少包含硅和氮的电介质层; （iii）设置在高k电介质层和电介质层之间的中间层，中间层包含高k材料，硅和氮。

3. 发明申请

US20050269651A1 Method for forming a dielectric stack 有权
标题翻译：形成电介质叠层的方法
公开(公告)号：US20050269651A1
公开(公告)日：2005-12-08
申请号：US11138746
申请日：2005-05-25
申请人： Peijun Chen , Tsai Wilman , Mathieu Caymax , Jan Maes
发明人： Peijun Chen , Tsai Wilman , Mathieu Caymax , Jan Maes
IPC分类号： C23C16/02 , C23C16/30 , C23C16/34 , C23C16/40 , C23C16/44 , C23C16/455 , C23C16/56 , H01L21/28 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/471 , H01L29/51 , H01L29/772
CPC分类号： H01L21/28194 , C23C16/0218 , C23C16/308 , C23C16/345 , C23C16/405 , C23C16/45525 , C23C16/45529 , C23C16/45531 , C23C16/45536 , C23C16/56 , H01L21/28185 , H01L21/28202 , H01L21/3141 , H01L21/3144 , H01L21/31604 , H01L21/31645 , H01L21/318 , H01L21/3185 , H01L29/513 , H01L29/517 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
摘要翻译：本发明提供了一种用于在集成电路中制造电介质叠层的方法，包括以下步骤：（i）在半导体衬底上形成高k电介质层，（ii）使具有高k电介质层的半导体衬底经受包含气相反应物的氮和包含气相反应物的硅在等离子体增强化学气相沉积工艺（PECVD）或等离子体增强原子层化学气相沉积（PE ALCVD）工艺中。此外，本发明提供了一种集成电路中的电介质堆叠，包括（i）至少包含高k材料的高k电介质层，（ii）至少包含硅和氮的电介质层; （iii）设置在高k电介质层和电介质层之间的中间层，中间层包含高k材料，硅和氮。

4. 发明申请

US20060040477A1 Method and apparatus for forming expitaxial layers 有权
标题翻译：用于形成外延层的方法和装置
公开(公告)号：US20060040477A1
公开(公告)日：2006-02-23
申请号：US10530063
申请日：2003-08-13
申请人： Philippe Meunier-Beillard , Mathieu Caymax
发明人： Philippe Meunier-Beillard , Mathieu Caymax
IPC分类号： H01L21/20
CPC分类号： H01L21/0445 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/02529 , H01L21/02532 , H01L21/0262
摘要： The present invention provides a method of depositing epitaxial layers based on Group IV elements on a silicon substrate by Chemical Vapor Deposition, wherein nitrogen or one of the noble gases is used as a carrier gas, and the invention further provides a Chemical Vapor Deposition apparatus (10) comprising a chamber (12) having a gas input port (14) and a gas output port (16), and means (18) for mounting a silicon substrate within the chamber (12), said apparatus further including a gas source connected to the input port and arranged to provide nitrogen or a noble gas as a carrier gas.
摘要翻译：本发明提供了一种通过化学气相沉积在硅衬底上沉积基于IV族元素的外延层的方法，其中使用氮或一种惰性气体作为载气，本发明还提供化学气相沉积装置 10），包括具有气体输入端口（14）和气体输出端口（16）的腔室（12），以及用于将硅衬底安装在腔室（12）内的装置（18），所述设备还包括连接并且布置成提供氮气或惰性气体作为载气。

5. 发明申请

US20060205185A1 Method of epitaxial deoposition of an n-doped silicon layer 有权
标题翻译： n掺杂硅层的外延去绝缘的方法
公开(公告)号：US20060205185A1
公开(公告)日：2006-09-14
申请号：US10550853
申请日：2004-03-25
申请人： Philippe Meunier-Beillard , Mathieu Caymax
发明人： Philippe Meunier-Beillard , Mathieu Caymax
IPC分类号： H01L21/20 , C23C16/00 , H01L21/36
CPC分类号： C30B29/06 , C30B25/02 , H01L21/02381 , H01L21/02532 , H01L21/02576 , H01L21/0262
摘要： The invention relates to a method of manufacturing a semiconductor device (10) with a semiconductor body (1) comprising silicon is provided with an n-type doped semiconductor region (2) comprising silicon by means of an epitaxial deposition process, wherein the epitaxial deposition process of the n-type region is performed by positioning the semiconductor body (1) in an epitaxial reactor and introducing in the reactor a first gas stream comprising a carrier gas and further gas streams comprising a gaseous compound comprising silicon and a gaseous compound comprising an element from the fifth column of the periodic system of elements, while heating the semiconductor body (1) to a growth temperature (Tg) and using an inert gas as the carrier gas. According to the invention for the gaseous compound comprising silicon a mixture is chosen of a first gaseous silicon compound which is free of chlorine and a second gaseous silicon compound comprising chlorine. Such a method allows for a very high carrier concentration in the in-situ doped grown region (3). Nitrogen is the preferred carrier gas.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，该半导体器件（10）具有包括硅的半导体本体（1），其通过外延沉积工艺设置有包含硅的n型掺杂半导体区域（2），其中外延沉积通过将半导体主体（1）定位在外延反应器中并在反应器中引入包含载气的第一气流以及包含含有硅的气态化合物和气态化合物的气流，进行n型区的工艺，该气态化合物包含元件，同时将半导体本体（1）加热至生长温度（Tg）并使用惰性气体作为载气。根据本发明，对于包含硅的气态化合物，混合物选自不含氯的第一气态硅化合物和包含氯的第二气态硅化合物。这种方法允许在原位掺杂的生长区域（3）中具有非常高的载流子浓度。氮气是优选的载气。

6. 发明授权

US06906400B2 SiGe strain relaxed buffer for high mobility devices and a method of fabricating it 有权
标题翻译：用于高迁移率器件的SiGe应变弛豫缓冲器及其制造方法
公开(公告)号：US06906400B2
公开(公告)日：2005-06-14
申请号：US10756840
申请日：2004-01-13
申请人： Romain Delhougne , Roger Loo , Philippe Meunier-Beillard , Mathieu Caymax
发明人： Romain Delhougne , Roger Loo , Philippe Meunier-Beillard , Mathieu Caymax
IPC分类号： H01L21/20 , H01L29/10 , H01L31/117 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/107 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02505 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02667 , H01L29/1054
摘要： A semiconductor device is provided comprising a semiconductor substrate having on its top a Thin Strain Relaxed Buffer. The Thin Strain Relaxed Buffer consists of a stack of three layers of essentially constant Ge concentration. The three layers include a first epitaxial layer of Si1-xGex, a second epitaxial layer of Si1-xGex:C, and a third epitaxial layer of Si1-xGex on the second epitaxial layer. A method to fabricate such a buffer is also provided.
摘要翻译：提供了半导体器件，其包括在其顶部上具有薄应变弛缓缓冲器的半导体衬底。薄应变松弛缓冲液由三层基本上恒定的Ge浓度组成。这三层包括第一外延层Si 1-x N x Si x Si，第一外延层Si 1-x Ge x Si， C，以及第二外延层上的Si 1-x Ge x S x的第三外延层。还提供了制造这种缓冲器的方法。

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