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1. 发明授权

US08633050B2 Solar cell, and method of manufacturing the same 有权
标题翻译：太阳能电池及其制造方法
公开(公告)号：US08633050B2
公开(公告)日：2014-01-21
申请号：US13112342
申请日：2011-05-20
申请人： Dieter Pierreux
发明人： Dieter Pierreux
IPC分类号： H01L21/00
CPC分类号： H01L31/068 , H01L21/02178 , H01L21/0228 , H01L31/02167 , H01L31/1868 , H01L31/1876 , Y02E10/547 , Y02P70/521
摘要： A method of manufacturing a solar cell having an effective minority charge carrier lifetime (τeff) of at least 500 μs, said method comprising: providing a semiconductor wafer; and passivating a surface of said wafer by ALD-depositing a metal oxide layer on said surface by sequentially and alternatingly: (iii) exposing said surface to a first precursor, resulting in a coverage of the surface with the first precursor, and (iv) exposing said surface to a second precursor, resulting in a coverage of the surface with the second precursor, wherein at least one of steps (i) and (ii) is stopped before the coverage of the surface reaches a saturation level.
摘要翻译：一种制造具有至少500微米的有效少数电荷载流子寿命（taueff）的太阳能电池的方法，所述方法包括：提供半导体晶片; 并且通过依次和交替地在所述表面上沉积金属氧化物层来钝化所述晶片的表面：（iii）将所述表面暴露于第一前体，导致表面与第一前体的覆盖，和（iv）将所述表面暴露于第二前体，导致表面与第二前体的覆盖，其中步骤（i）和（ii）中的至少一个在表面的覆盖达到饱和水平之前停止。

2. 发明申请

US20110284079A1 SOLAR CELL, AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：太阳能电池及其制造方法
公开(公告)号：US20110284079A1
公开(公告)日：2011-11-24
申请号：US13112342
申请日：2011-05-20
申请人： Dieter Pierreux
发明人： Dieter Pierreux
IPC分类号： H01L31/0264 , H01L21/31 , H01L31/18
CPC分类号： H01L31/068 , H01L21/02178 , H01L21/0228 , H01L31/02167 , H01L31/1868 , H01L31/1876 , Y02E10/547 , Y02P70/521
摘要： A method of manufacturing a solar cell having an effective minority charge carrier lifetime (τeff) of at least 500 μs, said method comprising: providing a semiconductor wafer; and passivating a surface of said wafer by ALD-depositing a metal oxide layer on said surface by sequentially and alternatingly: (iii) exposing said surface to a first precursor, resulting in a coverage of the surface with the first precursor, and (iv) exposing said surface to a second precursor, resulting in a coverage of the surface with the second precursor, wherein at least one of steps (i) and (ii) is stopped before the coverage of the surface reaches a saturation level.
摘要翻译：一种制造具有至少500μs的有效少数电荷载流子寿命（τeff）的太阳能电池的方法，所述方法包括：提供半导体晶片; 并且通过依次和交替地在所述表面上沉积金属氧化物层来钝化所述晶片的表面：（iii）将所述表面暴露于第一前体，导致表面与第一前体的覆盖，和（iv）将所述表面暴露于第二前体，导致表面与第二前体的覆盖，其中步骤（i）和（ii）中的至少一个在表面的覆盖达到饱和水平之前停止。

3. 发明授权

US10513772B2 Process for passivating dielectric films 有权
公开(公告)号：US10513772B2
公开(公告)日：2019-12-24
申请号：US13502925
申请日：2010-10-14
申请人： Tom E. Blomberg , Eva E. Tois , Robert Huggare , Jan Willem Maes , Vladimir Machkaoutsan , Dieter Pierreux
发明人： Tom E. Blomberg , Eva E. Tois , Robert Huggare , Jan Willem Maes , Vladimir Machkaoutsan , Dieter Pierreux
IPC分类号： C23C16/44 , C23C16/34 , C23C16/36 , C23C16/40 , C23C16/455
摘要： Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.

4. 发明申请

US20120269962A1 PROCESS FOR PASSIVATING DIELECTRIC FILMS 审中-公开
标题翻译：用于钝化电介质膜的方法
公开(公告)号：US20120269962A1
公开(公告)日：2012-10-25
申请号：US13502925
申请日：2010-10-14
申请人： Tom E. Blomberg , Eva E. Tois , Robert Huggare , Jan Willem Maes , Vladimir Machkaoutsan , Dieter Pierreux
发明人： Tom E. Blomberg , Eva E. Tois , Robert Huggare , Jan Willem Maes , Vladimir Machkaoutsan , Dieter Pierreux
IPC分类号： C23C16/44 , C23C16/40 , C23C16/34 , C23C16/56
CPC分类号： C23C16/34 , C23C16/36 , C23C16/409 , C23C16/45527 , C23C16/45531
摘要： Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
摘要翻译：本文公开了用于在对氯，溴和碘敏感的电介质材料上沉积包含氟的钝化层的方法。钝化层可以保护敏感的介电层，从而能够在钝化层上使用包含氯，溴和碘的前体进行沉积。

5. 发明申请

US20090035946A1 IN SITU DEPOSITION OF DIFFERENT METAL-CONTAINING FILMS USING CYCLOPENTADIENYL METAL PRECURSORS 审中-公开
标题翻译：使用环戊二烯金属前驱体的不同含金属膜的原位沉积
公开(公告)号：US20090035946A1
公开(公告)日：2009-02-05
申请号：US12173374
申请日：2008-07-15
申请人： Dieter Pierreux , Bert Jongbloed , Peter Zagwijn
发明人： Dieter Pierreux , Bert Jongbloed , Peter Zagwijn
IPC分类号： H01L21/31 , C23C16/06
CPC分类号： H01L21/31645 , C23C16/45529 , C23C16/45546 , C23C16/45553 , H01L21/02178 , H01L21/02181 , H01L21/02189 , H01L21/022 , H01L21/0228 , H01L21/3142 , H01L21/31616 , H01L21/31641
摘要： A method is disclosed depositing multiple layers of different materials in a sequential process within a deposition chamber. A substrate is provided in a deposition chamber. A plurality of cycles of a first atomic layer deposition (ALD) process is sequentially conducted to deposit a layer of a first material on the substrate in the deposition chamber. These first cycles include pulsing a cyclopentadienyl metal precursor. A plurality of cycles of a second ALD process is sequentially conducted to deposit a layer of a second material on the layer of the first material in the deposition chamber. The second material comprises a metal different from the metal in the cyclopentadienyl metal precursor.
摘要翻译：公开了一种在沉积室内以顺序工艺沉积多层不同材料的方法。在沉积室中设置衬底。依次进行第一原子层沉积（ALD）工艺的多个循环以在沉积室中的衬底上沉积第一材料层。这些第一循环包括脉冲环戊二烯基金属前体。依次进行第二ALD工艺的多个循环以在沉积室中的第一材料层上沉积第二材料层。第二种材料包括与环戊二烯基金属前体中的金属不同的金属。

6. 发明申请

US20130276707A1 VERTICAL FURNACE WITH CIRCUMFERENTIALLY DISTRIBUTED GAS INLET SYSTEM 审中-公开
标题翻译：具有圆形分布式气体入口系统的垂直炉
公开(公告)号：US20130276707A1
公开(公告)日：2013-10-24
申请号：US13453402
申请日：2012-04-23
申请人： Dieter Pierreux
发明人： Dieter Pierreux
IPC分类号： C23C16/458
CPC分类号： C23C16/45546 , C23C16/45548 , C23C16/4558
摘要： A vertical furnace comprises a substantially cylindrical process tube vertically extending and delimiting a reaction space; a boat for accommodating a plurality of substrates to be vertically spaced apart from each other; a gas inlet system comprising a plurality of distribution tubes disposed at a circumference of the reaction space, wherein each of the distribution tubes have a plurality of gas injection holes distributed over a length of the distribution tubes and the distribution tubes are symmetrically disposed along an entire circumference of the reaction space; and at least one reaction gas source connected to the gas inlet system.
摘要翻译：垂直炉包括垂直延伸并限定反应空间的大致圆柱形的处理管; 用于容纳多个基板以彼此垂直间隔开的船; 气体入口系统，包括设置在反应空间的圆周处的多个分配管，其中每个分配管具有分布在分配管的一段长度上的多个气体注入孔，并且分配管沿整个对称地设置反应空间周长; 以及连接到气体入口系统的至少一个反应气体源。

7. 发明授权

US08399344B2 Method for adjusting the threshold voltage of a gate stack of a PMOS device 有权
标题翻译：用于调整PMOS器件的栅极堆叠的阈值电压的方法
公开(公告)号：US08399344B2
公开(公告)日：2013-03-19
申请号：US12898911
申请日：2010-10-06
申请人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
发明人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
IPC分类号： H01L21/28
CPC分类号： H01L29/513 , H01L21/28194 , H01L29/517
摘要： A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3.
摘要翻译：一种用于制造半导体器件的方法，包括栅极电介质和栅电极的栅极堆叠，所述方法包括在半导体衬底上形成具有第一电负性的金属氧化物或半金属氧化物的栅极介电层; 形成电介质VT调整层，电介质VT调整层是具有第二电负性的金属氧化物或半金属氧化物; 以及在所述栅极电介质层和所述VT调整层上形成栅电极; 其中所述栅极叠层的有效功函数通过调谐介电VT调整层的厚度和组成而被调谐到期望值，并且其中第二电负性值高于第一电负性值和Al 2 O 3的电负性。

8. 发明申请

US20120255612A1 ALD OF METAL OXIDE FILM USING PRECURSOR PAIRS WITH DIFFERENT OXIDANTS 审中-公开
标题翻译：使用具有不同氧化物的前置对象的金属氧化物膜
公开(公告)号：US20120255612A1
公开(公告)日：2012-10-11
申请号：US13082658
申请日：2011-04-08
申请人： Dieter Pierreux
发明人： Dieter Pierreux
IPC分类号： H01L31/0264 , H01L21/31 , H01L31/036 , H01L31/0368
CPC分类号： H01L21/02178 , H01L21/0228 , H01L21/28194 , H01L29/517 , H01L31/02167 , H01L31/068 , H01L31/1868 , Y02E10/547 , Y02P70/521
摘要： Discloses is a method for depositing a thin metal oxide film on a substrate, comprising: providing a substrate (104); sequentially and alternatingly exposing a surface of said substrate to a first metal precursor and a first oxidant precursor, so as to deposit a first portion (116) of said metal oxide film (114) having a first thickness; and sequentially and alternatingly exposing the surface of the substrate to a second metal precursor and a second oxidant precursor, so as to deposit a second portion (118) of said metal oxide film (114) having a second thickness over said first portion of said metal oxide film, wherein the second oxidant precursor is ozone or oxygen plasma, while the first oxidant precursor is a milder oxidant than ozone. Also disclosed is a solar cell (100) including a metal oxide passivation film (114) deposited by said method.
摘要翻译：公开了一种在衬底上沉积薄金属氧化物膜的方法，包括：提供衬底（104）; 顺序地和交替地将所述衬底的表面暴露于第一金属前体和第一氧化剂前体，以沉积具有第一厚度的所述金属氧化物膜（114）的第一部分（116）; 并且将所述衬底的表面顺序并且交替地暴露于第二金属前体和第二氧化剂前体，以便在所述金属的所述第一部分上沉积具有第二厚度的所述金属氧化物膜（114）的第二部分（118）氧化物膜，其中第二氧化剂前体是臭氧或氧等离子体，而第一氧化剂前体是比臭氧更温和的氧化剂。还公开了包括通过所述方法沉积的金属氧化物钝化膜（114）的太阳能电池（100）。

9. 发明申请

US20110081775A1 METHOD FOR ADJUSTING THE THRESHOLD VOLTAGE OF A GATE STACK OF A PMOS DEVICE 有权
标题翻译：调整PMOS器件门极电压的方法
公开(公告)号：US20110081775A1
公开(公告)日：2011-04-07
申请号：US12898911
申请日：2010-10-06
申请人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
发明人： Dieter Pierreux , Vladimir Machkaoutsan , Jan Willem Maes
IPC分类号： H01L21/28
CPC分类号： H01L29/513 , H01L21/28194 , H01L29/517
摘要： A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3
摘要翻译：一种用于制造半导体器件的方法，包括栅极电介质和栅电极的栅极堆叠，所述方法包括在半导体衬底上形成具有第一电负性的金属氧化物或半金属氧化物的栅极介电层; 形成电介质VT调整层，电介质VT调整层是具有第二电负性的金属氧化物或半金属氧化物; 以及在所述栅极电介质层和所述VT调整层上形成栅电极; 其中通过调谐介电VT调整层的厚度和组成将所述栅极叠层的有效功函数调谐到期望值，并且其中第二电负性值高于Al2O3的第一电负性值和电负性

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