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    • 1. 发明申请
    • Thin film transistor array panel and manufacturing method thereof
    • 薄膜晶体管阵列面板及其制造方法
    • US20060131582A1
    • 2006-06-22
    • US11271129
    • 2005-11-10
    • Jae-Hong JeonJang-Soo Kim
    • Jae-Hong JeonJang-Soo Kim
    • H01L29/04
    • H01L27/124G02F1/136213G02F1/136227H01L27/1288
    • A thin film transistor (TFT) array panel is presented. The TFT array panel includes: a gate line formed on an insulating substrate and a gate electrode; a storage electrode line on the insulating substrate; a gate insulating layer on the gate line and the storage electrode line; a first semiconductor on the gate insulating layer; a data line and a drain electrode formed on the first semiconductor, separate from each other, and over the gate electrode; a passivation layer formed on the first semiconductor layer and having a contact hole exposing the drain electrode and an opening exposing the gate insulating layer on the storage electrode; and a pixel electrode connected to the drain electrode through the contact hole and overlapping the storage electrode through the opening.
    • 介绍了薄膜晶体管(TFT)阵列面板。 TFT阵列面板包括:形成在绝缘基板和栅电极上的栅极线; 绝缘基板上的存储电极线; 栅极线上的栅极绝缘层和存储电极线; 栅极绝缘层上的第一半导体; 形成在所述第一半导体上的数据线和漏电极,彼此分离并在所述栅极上方; 钝化层,其形成在所述第一半导体层上并且具有暴露所述漏电极的接触孔和暴露所述存储电极上的所述栅极绝缘层的开口; 以及通过所述接触孔与所述漏电极连接并且通过所述开口与所述存储电极重叠的像素电极。
    • 4. 发明授权
    • Thin film transistor substrate and method for manufacturing the same
    • 薄膜晶体管基板及其制造方法
    • US08598581B2
    • 2013-12-03
    • US12434907
    • 2009-05-04
    • Jang-Soo KimJae-Hyoung YounSang-Soo KimDong-Gyu Kim
    • Jang-Soo KimJae-Hyoung YounSang-Soo KimDong-Gyu Kim
    • H01L33/00
    • H01L29/78633H01L27/124H01L27/1248
    • A method for manufacturing a thin film transistor array panel includes; forming a gate line including a gate electrode and a height increasing member on a substrate, forming a gate insulating layer on the gate line and the height increasing member, forming a semiconductor, a data line including a source electrode, and a drain electrode facing the source electrode and overlapping at least a portion of the height increasing member on the gate insulating layer, forming a first insulating layer on the gate insulating layer, a data line and the drain electrode, forming a light-blocking member on a portion of the first insulating layer corresponding to the gate line and the data line, forming a color filter in an area bound by the light-blocking member, forming a second insulating layer on the light-blocking member and the color filter, and patterning the second insulating layer, the light-blocking member or the color filter, and the first insulating layer to form a contact hole exposing a portion of the drain electrode aligned with the height increasing member.
    • 薄膜晶体管阵列板的制造方法包括: 在基板上形成包括栅电极和高度增加部件的栅极线,在栅极线和高度增加部件上形成栅绝缘层,形成半导体,包括源电极和漏电极的数据线, 并且在所述栅极绝缘层上与所述高度增加部件的至少一部分重叠,在所述栅极绝缘层上形成第一绝缘层,在所述栅极绝缘层上形成第一绝缘层,在所述栅极绝缘层上形成阻挡部件,在所述第一 对应于栅极线和数据线的绝缘层,在由阻光构件限定的区域中形成滤色器,在遮光构件和滤色器上形成第二绝缘层,并对第二绝缘层进行构图, 遮光构件或滤色器,以及第一绝缘层,以形成暴露与高度增加构件对准的漏电极的一部分的接触孔。