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1. 发明授权

US08587740B2 Display substrate, method of manufacturing the same, and display device having the same 有权
标题翻译：显示基板，其制造方法以及具有该显示基板的显示装置
公开(公告)号：US08587740B2
公开(公告)日：2013-11-19
申请号：US12217493
申请日：2008-07-02
申请人： Jin-Seuk Kim , Young-Wook Lee , Yui-Ku Lee
发明人： Jin-Seuk Kim , Young-Wook Lee , Yui-Ku Lee
IPC分类号： G02F1/136 , H01L29/04
CPC分类号： G02F1/133514 , G02F1/13394 , G02F2001/133519 , G02F2001/136222
摘要： A display substrate includes a switching member, a color filter layer, an inorganic insulation layer and a pixel electrode. The switching member includes a gate line, a data line crossing the gate line, and a thin-film transistor (TFT) electrically connected to the gate line and the data line. The color filter layer is formed on the switching member. The inorganic insulation layer is formed on the color filter layer. The inorganic insulation layer has a hole formed thereon, which exposes a portion of the color filter layer in correspondence with the TFT. The pixel electrode is formed on the inorganic insulation layer.
摘要翻译：显示基板包括切换构件，滤色器层，无机绝缘层和像素电极。开关构件包括栅极线，与栅极线交叉的数据线，以及电连接到栅极线和数据线的薄膜晶体管（TFT）。滤色器层形成在开关元件上。无机绝缘层形成在滤色器层上。无机绝缘层具有形成在其上的孔，其与TFT对应地暴露出滤色器层的一部分。像素电极形成在无机绝缘层上。

2. 发明授权

US08537296B2 Display device wherein a thickness of a first insulating layer is greater than a thickness of a first conductor and wherein the first insulating layer completely covers lateral side surfaces of the first conductor 有权
标题翻译：显示装置，其中第一绝缘层的厚度大于第一导体的厚度，并且其中第一绝缘层完全覆盖第一导体的横向侧表面
公开(公告)号：US08537296B2
公开(公告)日：2013-09-17
申请号：US12268725
申请日：2008-11-11
申请人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
发明人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
IPC分类号： G02F1/136 , G02F1/1333
CPC分类号： H01L27/12 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , H01L27/124 , H01L27/1248 , H01L27/1288
摘要： The present invention relates to a display device and a manufacturing method thereof. The display device includes a substrate, a first conductor disposed on the substrate, a first insulating layer disposed on the first conductor, a second insulating layer disposed on the first insulating layer, a semiconductor disposed on the second insulating layer, and a second conductor disposed on the semiconductor. A thickness of the first insulating layer is greater than a thickness of the first conductor, and the first insulating layer includes a first opening exposing the first conductor.
摘要翻译：显示装置及其制造方法技术领域本发明涉及显示装置及其制造方法。显示装置包括基板，设置在基板上的第一导体，设置在第一导体上的第一绝缘层，设置在第一绝缘层上的第二绝缘层，设置在第二绝缘层上的半导体和设置在第二绝缘层上的第二导体在半导体上。第一绝缘层的厚度大于第一导体的厚度，第一绝缘层包括暴露第一导体的第一开口。

3. 发明授权

US08476627B2 Thin-film transistor, method of fabricating the thin-film transistor, and display substrate using the thin-film transistor 有权
标题翻译：薄膜晶体管，制造薄膜晶体管的方法以及使用该薄膜晶体管的显示基板
公开(公告)号：US08476627B2
公开(公告)日：2013-07-02
申请号：US13046130
申请日：2011-03-11
申请人： Pil-Sang Yun , Young-Wook Lee , Woo-Geun Lee
发明人： Pil-Sang Yun , Young-Wook Lee , Woo-Geun Lee
IPC分类号： H01L29/786
CPC分类号： H01L21/467 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L29/41733 , H01L29/7869
摘要： Provided is an oxide thin-film transistor (TFT) substrate that may enhance the display quality of a display device and a method of fabricating the same via a simple process. The oxide TFT substrate includes: a substrate, a gate line, a data line, an oxide TFT, and a pixel electrode. An oxide layer of the oxide TFT includes a first region that has semiconductor characteristics and a channel, and a second region that is conductive and surrounds the first region. A portion of the first region is electrically connected to the pixel electrode, and the second region is electrically connected to the data line.
摘要翻译：提供了可以通过简单的处理来提高显示装置的显示质量的氧化物薄膜晶体管（TFT）基板及其制造方法。氧化物TFT基板包括：基板，栅极线，数据线，氧化物TFT和像素电极。氧化物TFT的氧化物层包括具有半导体特性的第一区域和沟道，以及导电并围绕第一区域的第二区域。第一区域的一部分电连接到像素电极，并且第二区域电连接到数据线。

4. 发明授权

US08450736B2 Thin film transistor array substrate and manufacturing method thereof 有权
公开(公告)号：US08450736B2
公开(公告)日：2013-05-28
申请号：US13006591
申请日：2011-01-14
申请人： Young-Wook Lee , Woo-Geun Lee , Ki-Won Kim , Hyun-Jung Lee , Ji-Soo Oh
发明人： Young-Wook Lee , Woo-Geun Lee , Ki-Won Kim , Hyun-Jung Lee , Ji-Soo Oh
IPC分类号： H01L29/786
CPC分类号： H01L27/124 , H01L21/76834 , H01L27/1225 , H01L27/1255 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L29/7869 , H01L29/78693
摘要： A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

5. 发明授权

US08097881B2 Thin film transistor substrate and a fabricating method thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US08097881B2
公开(公告)日：2012-01-17
申请号：US12502653
申请日：2009-07-14
申请人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Jong-In Kim
发明人： Young-Wook Lee , Hong-Suk Yoo , Jean-Ho Song , Jae-Hyoung Youn , Jong-In Kim
IPC分类号： H01L29/76 , H01L29/04 , H01L31/036 , H01L27/01 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/1225
摘要： An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.
摘要翻译：氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极，邻近栅电极设置的氧化物半导体图案，与栅极线电绝缘的数据线，数据线和限定线显示区域，暴露数据线的表面的第一开口，暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘，漏电极从第一开口延伸到第二开口并电连接漏电极焊盘和氧化物半导体图案。

6. 发明授权

US08058114B2 Method of manufacturing the array substrate capable of decreasing a line resistance 有权
标题翻译：能够降低线电阻的阵列基板的制造方法
公开(公告)号：US08058114B2
公开(公告)日：2011-11-15
申请号：US12797527
申请日：2010-06-09
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L21/84 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

7. 发明授权

US07902551B2 Liquid crystal display device and method of manufacturing the same 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：US07902551B2
公开(公告)日：2011-03-08
申请号：US12332044
申请日：2008-12-10
申请人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
发明人： Jong-In Kim , Jang-Soo Kim , Young-Wook Lee
IPC分类号： H01L33/00
CPC分类号： H01L27/1225 , H01L27/1214 , H01L27/1255 , H01L29/7869
摘要： The present invention relates to a liquid crystal display and a method of manufacturing the same. A liquid crystal display according to an exemplary embodiment of the present invention includes: a first substrate, a first conductor arranged on the first substrate, a first insulating layer arranged on the first substrate and the first conductor, a second insulating layer arranged on the first insulating layer, a semiconductor layer arranged on the second insulating layer, and a second conductor arranged on the semiconductor layer and the second insulating layer. The semiconductor layer is made of an oxide semiconductor, and the second conductor includes a source electrode, a drain electrode, and a storage electrode line.
摘要翻译：液晶显示器及其制造方法技术领域本发明涉及一种液晶显示器及其制造方法。根据本发明的示例性实施例的液晶显示器包括：第一基板，布置在第一基板上的第一导体，布置在第一基板和第一导体上的第一绝缘层，布置在第一基板上的第二绝缘层绝缘层，布置在第二绝缘层上的半导体层和布置在半导体层和第二绝缘层上的第二导体。半导体层由氧化物半导体构成，第二导体包括源电极，漏电极和存储电极线。

8. 发明授权

US07880833B2 Thin film transistor array panel for a display 有权
标题翻译：用于显示器的薄膜晶体管阵列面板
公开(公告)号：US07880833B2
公开(公告)日：2011-02-01
申请号：US11930653
申请日：2007-10-31
申请人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
发明人： Kyoung-Ju Shin , Hye-Young Ryu , Jang-Soo Kim , Chong-Chul Chal , Jae-Hyoung Youn , Young-Wook Lee
IPC分类号： G02F1/1335 , G02F1/1343
CPC分类号： G02F1/133514 , G02F1/134309 , G02F2001/134345 , G02F2001/136222
摘要： A thin film transistor array panel includes a substrate, a first gate line and a second gate line formed on the substrate, a storage electrode line between the first gate line and the second gate line, a data line intersecting the first gate line and the second gate line, a first thin film transistor connected to the first gate line and the data line, at least one color filter formed on the first thin film transistor, wherein the color filter comprises a first portion adjacent the first gate line with respect to the storage electrode line, a second portion adjacent the second gate line with respect to the storage electrode line, and a first connection connecting the first portion and the second portion and having a narrower width than that of the first and second portions, a first sub-pixel electrode formed on the color filter and connected to the first thin film transistor, and a second sub-pixel electrode facing the first sub-pixel electrode with respect to a gap, wherein at least one of an edge of the first sub-pixel electrode and an edge of the second sub-pixel electrode crosses over the first connection of the color filter, the edge of the first sub-pixel electrode, and the edge of the second sub-pixel electrode defining the gap between the first sub-pixel electrode and the second sub-pixel electrode.
摘要翻译：薄膜晶体管阵列面板包括基板，形成在基板上的第一栅极线和第二栅极线，在第一栅极线和第二栅极线之间的存储电极线，与第一栅极线和第二栅极线相交的数据线栅极线，连接到第一栅极线和数据线的第一薄膜晶体管，形成在第一薄膜晶体管上的至少一个滤色器，其中滤色器包括相对于存储器的第一栅极线的第一部分电极线，相对于存储电极线相邻于第二栅极线的第二部分，以及连接第一部分和第二部分并且具有比第一和第二部分窄的宽度的第一连接，第一子像素电极，形成在滤色器上并连接到第一薄膜晶体管，第二子像素电极相对于间隙面对第一子像素电极，其中至少在第一子像素电极的边缘和第二子像素电极的边缘的第二子像素电极的边缘与滤色器的第一连接，第一子像素电极的边缘和第二子像素电极的边缘交叉限定第一子像素电极和第二子像素电极之间的间隙的电极。

9. 发明申请

US20100261322A1 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20100261322A1
公开(公告)日：2010-10-14
申请号：US12797527
申请日：2010-06-09
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L21/8234 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

10. 发明申请

US20100258852A1 NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100258852A1
公开(公告)日：2010-10-14
申请号：US12754395
申请日：2010-04-05
申请人： Se-Yun Lim , Eun-Seok Choi , Young-Wook Lee , Won-Joon Choi , Ki-Hong Lee , Sang-Bum Lee
发明人： Se-Yun Lim , Eun-Seok Choi , Young-Wook Lee , Won-Joon Choi , Ki-Hong Lee , Sang-Bum Lee
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L27/11582
摘要： A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.
摘要翻译：一种用于制造非易失性存储器件的方法包括在衬底上交替堆叠多个层间电介质层和多个导电层，蚀刻层间电介质层和导电层以形成暴露衬底形成表面的沟槽在其中形成沟槽的结果结构上的第一材料层，在第一材料层上形成第二材料层，去除第二材料层的部分和形成在沟槽的底部上的第一材料层，以暴露出衬底，去除第二材料层，以及在去除第二材料层的沟槽内掩埋沟道层。

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