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    • 4. 发明申请
    • OLEFIN POLYMERIZATION REACTION UNIT AND POLYOLEFIN PRODUCTION PROCESS
    • OLEFIN聚合反应单元和聚烯烃生产工艺
    • US20090148354A1
    • 2009-06-11
    • US12332065
    • 2008-12-10
    • Hiroyuki OGAWAHideki Sato
    • Hiroyuki OGAWAHideki Sato
    • B01J19/00
    • C08F10/00C08F2/34C08F2/001
    • An olefin polymerization reaction unit includes a multistage gas phase polymerization reactor which is divided into two or more polymerization stages, in which polyolefin particles move from an initial stage to a final stage, and in which an olefin monomer-containing gas is fed from the final stage toward the initial stage. The reaction unit also includes first circulating means for feeding to the final stage a gas that is discharged from the initial stage and then cooled with a first heat exchanger, and second circulating means for feeding to one of the polymerization stages a condensate formed by condensing, with a second heat exchanger different from the first heat exchanger, a gas removed from one of the polymerization stages.
    • 烯烃聚合反应单元包括多级气相聚合反应器,其分为两个或多个聚合阶段,其中聚烯烃颗粒从初始阶段移动到最终阶段,并且其中含有烯烃单体的气体从最终的 阶段到初始阶段。 反应单元还包括第一循环装置,用于将从初始阶段排放然后用第一热交换器冷却的气体进料到最终级,以及第二循环装置,用于将通过冷凝形成的冷凝物进料到一个聚合阶段, 与不同于第一热交换器的第二热交换器从一个聚合阶段除去气体。
    • 8. 发明申请
    • SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体存储器件及其制造方法
    • US20110101434A1
    • 2011-05-05
    • US12914086
    • 2010-10-28
    • Hiroyuki OGAWAAkihisa YAMAGUCHI
    • Hiroyuki OGAWAAkihisa YAMAGUCHI
    • H01L27/108H01L21/28
    • H01L21/28H01L27/0207H01L27/10832H01L27/10882H01L27/10891H01L27/10894
    • A semiconductor storage device includes: memory cells including a transistor and a capacitor; bit lines; word lines; and sense amplifiers including first and second sense amplifiers, wherein the memory cells includes: a first memory cell group sharing a first auxiliary word line; and a second memory cell group sharing a second auxiliary word line, wherein the word lines includes a first word line coupled to the first auxiliary word line and a second word line coupled to the second auxiliary word line, the first word line is coupled to the first auxiliary word line in a first word line contact region, the second word line is coupled to the second auxiliary word line in a second word line contact region, the bit lines includes first and second bit lines coupled to the first sense amplifier on both sides of the first word line contact region.
    • 半导体存储装置包括:包括晶体管和电容器的存储单元; 位线 字线 以及包括第一和第二读出放大器的读出放大器,其中存储单元包括:共享第一辅助字线的第一存储单元组; 以及共享第二辅助字线的第二存储单元组,其中所述字线包括耦合到所述第一辅助字线的第一字线和耦合到所述第二辅助字线的第二字线,所述第一字线耦合到 第一字线接触区域中的第一辅助字线,第二字线在第二字线接触区域中耦合到第二辅助字线,位线包括耦合到两侧的第一读出放大器的第一和第二位线 的第一个字线接触区域。
    • 9. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20090184351A1
    • 2009-07-23
    • US12354575
    • 2009-01-15
    • Hiroyuki OGAWAJun LINHideyuki KOJIMA
    • Hiroyuki OGAWAJun LINHideyuki KOJIMA
    • H01L27/108H01L21/8242
    • H01L21/763H01L21/823481H01L27/0629H01L27/10805H01L27/1085
    • A semiconductor device includes a semiconductor substrate, an active region formed in the semiconductor substrate and extending in a first direction, the active region including a transistor sub-region and a capacitor sub-region, a first trench extending around the transistor sub-region, an isolation layer disposed in the first trench, a second trench extending around the capacitor sub-region, a first transistor including a first insulating layer disposed on the transistor sub-region, the first transistor including a first conductive layer disposed on the first insulating layer, and a first capacitor including a second insulating layer extending over the capacitor sub-region and a sidewall of the second trench, the first capacitor including a second conductive layer disposed on the second insulating layer, the active region having an end portion in the first direction opposite to the transistor sub-region and extending across the first capacitor.
    • 半导体器件包括半导体衬底,形成在半导体衬底中并沿第一方向延伸的有源区,包括晶体管子区和电容器子区的有源区,围绕晶体管子区延伸的第一沟槽, 设置在所述第一沟槽中的隔离层,围绕所述电容器子区域延伸的第二沟槽,包括设置在所述晶体管子区域上的第一绝缘层的第一晶体管,所述第一晶体管包括设置在所述第一绝缘层上的第一导电层 以及包括在所述电容器子区域上延伸的第二绝缘层和所述第二沟槽的侧壁的第一电容器,所述第一电容器包括设置在所述第二绝缘层上的第二导电层,所述有源区域具有在所述第一绝缘层 方向与晶体管子区域相反并延伸穿过第一电容器。