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1. 发明授权

US5760450A Semiconductor resistor using back-to-back zener diodes 失效
标题翻译：半导体电阻采用背对背齐纳二极管
公开(公告)号：US5760450A
公开(公告)日：1998-06-02
申请号：US828238
申请日：1997-03-31
申请人： Godefridus A. M. Hurkx , Jan W. Slotboom , Andreas H. Montree
发明人： Godefridus A. M. Hurkx , Jan W. Slotboom , Andreas H. Montree
IPC分类号： H01L27/04 , H01L21/822 , H01L23/64 , H01L27/08 , H01L29/8605 , H01L29/866 , H01L29/78
CPC分类号： H01L29/866 , H01L27/0814 , H01L29/8605
摘要： Very high resistance values may be necessary in integrated circuits, for example in the gigaohm range, for example for realizing RC times of 1 ms to 1 s. Such resistance values cannot or substantially not be realized by known methods in standard i.c. processes because of the too large space occupation. In addition, known embodiments are usually strongly dependent on the temperature. According to the invention, therefore, two zener diodes (10, 4; 11, 4) connected back-to-back are used as the resistor. The current through each zener diode is mainly determined by band--band tunneling when the voltage is not too high, for example up to approximately 0.2 V. This current has a value such that resistors in the giga range can be readily realized on a small surface area. Since the current is mainly determined by intrinsic material properties of silicon, the temperature dependence is very small. The resistor may furthermore be manufactured in any standard CMOS process or bipolar process.
摘要翻译：在集成电路中可能需要非常高的电阻值，例如在高戈范围内，例如用于实现1ms至1s的RC时间。这种电阻值不能或基本上不能通过标准电流中的已知方法来实现。因为占用空间太大。此外，已知的实施方案通常强烈地依赖于温度。因此，根据本发明，使用背对背连接的两个齐纳二极管（10,4; 11,4）作为电阻器。通过每个齐纳二极管的电流主要由电压不太高（例如高达约0.2V）时的带带隧穿确定。该电流具有这样的值，使得可以在小的表面上容易地实现千兆范围内的电阻区。由于电流主要取决于硅的固有材料性质，因此温度依赖性非常小。此外，电阻器可以以任何标准CMOS工艺或双极工艺制造。

2. 发明授权

US07839209B2 Tunnel field effect transistor 有权
标题翻译：隧道场效应晶体管
公开(公告)号：US07839209B2
公开(公告)日：2010-11-23
申请号：US12444140
申请日：2007-10-03
申请人： Gilberto Curatola , Prabhat Agarwal , Jan W. Slotboom , Godefridus A. M. Hurkx , Radu Surdeanu , Gerben Doornbos
发明人： Gilberto Curatola , Prabhat Agarwal , Jan W. Slotboom , Godefridus A. M. Hurkx , Radu Surdeanu , Gerben Doornbos
IPC分类号： H01L25/00
CPC分类号： H01L29/161 , H01L29/165 , H01L29/7391
摘要： A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer (20) which is made of a different material to the lower layer (2) and cap layer (22).
摘要翻译：隧道晶体管包括与漏扩散（6）相反的导电类型的源极扩散（4），使得在较低掺杂区域（8）中的源极和漏极扩散之间形成耗尽层。绝缘栅极（16）控制耗尽层的位置和厚度。该装置包括形成在由下层（2）和盖层（22）的不同材料制成的聚集层（20）中的量子阱。

3. 发明授权

US06436785B1 Method of manufacturing semiconductor device with a tunnel diode 有权
公开(公告)号：US06436785B1
公开(公告)日：2002-08-20
申请号：US09832724
申请日：2001-04-11
申请人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Jan W. Slotboom
发明人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Jan W. Slotboom
IPC分类号： H01L2120
摘要： A semiconductor device with a tunnel diode comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types having high enough doping concentrations to provide a tunneling junction. Portions (2A, 3A) of the semiconductor regions adjoining the junction comprise a mixed crystal of silicon and germanium. The doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions. The tunneling efficiency is substantially improved, and also because of the reduced bandgap of said portions (2A, 3A). A much steeper current-voltage characteristic both in the forward and in the reverse direction is achieved. Thus, the tunneling pn junction can be used as a transition between two conventional diodes which are stacked one on the other and formed in a single epitaxial growing process. The doping concentration may be 6×1019 or even more than 1020 at/cm3. A simple method of manufacturing such a device is preferably done at a temperature between 550° C. and 800° C.

4. 发明授权

US08362821B2 Charge carrier stream generating electronic device and method 有权
标题翻译：电荷载流子流生成电子器件及方法
公开(公告)号：US08362821B2
公开(公告)日：2013-01-29
申请号：US12743400
申请日：2008-11-12
申请人： Tony Vanhoucke , Godefridus A. M. Hurkx , Jan W. Slotboom
发明人： Tony Vanhoucke , Godefridus A. M. Hurkx , Jan W. Slotboom
IPC分类号： H03K17/00 , H03K17/60
CPC分类号： G11C13/0004
摘要： An electronic device comprising a generator for generating a stream of charge carriers. The generator comprises a bipolar transistor having an emitter region, a collector region and a base region oriented between the emitter region and the collector region, and a controller for controlling exposure of the bipolar transistor to a voltage in excess of its open base breakdown voltage (BVCEO) such that the emitter region generates the stream of charge carriers from a first area being smaller than the emitter region surface area. The electronic device may further comprise a material arranged to receive the stream of charge carriers for triggering a change in a property of said material, the emitter region being arranged between the base region and the material.
摘要翻译：一种电子设备，包括用于产生电荷载流子的发生器。发生器包括双极晶体管，其具有发射极区域，集电极区域和定向在发射极区域和集电极区域之间的基极区域;以及控制器，用于控制双极晶体管的暴露于超过其开路基极击穿电压的电压（ BVCEO），使得发射极区域从小于发射极区域表面积的第一区域产生电荷载流子。电子设备还可以包括布置成接收电荷载流子的材料，用于触发所述材料的性质的变化，发射极区域布置在基底区域和材料之间。

5. 发明授权

US07660180B2 Dielectric antifuse for electro-thermally programmable device 有权
标题翻译：用于电热可编程器件的介质反熔丝
公开(公告)号：US07660180B2
公开(公告)日：2010-02-09
申请号：US11720320
申请日：2005-11-24
申请人： Hans M. B. Boeve , Karen Attenborough , Godefridus A. M. Hurkx , Prabhat Agarwal , Hendrik G. A. Huizing , Michael A. A. In'T Zandt , Jan W. Slotboom
发明人： Hans M. B. Boeve , Karen Attenborough , Godefridus A. M. Hurkx , Prabhat Agarwal , Hendrik G. A. Huizing , Michael A. A. In'T Zandt , Jan W. Slotboom
IPC分类号： G11C17/18
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144
摘要： A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antifuse has a dielectric layer (100) surrounded by conductive layers (90, 110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly-resistive state is very small. As a result the programming power can be low.
摘要翻译：热可编程存储器具有可编程电阻的可编程电阻（20），优选地是相变材料的材料和位于可编程材料附近的吹制反熔丝（80）。这种吹制的反熔丝具有由导电层（90,110）包围的电介质层（100），以使得能够在制造期间在电介质两端施加短暂的高电压来吹动电介质中的小孔，以形成小导电路径，用作编程材料的微小电加热器。由于目前由孔的限制，为了切换到高电阻状态必须被加热的材料的体积非常小。因此，编程功率可能很低。

6. 发明授权

US06242762B1 Semiconductor device with a tunnel diode and method of manufacturing same 失效
公开(公告)号：US06242762B1
公开(公告)日：2001-06-05
申请号：US09078231
申请日：1998-05-13
申请人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Jan W. Slotboom
发明人： Adam R. Brown , Godefridus A. M. Hurkx , Wiebe B. De Boer , Jan W. Slotboom
IPC分类号： H01L29861
CPC分类号： H01L29/885 , Y10S438/979
摘要： A semiconductor device with a tunnel diode (23) is particularly suitable for various applications. Such a device comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types and having doping concentrations which are so high that breakdown between them leads to conduction by means of tunnelling. A disadvantage of the known device is that the current-voltage characteristic is not yet steep enough for some applications. In a device according to the invention, the portions (2A, 3A) of the semiconductor regions (2, 3) adjoining the junction (23) comprise a mixed crystal of silicon and germanium. It is surprisingly found that the doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions (2, 3). The tunnelling efficiency is substantially improved as a result of this, and also because of the reduced bandgap of said portions (2A, 3A), and the device according to the invention has a much steeper current-voltage characteristic both in the forward and in the reverse direction. This opens perspectives for inter alia an attractive application where the tunnelling pn junction (23) is used as a transition between two conventional diodes, for example pn or pin diodes, which are used one stacked on the other and which can be formed in a single epitaxial growing process thanks to the invention. The portions (2A, 3A) adjoining the tunnelling junction (22) are preferably 5 to 30 nm thick and comprise between 10 and 50 at % germanium. The doping concentration may be 6×1019 or even more than 1020 at/cm3. The invention further relates to a simple method of manufacturing a device according to the invention. This is preferably done at a temperature of between 550° C. and 800° C.

7. 发明授权

US07786506B2 Semiconductor devices with a field shaping region 有权
标题翻译：具有场成形区域的半导体器件
公开(公告)号：US07786506B2
公开(公告)日：2010-08-31
申请号：US12177258
申请日：2008-07-22
申请人： Anco Heringa , Raymond J. E. Hueting , Jan W. Slotboom
发明人： Anco Heringa , Raymond J. E. Hueting , Jan W. Slotboom
IPC分类号： H01L29/74
CPC分类号： H01L29/7802 , H01L29/0649 , H01L29/0653 , H01L29/402 , H01L29/408 , H01L29/73 , H01L29/732 , H01L29/7811 , H01L29/7813 , H01L29/7824 , H01L29/861
摘要： A semiconductor device includes a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device. The field shaping region is coupled via capacitive voltage coupling regions to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction and the device is non-conducting, a capacitive electric field is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region. The electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region in the semiconductor region.
摘要翻译：半导体器件包括具有pn结的半导体区域和位于pn结附近的场整形区域，以增加器件的反向击穿电压。场整形区域经由电容性电压耦合区域耦合到与施加到pn结的基本相同的电压。当在pn结上施加反向电压并且器件不导通时，在场成形区域的一部分中存在电容电场，其延伸超过不存在pn结区域的pn结耗尽区的极限场整形区域。场成形区域中的电场引起限制在半导体区域中相应延伸的pn结耗尽区的拉伸电场。

8. 发明授权

US4907049A Charge-coupled semiconductor device having an improved electrode structure 失效
标题翻译：具有改进的电极结构的电荷耦合半导体器件
公开(公告)号：US4907049A
公开(公告)日：1990-03-06
申请号：US385928
申请日：1989-07-27
申请人： Jan W. Slotboom , Henricus G. R. Maas , Kazimierz Osinki , Geert J. T. Davids
发明人： Jan W. Slotboom , Henricus G. R. Maas , Kazimierz Osinki , Geert J. T. Davids
IPC分类号： H01L29/762 , H01L21/339 , H01L27/10 , H01L29/423 , H01L29/76 , H01L29/772
CPC分类号： H01L29/66954 , H01L29/42396
摘要： A charge-coupled semiconductor device has a plurality of silicon electrodes for storing and transporting information-carrying charge, which electrodes are located on an insulating layer and are mutually separated by grooves having a width of at most 1 .mu.m. According to the invention, transfer electrodes are arranged in the grooves, these electrodes being coplanar with the remaining electrodes. The thickness of the insulating layer under the transfer electrodes is substantially equal to that under the storage electrodes. The invention also relates to a method of manufacturing a semiconductor device having such an electrode system.
摘要翻译：电荷耦合半导体器件具有用于存储和传送信息传送电荷的多个硅电极，这些电极位于绝缘层上并且由宽度至多为1μm的沟槽相互分离。根据本发明，转移电极布置在凹槽中，这些电极与剩余的电极共面。传输电极下面的绝缘层的厚度基本上等于存储电极下方的厚度。本发明还涉及制造具有这种电极系统的半导体器件的方法。

9. 发明授权

US4504930A Charge-coupled device 失效
标题翻译：电荷耦合器件
公开(公告)号：US4504930A
公开(公告)日：1985-03-12
申请号：US414109
申请日：1982-09-02
申请人： Hendrik A. Harwig , Jan W. Slotboom , Marcellinus J. M. Pelgrom
发明人： Hendrik A. Harwig , Jan W. Slotboom , Marcellinus J. M. Pelgrom
IPC分类号： G11C27/04 , G11C19/28 , H01L21/339 , H01L27/105 , H01L29/762 , G11C13/00
CPC分类号： H01L27/1057 , G11C19/287
摘要： The invention relates to a charge-coupled SPS memory comprising a series input register, a parallel section and a series output register. In order to increase the retention time leakage current drain regions are provided beside the memory. Since the charge collected as a result of leakage current is largest during the transport through the outermost registers of the parallel section, only the sides of the parallel section are screened by the said draining regions which preferably consist of dummy registers. FIG. 1.
摘要翻译：本发明涉及一种电荷耦合SPS存储器，其包括串联输入寄存器，并联部分和串联输出寄存器。为了增加保持时间，泄漏电流漏极区域设置在存储器的旁边。由于在通过并行部分的最外面寄存器的传输期间由于泄漏电流而收集的电荷最大，所以平行部分的侧面仅由虚拟寄存器组成的排水区域进行屏蔽。图。 1。

10. 发明申请

US20100038676A1 Semiconductor Devices with a Field Shaping Region 有权
标题翻译：具有场成形区域的半导体器件
公开(公告)号：US20100038676A1
公开(公告)日：2010-02-18
申请号：US12177258
申请日：2008-07-22
申请人： Anco Heringa , Raymond J.E. Hueting , Jan W. Slotboom
发明人： Anco Heringa , Raymond J.E. Hueting , Jan W. Slotboom
IPC分类号： H01L29/74
CPC分类号： H01L29/7802 , H01L29/0649 , H01L29/0653 , H01L29/402 , H01L29/408 , H01L29/73 , H01L29/732 , H01L29/7811 , H01L29/7813 , H01L29/7824 , H01L29/861
摘要： A semiconductor device includes a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device. The field shaping region is coupled via capacitive voltage coupling regions to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction and the device is non-conducting, a capacitive electric field is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region. The electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region in the semiconductor region.
摘要翻译：半导体器件包括具有pn结的半导体区域和位于pn结附近的场整形区域，以增加器件的反向击穿电压。场整形区域经由电容性电压耦合区域耦合到与施加到pn结的基本相同的电压。当在pn结上施加反向电压并且器件不导通时，在场成形区域的一部分中存在电容电场，其延伸超过不存在pn结区域的pn结耗尽区的极限场整形区域。场成形区域中的电场引起限制在半导体区域中相应延伸的pn结耗尽区的拉伸电场。

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