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    • 1. 发明申请
    • Power efficient read circuit for a serial output memory device and method
    • 用于串行输出存储器件和方法的高效读取电路
    • US20060039217A1
    • 2006-02-23
    • US10921754
    • 2004-08-17
    • Neal BergerGeorge ChangPearl ChengAnne Koh
    • Neal BergerGeorge ChangPearl ChengAnne Koh
    • G11C7/00
    • G11C7/08G11C7/1027G11C7/103
    • An integrated circuit memory device has a plurality of memory cells arranged in a plurality of arrays. Each array has a plurality of rows, and a plurality of column lines, and a plurality of row lines connecting to the memory cells in each array. The memory cell in an array is addressable by a column line and a row line. A column address decoder receives a column address signal and selects one or more column lines of each array in response. A row address decoder receives a row address signal and selects a row line of each array in response. The memory device also has a plurality (k) of sense amplifiers, with one sense amplifier associated with each array, connectable to one or more column lines of the array and receives a signal therefrom supplied from an addressed memory cell. The memory device further has a register; and a control circuit. The control circuit receives a read command, and a clock signal, and in response to the read command activates a first plurality (j) of the plurality (k) of sense amplifiers (j
    • 集成电路存储器件具有以多个阵列排列的多个存储单元。 每个阵列具有多个行,多个列线以及连接到每个阵列中的存储器单元的多条行线。 阵列中的存储单元可由列线和行行寻址。 列地址解码器接收列地址信号并且响应地选择每个阵列的一个或多个列线。 行地址解码器接收行地址信号并且响应地选择每个阵列的行线。 存储器件还具有多个(k)个读出放大器,其中一个读出放大器与每个阵列相关联,可连接到阵列的一个或多个列线,并接收从寻址的存储器单元提供的信号。 存储器件还具有寄存器; 和控制电路。 控制电路接收读取命令,并且时钟信号,并且响应于读取命令,激活多个(k)个读出放大器(k)中的第一个(j)一段足以感测信号的时间段 在与多个(j)个读出放大器中的每一个相关联的连接列线上。 控制电路将信号锁存到寄存器中; 并且去激活所述第一多个(j)读出放大器; 并响应于时钟信号串行输出来自寄存器的信号。
    • 7. 发明授权
    • Terminal connection mechanism used for a backlit display
    • 终端连接机构用于背光显示
    • US06227896B1
    • 2001-05-08
    • US09568417
    • 2000-05-10
    • George Chang
    • George Chang
    • H01R13625
    • H01R13/6272
    • A terminal connection mechanism used in an electroluminescent display structure primarily comprises a display panel housed in a decorative case and a terminal portion provided on the lower end of the display panel to receive a connector affixed by electrical conductive wires. The connector is provided on one side wall face thereof with a resilient locating plate that enables the connector to be detachably secured in position in the case. Thus the terminal connection mechanism according to the invention can provide an electroluminescent display the convenience in connection and separation between a display panel and its electrical conductive wires. It has practical value in industry.
    • 用于电致发光显示结构的端子连接机构主要包括容纳在装饰盒中的显示面板和设置在显示面板下端的端子部分,以接收由导电线固定的连接器。 连接器在其一个侧壁面上设置有弹性定位板,其使得连接器能够可拆卸地固定在壳体中的适当位置。 因此,根据本发明的端子连接机构可以为电致发光显示器提供显示面板与其导电线之间的连接和分离的便利性。 具有行业实用价值。
    • 10. 发明授权
    • Method and apparatus for programming memory devices
    • 用于编程存储器件的方法和装置
    • US5530803A
    • 1996-06-25
    • US227755
    • 1994-04-14
    • George ChangPearl Cheng
    • George ChangPearl Cheng
    • G11C17/00G11C7/00G11C16/02G11C16/10G06F11/00
    • G11C16/10
    • A method for programming an integrated memory circuit and an integrated memory circuit structure for storing information are disclosed. The method of programming includes the steps of providing a program mode for programming the memory cells in accordance with total number of memory cells that is required to be programmed; and programming the memory cells in accordance with the program mode. The integrated memory circuit includes a program mode determining circuit, and a programming circuit operatively coupled to the program mode determining circuit for programming each of a plurality of block of memory cells according to its respective program mode. The program mode determining circuit comprises a circuit for determining the total number of memory cells that is required to be programmed in each block and a control circuit operatively coupled to the memory cells determining circuit for providing a first program mode control signal, a plurality of second program mode control signals and a third program mode control signal, if the total number of memory cells that are required to be programmed in a block is greater than zero but is less than or equal to a threshold number N, greater than the threshold number N, and equal to zero, respectively. Through the use of the programming method and the integrated memory circuit design, the requirement of additional number or increased current capacities of drain pumps associated with programming the integrated circuit is eliminated which reduces design complexity and minimizes the size of the integrated circuit.
    • 公开了一种用于编程集成存储器电路的方法和用于存储信息的集成存储器电路结构。 编程方法包括以下步骤:根据需要编程的存储器单元的总数来提供用于对存储器单元进行编程的编程模式; 并根据程序模式编程存储单元。 集成存储器电路包括程序模式确定电路和可操作地耦合到程序模式确定电路的编程电路,用于根据其相应的程序模式对多个存储器单元块中的每一个进行编程。 程序模式确定电路包括用于确定需要在每个程序段中编程的存储器单元的总数的电路和可操作地耦合到存储单元确定电路的控制电路,用于提供第一编程模式控制信号,多个第二 程序模式控制信号和第三程序模式控制信号,如果要在块中编程的存储器单元的总数大于零但小于或等于阈值数N,则大于阈值数N ,并分别等于零。 通过使用编程方法和集成存储器电路设计,消除了与编程集成电路相关联的排水泵的附加数量或增加的电流容量的要求,这降低了设计复杂性并使集成电路的尺寸最小化。