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1. 发明申请

US20110133314A1 METHOD FOR PRODUCING A SEMICONDUCTOR WAFER 审中-公开
标题翻译：生产半导体波形的方法
公开(公告)号：US20110133314A1
公开(公告)日：2011-06-09
申请号：US12939324
申请日：2010-11-04
申请人： Georg Pietsch , Walter Haeckl , Juergen Schwandner , Noemi Banos
发明人： Georg Pietsch , Walter Haeckl , Juergen Schwandner , Noemi Banos
IPC分类号： H01L29/30 , H01L21/20
CPC分类号： H01L21/02024 , C30B15/04 , C30B29/06 , C30B33/00
摘要： A method for producing a semiconductor wafer includes pulling a single crystal of semiconductor material, slicing a semiconductor wafer from the single crystal and polishing the semiconductor wafer with the polishing pad and polishing agent. The polishing agent is free of solid materials having abrasive action and the polishing pad contains fixedly bonded solid materials with abrasive action. During polishing the polishing agent is supplied in a gap between the semiconductor wafer and polishing pad. The polishing agent has a pH value in a range of 9.5 to 12.5.
摘要翻译：一种制造半导体晶片的方法，包括拉制半导体材料的单晶，从单晶切割半导体晶片，并用抛光垫和抛光剂研磨半导体晶片。抛光剂不含具有研磨作用的固体材料，抛光垫包含具有研磨作用的固定粘结固体材料。在抛光期间，在半导体晶片和抛光垫之间的间隙中提供抛光剂。抛光剂的pH值在9.5至12.5的范围内。

2. 发明授权

US08685270B2 Method for producing a semiconductor wafer 有权
标题翻译：半导体晶片的制造方法
公开(公告)号：US08685270B2
公开(公告)日：2014-04-01
申请号：US12902558
申请日：2010-10-12
申请人： Juergen Schwandner , Thomas Buschhardt , Diego Feijoo , Michael Kerstan , Georg Pietsch , Guenter Schwab
发明人： Juergen Schwandner , Thomas Buschhardt , Diego Feijoo , Michael Kerstan , Georg Pietsch , Guenter Schwab
IPC分类号： C03C15/00 , C03C25/68 , B44C1/22 , H01L21/302 , H01L21/461
CPC分类号： B24B37/042 , B24B37/08 , H01L21/02013 , H01L21/02019 , H01L21/02021 , H01L21/02024
摘要： A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 μm. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 μm, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 μm.
摘要翻译：用于制造从单晶切片的半导体晶片的方法包括使用包含平均粒径为20.0-60.0μm的研磨剂的研磨盘对边缘进行四舍五入。进行第一同时双面材料去除工艺，其中半导体晶片在两个旋转环形工作盘之间加工，每个工作盘具有包含平均粒度为5.0-20.0μm的研磨剂的工作层，其中半导体晶片被放置在由滚动装置旋转的多个载体之一的切口中，使得半导体晶片以可自由移动的方式位于载体中，并且晶片可以在摆线轨迹上移动。进行第二同时双面材料去除处理，包括在两个旋转环形工作盘之间处理半导体晶片，每个工作盘具有包含平均晶粒尺寸为0.5-15.0μm的研磨剂的工作层。

3. 发明申请

US20090029552A1 Method For Polishing A Substrate Composed Of Semiconductor Material 有权
标题翻译：抛光由半导体材料组成的基板的方法
公开(公告)号：US20090029552A1
公开(公告)日：2009-01-29
申请号：US12166486
申请日：2008-07-02
申请人： Juergen Schwandner , Thomas Buschhardt , Roland Koppert , Georg Pietsch
发明人： Juergen Schwandner , Thomas Buschhardt , Roland Koppert , Georg Pietsch
IPC分类号： H01L21/465
CPC分类号： C09G1/02 , B24B7/228 , B24B37/044 , H01L21/02024
摘要： Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
摘要翻译：通过包括至少一个研磨步骤A的方法对半导体材料基板进行抛光，利用该抛光步骤A，在包含在研磨垫中结合的研磨材料的抛光垫上抛光基板，并且将抛光剂溶液引入到基板和抛光垫在抛光步骤中; 以及至少一个抛光步骤B，通过该抛光步骤B将衬底抛光在包含含研磨材料的抛光垫的抛光垫上，并且其中在抛光步骤中将含有未结合磨料的抛光剂浆料引入衬底和抛光垫之间。

4. 发明申请

US20080265375A1 Methods for the single-sided polishing of semiconductor wafers and semiconductor wafer having a relaxed Si1-x GEx Layer 审中-公开
标题翻译：具有弛豫Si1-xGGx层的半导体晶片和半导体晶片的单面抛光方法
公开(公告)号：US20080265375A1
公开(公告)日：2008-10-30
申请号：US12148739
申请日：2008-04-22
申请人： Georg Pietsch , Thomas Buschhardt , Juergen Schwandner
发明人： Georg Pietsch , Thomas Buschhardt , Juergen Schwandner
IPC分类号： H01L21/306 , H01L29/30
CPC分类号： H01L21/30625 , C09G1/02
摘要： Single-sided polishing of semiconductor wafers provided with a relaxed Si1-xGex layer involves polishing of a multiplicity of wafers in a plurality of polishing runs, a polishing run having at least one polishing step, at least one of the multiplicity of wafers obtained with a polished Si1-xGex layer at the end of each polishing run; moving the wafer during the polishing step over a rotating polishing plate provided with a polishing cloth while applying polishing pressure, and supplying polishing agent between the polishing cloth and the semiconductor wafer, the polishing agent containing an alkaline component and a component that dissolves germanium. Semiconductor wafer having a Si1-xGex layer substantially free of defects and haze is produced.
摘要翻译：设置有松弛的Si 1-x N x层的半导体晶片的单面抛光涉及在多个抛光运行中抛光多个晶片，抛光运行具有至少一个研磨步骤，在每个抛光运行结束时用抛光的Si 1-x Ge x N层获得的多个晶片中的至少一个; 在抛光步骤期间将晶片在设置有抛光布的旋转抛光板上移动，同时施加抛光压力，并在抛光布和半导体晶片之间提供抛光剂，抛光剂含有碱性成分和溶解锗的成分。产生具有基本上没有缺陷和雾度的Si 1-x N z O x S层的半导体晶片。

5. 发明授权

US08647985B2 Method for polishing a substrate composed of semiconductor material 有权
标题翻译：抛光由半导体材料构成的基板的方法
公开(公告)号：US08647985B2
公开(公告)日：2014-02-11
申请号：US12166486
申请日：2008-07-02
申请人： Juergen Schwandner , Thomas Buschhardt , Roland Koppert , Georg Pietsch
发明人： Juergen Schwandner , Thomas Buschhardt , Roland Koppert , Georg Pietsch
IPC分类号： H01L21/302 , H01L21/461 , C03C15/00 , C03C25/68
CPC分类号： C09G1/02 , B24B7/228 , B24B37/044 , H01L21/02024
摘要： Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
摘要翻译：通过包括至少一个研磨步骤A的方法对半导体材料基板进行抛光，利用该抛光步骤A，在包含在研磨垫中结合的研磨材料的抛光垫上抛光基板，并且在基板和抛光垫之间引入抛光剂溶液在抛光步骤中; 以及至少一个抛光步骤B，通过该抛光步骤B将衬底抛光在包含含研磨材料的抛光垫的抛光垫上，并且其中在抛光步骤中将含有未结合磨料的抛光剂浆料引入衬底和抛光垫之间。

6. 发明授权

US08801500B2 Method for the simultaneous material-removing processing of both sides of at least three semiconductor wafers 有权
标题翻译：用于至少三个半导体晶片的两侧的同时进行材料去除处理的方法
公开(公告)号：US08801500B2
公开(公告)日：2014-08-12
申请号：US13313114
申请日：2011-12-07
申请人： Georg Pietsch
发明人： Georg Pietsch
IPC分类号： B24B1/00 , B24B7/17 , B24B7/22
CPC分类号： B24B7/17 , B24B7/228 , B24B37/08 , B24B37/28 , H01L21/02013 , H01L21/02024
摘要： A method for the simultaneous material-removing processing of both sides of at least three semiconductor wafers includes providing a double-side processing apparatus including two rotating ring-shaped working disks and a rolling apparatus. The carriers are arranged in the double-side processing apparatus and the openings are disposed in the carriers so as to satisfy the inequality: R/e·sin(π/N*)−r/e−1≦1.2 where N* denotes a ratio of the round angle and an angle at which adjacent carriers are inserted into the rolling apparatus with the greatest distance with respect to one another, r denotes a radius of each opening for receiving a respective semiconductor wafer, e denotes a radius of a pitch circle around a midpoint of the carrier on which the opening is arranged, and R denotes a radius of the pitch circle on which the carriers move between the working disks by means of the rolling apparatus.
摘要翻译：至少三个半导体晶片的两侧的同时进行材料去除处理的方法包括提供包括两个旋转环形工作盘和滚动装置的双面处理设备。载体布置在双面处理装置中，并且开口设置在载体中以满足不等式：R / e·sin（＆pgr; / N *）-r / e-1＆nlE; 1.2其中N *表示相邻载体相对于彼此以最大距离插入到滚动装置中的角度和角度的比率，r表示用于接收各个半导体晶片的每个开口的半径，e表示间距的半径围绕其上布置有开口的载体的中点周围，并且R表示载体在工作盘之间借助于滚动装置移动的节圆的半径。

7. 发明申请

US20130072093A1 METHOD FOR THE SIMULTANEOUS DOUBLE-SIDE MATERIAL-REMOVING PROCESSING OF AT LEAST THREE WORKPIECES 有权
标题翻译：用于三重工作的同时双面材料去除方法
公开(公告)号：US20130072093A1
公开(公告)日：2013-03-21
申请号：US13602436
申请日：2012-09-04
申请人： Georg Pietsch
发明人： Georg Pietsch
IPC分类号： B24B47/10 , B24B7/00
CPC分类号： B24B37/28 , B24B47/12
摘要： A method for simultaneous double-side material-removing processing of at least three workpieces includes disposing the workpieces in a working gap between rotating upper and lower working disks of a double-side processing apparatus. The workpieces lie in freely movable fashion in respective openings in a guide cage and are moved under pressure in the working gap using the guide cage. Upon attaining a preselected target thickness of the workpieces, a deceleration process is initiated that includes reducing an angular velocity ωi(t) of a respective drive i of each of the upper working disk, lower working disk and guide cage to a standstill. The reducing is carried out such that ratios of the angular velocities ωi(t) with respect to one another as a function of time t deviate by no more than 10% from initial ratios of the angular velocities ωi(t) corresponding to when the preselected target thickness was attained.
摘要翻译：一种用于至少三个工件的同时双面材料去除处理的方法包括将工件设置在双面处理设备的旋转上和下工作盘之间的工作间隙中。工件在引导笼中的相应开口中以可自由移动的方式设置，并且在工作间隙中使用引导笼在压力下移动。在获得工件的预选目标厚度时，开始减速处理，其包括将上工作盘，下工作盘和引导架中的每个驱动器i的角速度ωi（t）减小到停止。执行这样的还原，使得角速度ωi（t）相对于时间t的函数的比率与对应于预选的角速度ωi（t）的初始比率偏差不超过10％达到目标厚度。

8. 发明申请

US20120190277A1 INSERT CARRIER AND METHOD FOR THE SIMULTANEOUS DOUBLE-SIDE MATERIAL-REMOVING PROCESSING OF SEMICONDUCTOR WAFERS 有权
标题翻译：用于半导体波形的同时双面材料去除处理的插入件和方法
公开(公告)号：US20120190277A1
公开(公告)日：2012-07-26
申请号：US13311575
申请日：2011-12-06
申请人： Georg Pietsch , Michael Kerstan
发明人： Georg Pietsch , Michael Kerstan
IPC分类号： B24B1/00 , B24B41/06
CPC分类号： B24B37/28
摘要： An insert carrier is configured to receive at least one semiconductor wafer for double-side processing of the wafer between two working disks of a lapping, grinding or polishing process. The insert carrier includes a core of a first material that has a first surface and a second surface, and at least one opening configured to receive a semiconductor wafer. A coating at least partially covers the first and second surfaces of the core. The coating includes a surface remote from the core that includes a structuring including elevations and depressions. A correlation length of the elevations and depressions is in a range of 0.5 mm to 25 mm and an aspect ratio of the structuring is in a range of 0.0004 to 0.4.
摘要翻译：插入物承载件构造成容纳至少一个半导体晶片，用于在研磨，研磨或抛光工艺的两个工作盘之间对晶片进行双面处理。插入物承载件包括具有第一表面和第二表面的第一材料的芯和被配置为接收半导体晶片的至少一个开口。涂层至少部分地覆盖芯的第一和第二表面。涂层包括远离芯的表面，其包括包括高度和凹陷的结构。高度和凹陷的相关长度在0.5mm至25mm的范围内，结构的纵横比在0.0004至0.4的范围内。

9. 发明授权

US07867059B2 Semiconductor wafer, apparatus and process for producing the semiconductor wafer 失效
标题翻译：用于制造半导体晶片的半导体晶片，装置和工艺
公开(公告)号：US07867059B2
公开(公告)日：2011-01-11
申请号：US11941171
申请日：2007-11-16
申请人： Georg Pietsch , Michael Kerstan , Werner Blaha
发明人： Georg Pietsch , Michael Kerstan , Werner Blaha
IPC分类号： B24B49/00
CPC分类号： H01L21/02013 , B24B7/17 , B24B7/228 , B24D7/14
摘要： The invention relates to a process for producing a semiconductor wafer by double-side grinding of the semiconductor wafer, in which the semiconductor wafer is simultaneously ground on both sides, first by rough-grinding and then by finish-grinding, using a grinding tool. The semiconductor wafer, between the rough-grinding and the finish-grinding, remains positioned in the grinding machine, and the grinding tool continues to apply a substantially constant load during the transition from rough-grinding to finish-grinding. The invention also relates to an apparatus for carrying out the process and to a semiconductor wafer having a local flatness value on a front surface of less than 16 nm in a measurement window of 2 mm×2 mm area and of less than 40 nm in a measurement window of 10 mm×10 mm area.
摘要翻译：本发明涉及通过半导体晶片的双面研磨制造半导体晶片的方法，其中半导体晶片在两侧同时研磨，首先通过粗磨，然后使用研磨工具进行精磨。在粗磨和精磨之间的半导体晶片保持定位在研磨机中，并且研磨工具在从粗磨到精磨过渡期间继续施加基本恒定的载荷。本发明还涉及一种用于在2mm×2mm面积的测量窗口中在小于16nm的前表面上具有局部平坦度值并且小于40nm的半导体晶片的半导体晶片测量窗口为10mm×10 mm面积。

10. 发明授权

US5952242A Method and device for removing a semiconductor wafer from a flat substrate 失效
标题翻译：从平坦基板去除半导体晶片的方法和装置
公开(公告)号：US5952242A
公开(公告)日：1999-09-14
申请号：US954785
申请日：1997-10-21
申请人： Georg Pietsch , Ernst Feuchtinger
发明人： Georg Pietsch , Ernst Feuchtinger
IPC分类号： B24B7/17 , B24B37/08 , B24B37/16 , B24B37/26 , B24B37/34 , H01L21/687 , H01L21/00
CPC分类号： H01L21/68742 , B24B37/08 , B24B37/16 , B24B37/26 , B24B37/345 , H01L21/68764 , H01L21/68771
摘要： A means for removing a semiconductor wafer from a flat substrate uses a device for removing a semiconductor wafer from a polishing cloth of a double side polishing machine. The method has a liquid being pressed through the substrate against the semiconductor wafer lying on the substrate, such that the semiconductor wafer is lifted up from the substrate by the action of the liquid. Then the wafer is picked up by a pick-up device.
摘要翻译：用于从平坦基板去除半导体晶片的装置使用从双面抛光机的抛光布去除半导体晶片的装置。该方法具有通过衬底压靠位于衬底上的半导体晶片的液体，使得半导体晶片通过液体的作用从衬底提升。然后由拾取装置拾取晶片。

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