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1. 发明授权

US06512769B1 Method and apparatus for rate-based cell traffic arbitration in a switch 失效
标题翻译：交换机中用于基于速率的小区业务仲裁的方法和装置
公开(公告)号：US06512769B1
公开(公告)日：2003-01-28
申请号：US09090676
申请日：1998-06-03
申请人： Gene Chui , Lambert Fong , Eugene Wang
发明人： Gene Chui , Lambert Fong , Eugene Wang
IPC分类号： H04L1228
CPC分类号： H04L47/10 , H04L47/283 , H04L47/32 , H04L49/90
摘要： A method and apparatus for rate-based cell traffic arbitration in a switch are provided, wherein arbitration is provided between eight traffic sources in the form of eight cell bus service modules on the same cell bus. A cell bus controller (CBC) is programmed with an 8-bit Relative Service Delay (RSD) value for each of the eight service modules. The value for each RSD is calculated based on the bandwidths allotted for each service module. This RSD value determines the portion of the total bandwidth of the switch platform reserved for the respective service module. Furthermore, each service module uses an 8-bit Service Delay Accumulator (SDA) register. The SDA register of each service module is configured using an SDA value, wherein the SDA register keeps track of when each of the service modules should receive service. The SDA value is calculated at each cell bus frame time for each of the service modules based on the RSD value for each of the service modules, a request for service, and the minimum SDA value among the service modules during a cell bus frame time. If the bandwidth is under-subscribed, the remaining bandwidth is shared among all eight service modules according to the RSD value of each service module. If the bandwidth is over-subscribed, each service module will have the assigned bandwidth portion decreased according to the RSD values.
摘要翻译：提供了一种用于交换机中基于速率的小区业务仲裁的方法和装置，其中在相同信元总线上以八个信元总线服务模块的形式在八个业务源之间提供仲裁。单元总线控制器（CBC）被编程为八个服务模块中的每一个的8位相对服务延迟（RSD）值。每个RSD的值根据为每个服务模块分配的带宽计算。该RSD值确定为相应服务模块保留的交换机平台的总带宽的部分。此外，每个服务模块使用8位服务延迟累加器（SDA）寄存器。每个服务模块的SDA寄存器使用SDA值进行配置，其中SDA寄存器跟踪每个服务模块何时应该接收服务。基于每个服务模块的RSD值，服务请求以及在信元总线帧时间期间服务模块中的最小SDA值，在每个服务模块的每个信元总线帧时间处计算SDA值。如果带宽不足，则剩余带宽根据每个业务模块的RSD值在所有八个业务模块之间共享。如果带宽超额订购，则每个服务模块将分配带宽部分根据RSD值减少。

2. 发明授权

US06463485B1 System for providing cell bus management in a switch platform including a write port cell count in each of a plurality of unidirectional FIFO for indicating which FIFO be able to accept more cell 失效
标题翻译：用于在交换机平台中提供信元总线管理的系统，包括在多个单向FIFO中的每一个中的写入端口单元计数，用于指示哪个FIFO能够接受更多的单元
公开(公告)号：US06463485B1
公开(公告)日：2002-10-08
申请号：US09089881
申请日：1998-06-03
申请人： Gene Chui , Lambert Fong , Eugene Wang
发明人： Gene Chui , Lambert Fong , Eugene Wang
IPC分类号： G06F1314
CPC分类号： H04L12/5601 , G06F5/065 , G06F5/14 , G06F2205/067 , H04L49/203 , H04L49/90 , H04L49/901 , H04L49/9078 , H04L2012/5632 , H04L2012/5679 , H04L2012/5681
摘要： A method and apparatus for providing cell bus management in a switch platform are provided. Each unidirectional FIFO buffer of a cell bus controller outputs a write port cell count from a write port. A cell count value is programmed at which the write port cell count is outputted. When the write port cell count indicates that the FIFO buffer can not accept additional data or cells, a master bidirectional FIFO unit ceases reading cells to a unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to the write port cell count. Furthermore, the master bidirectional FIFO unit disables a corresponding switch from routing cells to the slave bidirectional FIFO unit in response to the write port cell count; the switch routes the cells to another of the slave bidirectional FIFO units. The master bidirectional FIFO unit resumes reading cells to the second unidirectional FIFO buffer of the slave bidirectional FIFO unit in response to a write port cell count indication that the FIFO buffer can accept additional data or cells. In response, the master bidirectional FIFO unit enables an associated switch to route cells to the slave bidirectional FIFO unit.
摘要翻译：提供了一种用于在交换平台中提供信元总线管理的方法和装置。单元总线控制器的每个单向FIFO缓冲器从写入端口输出写入端口单元计数。编程单元计数值，输出写入端口单元计数。当写入端口单元计数指示FIFO缓冲器不能接受附加数据或单元时，响应于写入端口单元计数，主双向FIFO单元停止将单元读取到从双向FIFO单元的单向FIFO缓冲器。此外，主双向FIFO单元响应于写入端口单元计数禁用从路由单元到从双向FIFO单元的相应交换机; 交换机将单元路由到另一个从属双向FIFO单元。响应于FIFO缓冲器可以接受附加数据或单元的写入口单元计数指示，主双向FIFO单元恢复读取单元到从双向FIFO单元的第二单向FIFO缓冲器。作为响应，主双向FIFO单元使相关联的开关将单元路由到从属双向FIFO单元。

3. 发明授权

US06438102B1 Method and apparatus for providing asynchronous memory functions for bi-directional traffic in a switch platform 失效
标题翻译：用于在交换平台中为双向业务提供异步存储器功能的方法和装置
公开(公告)号：US06438102B1
公开(公告)日：2002-08-20
申请号：US09090299
申请日：1998-06-03
申请人： Gene Chui , Lambert Fong , Eugene Wang
发明人： Gene Chui , Lambert Fong , Eugene Wang
IPC分类号： G01R3108
CPC分类号： H04L49/107 , G06F5/16 , H04L49/102 , H04L49/552
摘要： A method and apparatus for providing asynchronous memory functions for bi-directional cell traffic in a switch platform are provided, wherein a parameterized bi-directional FIFO unit controls cell traffic in a switch platform using a first and a second unidirectional FIFO buffer. The first and second unidirectional FIFO buffers each comprises asynchronous read and write ports. A cell size and a word size of the first and second unidirectional FIFO buffers are programmable. The bi-directional FIFO unit is coupled to write at least one cell from and read at least one cell to at lest one asynchronous transfer mode (ATM) interface, at least one frame relay interface, at least one voice interface, and at least one data interface. As such, the first unidirectional FIFO buffer is coupled to write at least one cell from, and the second unidirectional FIFO buffer is coupled to read at least one cell to an ATM interface, a frame relay interface, a voice interface, and a data interface. The first unidirectional FIFO buffer is coupled to read at least one cell to at least one switch, and the second unidirectional FIFO buffer is coupled to write at least one cell from at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch is coupled to route the at least one cell between an OC12 trunk line and at least one service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, TC3, and OC 12 ports.
摘要翻译：提供了一种用于在交换平台中为双向小区业务提供异步存储器功能的方法和装置，其中参数化双向FIFO单元使用第一和第二单向FIFO缓冲器来控制交换平台中的小区业务。第一和第二单向FIFO缓冲器包括异步读取和写入端口。第一和第二单向FIFO缓冲器的单元大小和单词大小是可编程的。双向FIFO单元被耦合以从至少一个小区写入至少一个小区，至少读取一个小区至少一个异步传输模式（ATM）接口，至少一个帧中继接口，至少一个语音接口和至少一个数据接口。这样，第一单向FIFO缓冲器被耦合以写入至少一个单元，并且第二单向FIFO缓冲器被耦合以将至少一个单元读取到ATM接口，帧中继接口，语音接口和数据接口。耦合第一单向FIFO缓冲器以将至少一个单元读取到至少一个开关，并且第二单向FIFO缓冲器被耦合以从至少一个开关写入至少一个单元，其中该开关处理来自具有多个带宽。交换机被耦合以在OC12中继线与至少一个服务模块之间路由至少一个小区。服务模块被耦合以将小区提供给使用T1，E1，T3，E3，TC3和OC12端口的至少一个服务订户。

4. 发明授权

US06967961B1 Method and apparatus for providing programmable memory functions for bi-directional traffic in a switch platform 失效
标题翻译：用于为交换平台中的双向业务提供可编程存储器功能的方法和装置
公开(公告)号：US06967961B1
公开(公告)日：2005-11-22
申请号：US09090096
申请日：1998-06-03
申请人： Gene Chui , Lambert Fong , Eugene Wang
发明人： Gene Chui , Lambert Fong , Eugene Wang
IPC分类号： H04L12/56
CPC分类号： H04L12/5601 , H04L49/90 , H04L49/901 , H04L49/9021 , H04L49/9089 , H04L2012/5665 , H04L2012/5671 , H04L2012/5681
摘要： A method and apparatus for providing programmable memory functions for bi-directional cell traffic in a switch platform are provided, wherein a parameterized bi-directional FIFO unit controls cell traffic in a switch platform using a first and a second unidirectional FIFO buffer. The first and second unidirectional FIFO buffers each comprise asynchronous read and write ports. A cell size and a word size of the first and second unidirectional FIFO buffers are programmable. The bi-directional FIFO unit is coupled to write at least one cell from and read at least one cell to at least one asynchronous transfer mode (ATM) interface, at least one frame relay interface, at least one voice interface, and at least one data interface. As such, the first unidirectional FIFO buffer is coupled to write at least one cell from, and the second unidirectional FIFO buffer is coupled to read at least one cell to an ATM interface, a frame relay interface, a voice interface, and a data interface. The first unidirectional FIFO buffer is coupled to read at least one cell to at least one switch, and the second unidirectional FIFO buffer is coupled to write at least one cell from at least one switch, wherein the switch handles cells from sources having a number of bandwidths. The switch is coupled to route the at least one cell between an OC12 trunk line and at least one service module. The service module is coupled to provide the cell to at least one service subscriber using T1, E1, T3, E3, OC3, and OC 12 ports.
摘要翻译：提供了一种用于在交换平台中为双向小区业务提供可编程存储器功能的方法和装置，其中参数化双向FIFO单元使用第一和第二单向FIFO缓冲器来控制交换平台中的小区业务。第一和第二单向FIFO缓冲器各自包括异步读取和写入端口。第一和第二单向FIFO缓冲器的单元大小和单词大小是可编程的。双向FIFO单元被耦合以从至少一个小区写入至少一个小区，并将其读取到至少一个异步传输模式（ATM）接口，至少一个帧中继接口，至少一个语音接口和至少一个数据接口。这样，第一单向FIFO缓冲器被耦合以写入至少一个单元，并且第二单向FIFO缓冲器被耦合以将至少一个单元读取到ATM接口，帧中继接口，语音接口和数据接口。耦合第一单向FIFO缓冲器以将至少一个单元读取到至少一个开关，并且第二单向FIFO缓冲器被耦合以从至少一个开关写入至少一个单元，其中该开关处理来自具有多个带宽。交换机被耦合以在OC12中继线与至少一个服务模块之间路由至少一个小区。服务模块被耦合以将小区提供给使用T1，E1，T3，E3，OC3和OC12端口的至少一个服务订户。

5. 发明授权

US06483850B1 Method and apparatus for routing cells having different formats among service modules of a switch platform 失效
标题翻译：用于在交换平台的服务模块之间路由具有不同格式的小区的方法和装置
公开(公告)号：US06483850B1
公开(公告)日：2002-11-19
申请号：US09090300
申请日：1998-06-03
申请人： Gene Chui , Lambert Fong , Eugene Wang
发明人： Gene Chui , Lambert Fong , Eugene Wang
IPC分类号： H04J316
CPC分类号： H04L47/32 , H04L49/604 , H04L49/606
摘要： A method and apparatus for routing cells having different formats among service modules of a switch platform are provided. The cells are routed among service modules of a switch by a cell bus controller (CBC) using a first memory to convert an address having a first format into an address having a second format. The address having the first format is received in a header of a cell, and the address format comprises a 17-bit cell bus logical connection number of a destination port. The address having the second format is a 16-bit UDF used by a switch of the switch platform. The address having the first format is used to form a third address that is used to access the first memory. The data located at the third address of the first memory is a 16-bit UDF used to address the switch. A second memory is used to convert an address having the second format into an address having the first format. The address having the second format is used as a fourth address to access the second memory. The data located at the fourth address of the second memory is a 32-bit cell bus header that addresses a destination port. The destination port is at least one service module of the switch platform. The first and second memory comprise an external random access memory.
摘要翻译：提供了一种用于在交换平台的服务模块之间路由具有不同格式的小区的方法和装置。这些小区由信元总线控制器（CBC）使用第一存储器路由到交换机的服务模块之间，以将具有第一格式的地址转换为具有第二格式的地址。具有第一格式的地址被接收在小区的头部中，并且地址格式包括目的地端口的17比特单元总线逻辑连接号码。具有第二格式的地址是由交换机平台的交换机使用的16位UDF。具有第一格式的地址用于形成用于访问第一存储器的第三地址。位于第一个存储器第三个地址的数据是一个16位UDF，用于对交换机进行寻址。第二存储器用于将具有第二格式的地址转换成具有第一格式的地址。具有第二格式的地址被用作访问第二存储器的第四地址。位于第二存储器的第四地址的数据是寻址目的地端口的32位单元总线头。目标端口是交换机平台的至少一个服务模块。第一和第二存储器包括外部随机存取存储器。

6. 发明申请

US20080140892A1 Common Access Ring/Sub-Ring System 有权
标题翻译：公共接入环/子环系统
公开(公告)号：US20080140892A1
公开(公告)日：2008-06-12
申请号：US11608239
申请日：2006-12-07
申请人： Lambert Fong , David Dooley
发明人： Lambert Fong , David Dooley
IPC分类号： G06F13/00
CPC分类号： H04L12/4637 , H04L12/423
摘要： A common access ring (CAR) architecture that supports multiple masters and slaves is provided. One or more masters may make a request on the ring at the same time, such that multiple transactions are simultaneously pending. Moreover, multiple masters may simultaneously make a request to the same slave. However, each master cannot make more than one request at a time, and must wait until a current request is completed before making another request. The ring architecture ensures that no more than one request arrives at a slave at any given time. If a request arrives while a slave is processing a previous request, the arriving request is not serviced, and the master that originated the arriving request is asked to retry the request at a later time. Atomic shadow-write operations are supported by including all shadow registers in a dedicated sub-ring of the CAR architecture.
摘要翻译：提供了支持多个主机和从机的通用接入环（CAR）架构。一个或多个主人可以同时在环上发出请求，使得多个事务同时处于待决状态。此外，多个主机可以同时向同一个从机发出请求。但是，每个主机不能一次发出多个请求，并且必须等到当前请求完成才能发出另一个请求。环形架构确保在任何给定时间不超过一个请求到达从站。如果在从机正在处理先前的请求中请求到达，则不服务到达的请求，并且要求发起到达的请求的主机稍后重试该请求。通过将所有影子寄存器包含在CAR架构的专用子环中来支持原子影子写入操作。

7. 发明申请

US20080140891A1 Common Access Ring System 有权
标题翻译：公共接入环系统
公开(公告)号：US20080140891A1
公开(公告)日：2008-06-12
申请号：US11608236
申请日：2006-12-07
申请人： Lambert Fong , David L. Dooley
发明人： Lambert Fong , David L. Dooley
IPC分类号： G06F13/40
CPC分类号： G06F13/368
摘要： A common access ring (CAR) architecture that supports multiple masters and slaves is provided. One or more masters may make a request on the ring at the same time, such that multiple transactions are simultaneously pending. Moreover, multiple masters may simultaneously make a request to the same slave. However, each master cannot make more than one request at a time, and must wait until a current request is completed before making another request. The ring architecture ensures that no more than one request arrives at a slave at any given time. If a request arrives while a slave is processing a previous request, the arriving request is not serviced, and the master that originated the arriving request is asked to retry the request at a later time. Atomic shadow-write operations are supported by including all shadow registers in a dedicated sub-ring of the CAR architecture.
摘要翻译：提供了支持多个主机和从机的通用接入环（CAR）架构。一个或多个主人可以同时在环上发出请求，使得多个事务同时处于待决状态。此外，多个主机可以同时向同一个从机发出请求。但是，每个主机不能一次发出多个请求，并且必须等到当前请求完成才能发出另一个请求。环形架构确保在任何给定时间不超过一个请求到达从站。如果在从机正在处理先前的请求中请求到达，则不服务到达的请求，并且要求发起到达的请求的主机稍后重试该请求。通过将所有影子寄存器包含在CAR架构的专用子环中来支持原子影子写入操作。

8. 发明授权

US07814248B2 Common access ring/sub-ring system 有权
标题翻译：公共接入环/子环系统
公开(公告)号：US07814248B2
公开(公告)日：2010-10-12
申请号：US11608239
申请日：2006-12-07
申请人： Lambert Fong , David L. Dooley
发明人： Lambert Fong , David L. Dooley
IPC分类号： G06F13/00 , G06F13/36 , G06F15/16
CPC分类号： H04L12/4637 , H04L12/423
摘要： A common access ring (CAR) network includes a main ring and one or more sub-rings. The main ring includes one or more masters, one or more slaves, and one or more bridges. Each sub-ring is coupled to the main ring through a corresponding bridge. Each node of the CAR network is assigned a unique identifier, thereby implementing a global flat address space. One or more masters may issue requests on the CAR network, such that multiple transactions are simultaneously pending. Multiple masters may simultaneously issue requests to the same slave. However, each master cannot make more than one request at a time, and must wait until a current request is completed before making another request. The ring architecture ensures that no more than one request arrives at a slave at any given time. Requests received by busy slaves are returned to the originating masters, and may be subsequently re-sent.
摘要翻译：公共接入环（CAR）网络包括主环和一个或多个子环。主环包括一个或多个主站，一个或多个从站和一个或多个桥。每个子环通过相应的桥耦合到主环。为CAR网络的每个节点分配唯一的标识符，从而实现全局平面地址空间。一个或多个主人可以在CAR网络上发出请求，使得多个事务同时处于待决状态。多个主器件可以同时向同一个从器件发出请求。但是，每个主机不能一次发出多个请求，并且必须等到当前请求完成才能发出另一个请求。环形架构确保在任何给定时间不超过一个请求到达从站。繁忙奴隶所收到的请求将返回给始发主人，随后可以重新发送。

9. 发明授权

US07779197B1 Device and method for address matching with post matching limit check and nullification 有权
标题翻译：地址匹配的设备和方法，与匹配后匹配限制检查和无效
公开(公告)号：US07779197B1
公开(公告)日：2010-08-17
申请号：US11382475
申请日：2006-05-09
申请人： Christopher I. W. Norrie , Lambert Fong
发明人： Christopher I. W. Norrie , Lambert Fong
IPC分类号： G06F13/00
CPC分类号： G06F13/4022 , Y02D10/14 , Y02D10/151
摘要： A device and method are disclosed for performing a limit address check validation in a switching device. The device includes a data selector circuit that is enabled to select the content of an address register in an array of address registers, and a comparator electrically coupled to the data selector circuit and enabled to take a first input from the data selector circuit and target address as a second input from a communication packet. The method includes receiving the target address, seeking and locating a matching address in an array of base address registers, directing the packet to the port associated with the matching address, determining the target address to be a valid address by comparing the target address with a limit address associated with the matching base address, and nullifying the match if the target address is greater than the limit address.
摘要翻译：公开了一种用于在交换设备中执行限制地址检查验证的设备和方法。该装置包括数据选择器电路，其能够选择地址寄存器阵列中的地址寄存器的内容;以及比较器，电耦合到数据选择器电路，并且能够从数据选择器电路和目标地址获取第一输入作为来自通信分组的第二输入。该方法包括接收目标地址，寻找和定位基地址寄存器阵列中的匹配地址，将数据包指向与匹配地址相关联的端口，通过将目标地址与目标地址进行比较来确定目标地址为有效地址与匹配的基地址相关联的限制地址，如果目标地址大于限制地址，则无效匹配。

10. 发明授权

US07809871B2 Common access ring system 有权
标题翻译：通用接入环系统
公开(公告)号：US07809871B2
公开(公告)日：2010-10-05
申请号：US11608236
申请日：2006-12-07
申请人： Lambert Fong , David L. Dooley
发明人： Lambert Fong , David L. Dooley
IPC分类号： G06F13/00 , G06F13/36 , G06F15/16
CPC分类号： G06F13/368
摘要： A common access ring (CAR) architecture that supports multiple masters and slaves is provided. One or more masters may make a request on the ring at the same time, such that multiple transactions are simultaneously pending. Moreover, multiple masters may simultaneously make a request to the same slave. However, each master cannot make more than one request at a time, and must wait until a current request is completed before making another request. The ring architecture ensures that no more than one request arrives at a slave at any given time. If a request arrives while a slave is processing a previous request, the arriving request is not serviced, and the master that originated the arriving request is asked to retry the request at a later time. Atomic shadow-write operations are supported by including all shadow registers in a dedicated sub-ring of the CAR architecture.
摘要翻译：提供了支持多个主机和从机的通用接入环（CAR）架构。一个或多个主人可以同时在环上发出请求，使得多个事务同时处于待决状态。此外，多个主机可以同时向同一个从机发出请求。但是，每个主机不能一次发出多个请求，并且必须等到当前请求完成才能发出另一个请求。环形架构确保在任何给定时间不超过一个请求到达从站。如果在从机正在处理先前的请求时请求到达，则不会对到达的请求进行服务，并且要求发起到达请求的主机稍后重试该请求。通过将所有影子寄存器包含在CAR架构的专用子环中来支持原子影子写入操作。

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