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1. 发明公开

US20240267260A1 MULTI-ENGINE PACKET PROCESSING WITH TABLE UPDATES 审中-公开
公开(公告)号：US20240267260A1
公开(公告)日：2024-08-08
申请号：US18104558
申请日：2023-02-01
申请人： Google LLC
发明人： Hariharan Lakshminarayanan Thantry , Rajeev Nair
IPC分类号： H04L12/54 , H04L9/40
CPC分类号： H04L12/5601 , H04L63/101 , H04L2012/5679
摘要： Generally disclosed herein is an approach for maintaining packet ordering in a flow in the presence of table updates. The approach may provide a solution that mitigates correctness issues when there is an addition of instructions to hardware such as a circuit switch or a router while maintaining high packet processing rates. The approach may also include adding a software interface for a table update that is capable of receiving a certain ordering constraint that may influence table operation commands.

2. 发明授权

US09942027B2 Synchronization and ranging in a switching system 有权
公开(公告)号：US09942027B2
公开(公告)日：2018-04-10
申请号：US15466737
申请日：2017-03-22
申请人： ROCKLEY PHOTONICS LIMITED
发明人： Guy Regev , Daniel Brunina , Nathan Farrington , Thomas Pierre Schrans , Chiang Yeh
IPC分类号： H04L7/00 , H04L1/00 , H04L5/00 , H04L25/03 , H04L12/26 , H04J3/06 , H04Q11/00 , H04L12/70
CPC分类号： H04L7/0037 , H04J3/0682 , H04L1/0057 , H04L5/0048 , H04L25/03273 , H04L43/0852 , H04L2012/5679 , H04Q11/0005
摘要： A system and method for measuring propagation delays and other delays in an optical switching system. A transmitter is connected, through a circuit switch, to a receiver. To measure the propagation delay between the transmitter and the receiver, the transmitter sends one or more time-tagged ranging messages and the receiver calculates a propagation delay from the difference between the time of receipt and the time of transmission. In another embodiment, a time delay between message transmission and transition of a CDR of the receiver to a fast acquisition mode is adjusted, by trial and error, to find a range of such time delays for which transmission is successful. A time delay between the transmitter and the switch is measured by establishing or breaking the connection and determining, for various tentative time delay values, whether transmission succeeds.

3. 发明授权

US09813348B2 System for transmitting concurrent data flows on a network 有权
公开(公告)号：US09813348B2
公开(公告)日：2017-11-07
申请号：US14367050
申请日：2012-12-19
申请人： KALRAY
发明人： Yves Durand , Alexandre Blampey
IPC分类号： H04L12/835 , H04L12/54 , H04L12/863 , H04L12/861 , H04L12/70
CPC分类号： H04L47/30 , H04L12/5601 , H04L47/6255 , H04L47/628 , H04L49/9036 , H04L2012/5679
摘要： A system for transmitting concurrent data flows on a network, includes a memory containing data of data flows; a plurality of queues assigned respectively to the data flows, organized to receive the data as atomic transmission units; a flow regulator to poll the queues in sequence and, if the polled queue contains a full transmission unit, transmitting the unit on the network at a nominal flow-rate of the network; a sequencer to poll the queues in a round-robin manner and enable a data request signal when the filling level of the polled queue is below a threshold common to all queues, which threshold is greater than the size of the largest transmission unit; and a direct memory access configured to receive the data request signal and respond thereto by transferring data from the memory to the corresponding queue at a nominal speed of the system, up to the common threshold.

4. 发明申请

US20170279591A1 SYNCHRONIZATION AND RANGING IN A SWITCHING SYSTEM 有权
公开(公告)号：US20170279591A1
公开(公告)日：2017-09-28
申请号：US15466737
申请日：2017-03-22
申请人： ROCKLEY PHOTONICS LIMITED
发明人： Guy Regev , Daniel Brunina , Nathan Farrington , Thomas Pierre Schrans , Chiang Yeh
IPC分类号： H04L7/00 , H04L5/00 , H04L1/00 , H04L25/03
CPC分类号： H04L7/0037 , H04J3/0682 , H04L1/0057 , H04L5/0048 , H04L25/03273 , H04L43/0852 , H04L2012/5679 , H04Q11/0005
摘要： A system and method for measuring propagation delays and other delays in an optical switching system. A transmitter is connected, through a circuit switch, to a receiver. To measure the propagation delay between the transmitter and the receiver, the transmitter sends one or more time-tagged ranging messages and the receiver calculates a propagation delay from the difference between the time of receipt and the time of transmission. In another embodiment, a time delay between message transmission and transition of a CDR of the receiver to a fast acquisition mode is adjusted, by trial and error, to find a range of such time delays for which transmission is successful. A time delay between the transmitter and the switch is measured by establishing or breaking the connection and determining, for various tentative time delay values, whether transmission succeeds.

5. 发明授权

US09219509B1 System performance improvement using data reordering and/or inversion 有权
标题翻译：使用数据重新排序和/或反演的系统性能改进
公开(公告)号：US09219509B1
公开(公告)日：2015-12-22
申请号：US13963321
申请日：2013-08-09
申请人： Rambus Inc.
发明人： Frederick A. Ware
IPC分类号： H04L25/00 , H04B1/10 , H04B1/04 , H04L12/70 , G06F13/42 , H04L12/935 , G06F7/76 , G06F12/06
CPC分类号： H04B1/10 , G06F7/76 , G06F12/0607 , G06F13/4013 , G06F13/4204 , G09G2360/123 , H04L49/3018 , H04L2012/5679 , Y02D10/14 , Y02D10/151
摘要： A system and method for reordering transmitted bits to minimize the number of bit transitions per bit time, reducing system power consumption and signaling noise. Bit reordering is accomplished by performing skip operations, where to-be-transmitted bits are replaced by one or more bits in the bit stream at given bit times. DBI may be used in addition, or as an alternative, to bit reordering to further minimize the number of bit transitions per bit time. A receiver performs operations necessary to restore bits to their original sequence and/or recover the bits in their non-inverted form.
摘要翻译：一种用于重新排序发送位的系统和方法，以最小化每位时间的位转换次数，减少系统功耗和信号噪声。通过执行跳过操作来完成比特重排序，在给定的比特时间，将被发送的比特由比特流中的一个或多个比特替换。或者作为替代，可以将DBI用作位重排序以进一步最小化每位时间的位转换的数量。接收机执行将比特恢复到其原始序列所需的操作和/或以非反相形式恢复比特。

6. 发明申请

US20140181235A1 SEPARATION OF DATA AND CONTROL IN A SWITCHING DEVICE 有权
标题翻译：切换设备中数据和控制的分离
公开(公告)号：US20140181235A1
公开(公告)日：2014-06-26
申请号：US14192135
申请日：2014-02-27
申请人： Juniper Networks, Inc.
发明人： Pradeep S. SINDHU , Kireeti Kompella , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
IPC分类号： G06F15/167
CPC分类号： G06F15/167 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/72 , H04L45/7457 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/1538 , H04L49/203 , H04L49/25 , H04L49/252 , H04L49/3072 , H04L49/3081 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9057 , H04L69/22 , H04L2012/5652 , H04L2012/5679 , H04L2012/5681 , H04Q11/0478
摘要： A method and apparatus for switching a data packet between a source and destination in a network. The data packet includes a header portion and a data portion. The header portion includes routing information for the data packet. The method includes defining a data path in the router comprising a path through the router along which the data portion of the data packet travels and defining a control path comprising a path through the router along which routing information from the header portion travels. The method includes separating the data path and control path in the router such that the routing information can be separated from the data portion allowing for the separate processing of each in the router. The data portion can be stored in a global memory while routing decisions are made on the routing information in the control path.
摘要翻译：一种用于在网络中的源和目的地之间切换数据分组的方法和装置。数据分组包括报头部分和数据部分。报头部分包括用于数据分组的路由信息。该方法包括在路由器中定义数据路径，其包括通过路由器的路径，数据分组的数据部分沿着路径行进，并且定义包括通过路由器的路径的控制路径，路由器沿着路径信息从该路径行进。该方法包括分离路由器中的数据路径和控制路径，使得路由信息可以与数据部分分离，允许路由器中的每一个的单独处理。数据部分可以存储在全局存储器中，同时对控制路径中的路由信息作出路由决定。

7. 发明授权

US08711694B2 Call admission control method and system 失效
标题翻译：呼叫准入控制方法和系统
公开(公告)号：US08711694B2
公开(公告)日：2014-04-29
申请号：US13743702
申请日：2013-01-17
申请人： Juniper Networks, Inc.
发明人： Rei Miyamoto
IPC分类号： H04L12/26
CPC分类号： H04L47/24 , H04L12/5601 , H04L12/5602 , H04L47/15 , H04L47/70 , H04L47/805 , H04L47/822 , H04L49/105 , H04L2012/5629 , H04L2012/5638 , H04L2012/5679
摘要： A call admission control technique allowing flexible and reliable call admissions at an ATM switch in the case of an ATM network including both QoS-specified and QoS-unspecified virtual connections is disclosed. In the case where a QoS (Quality of Service) specified connection request occurs, an estimated bandwidth is calculated which is to be assigned to an existing QoS-unspecified traffic on the link associated with the QoS-specified connection request. A call control processor of the ATM switch determines whether the QoS-specified connection request is accepted, depending on whether a requested bandwidth is smaller than an available bandwidth that is obtained by subtracting an assigned bandwidth and the estimated bandwidth from a full bandwidth of the link.
摘要翻译：在包括QoS指定的和QoS未指定的虚拟连接的ATM网络的情况下，在ATM交换机上允许呼叫准入控制技术允许灵活可靠的呼入。在发生QoS（服务质量）指定的连接请求的情况下，计算将分配给与QoS指定的连接请求相关联的链路上的现有QoS未指定流量的估计带宽。 ATM交换机的呼叫控制处理器根据请求的带宽是否小于通过从链路的全带宽减去分配的带宽和估计的带宽获得的可用带宽来确定是否接受QoS指定的连接请求。

8. 发明授权

US08705368B1 Probabilistic distance-based arbitration 有权
标题翻译：概率基于距离的仲裁
公开(公告)号：US08705368B1
公开(公告)日：2014-04-22
申请号：US12959748
申请日：2010-12-03
申请人： Dennis Charles Abts , Michael Marty
发明人： Dennis Charles Abts , Michael Marty
IPC分类号： H04L12/26 , H04L12/28 , H04Q11/00 , H04L1/00 , H04J3/14 , H04J1/16 , H04L12/54 , H04L12/70 , H04W84/18
CPC分类号： H04L45/122 , H04L47/10 , H04L49/109 , H04L2012/5678 , H04L2012/5679 , H04W84/18
摘要： Probabilistic arbitration is combined with distance-based weights to achieve equality of service in interconnection networks, such as those used with chip multiprocessors. This arbitration desirably used incorporates nonlinear weights that are assigned to requests. The nonlinear weights incorporate different arbitration weight metrics, namely fixed weight, constantly increasing weight, and variably increasing weight. Probabilistic arbitration for an on-chip router avoids the need for additional buffers or virtual channels, creating a simple, low-cost mechanism for achieving equality of service. The nonlinearly weighted probabilistic arbitration includes additional benefits such as providing quality-of-service features and fairness in terms of both throughput and latency that approaches the global fairness achieved with age-base arbitration. This provides a more stable network by achieving high sustained throughput beyond saturation. Each router or switch in the network may include an arbiter to apply the weighted probabilistic arbitration.
摘要翻译：概率仲裁与基于距离的权重相结合，以实现互连网络中的服务等同，如与芯片多处理器一起使用的。期望使用的仲裁包括分配给请求的非线性权重。非线性权重包含不同的仲裁权重度量，即固定权重，不断增加的权重和可变增加权重。片上路由器的概率仲裁避免了对附加缓冲区或虚拟通道的需求，创建了一种实现平等服务的简单，低成本的机制。非线性加权概率仲裁包括额外的好处，例如提供服务质量特征和在通过年龄基础仲裁实现的全球公平的吞吐量和延迟方面的公平性。这通过实现高饱和度的高持续吞吐量来提供更稳定的网络。网络中的每个路由器或交换机可以包括应用加权概率仲裁的仲裁器。

9. 发明授权

US08705358B2 Traffic arbitration 失效
标题翻译：交通仲裁
公开(公告)号：US08705358B2
公开(公告)日：2014-04-22
申请号：US12869584
申请日：2010-08-26
申请人： Osamu Ohno
发明人： Osamu Ohno
IPC分类号： H04J3/14
CPC分类号： H04L12/5601 , H04L2012/5679
摘要： The invention provides an arbitration method and an arbiter circuit by which equal arbitration of output cells can be achieved with a comparatively simple configuration even where a very great number of queues are involved. The arbiter circuit includes a plurality of queues for storing output cells, and a plurality of round robins for successively providing the right of outputting output cells to the queues. The round robins are arranged in a multi-stage tree link configuration, and the queues are distributed under those of the round robins which are in the lowest order stage. Each of the round robins in the lowest order stage has a rate information holding function of holding rate information representative of a rate of cells inputted thereto. Meanwhile, each of the round robins in the higher order stage or stages has a rate information holding function of holding rate information regarding those of the round robins which are subordinate to the round robin and a subordinate selection function of selecting one of the subordinate round robins based on the rate information of the subordinate round robins. A queue is added as a subordinate to the selected round robin in the lowest order stage when a connection is to be added newly.
摘要翻译：本发明提供了一种仲裁方法和仲裁器电路，通过该仲裁方法和仲裁电路，即使在涉及非常多的队列的情况下，也可以用比较简单的配置实现输出单元的相等仲裁。仲裁器电路包括用于存储输出单元的多个队列，以及用于连续地向队列输出输出单元的权利的多个循环。循环次序布置在多级树状链路配置中，队列分布在处于最低阶段的轮询的队列中。最低阶中的循环中的每一个都具有表示输入到其中的单元的速率的保持率信息的速率信息保持功能。同时，高级阶段或阶段中的每个循环都具有关于从属于循环的循环的保持率信息的速率信息保持功能和选择一个下级循环的从属选择功能基于下级循环的速率信息。当要添加新的连接时，在最低阶阶段将队列作为下级添加到所选轮询。

10. 发明授权

US08576867B2 Pipeline scheduler with fairness and minimum bandwidth guarantee 有权
公开(公告)号：US08576867B2
公开(公告)日：2013-11-05
申请号：US13460723
申请日：2012-04-30
申请人： Ruixue Fan , Chi-Yu Lu
发明人： Ruixue Fan , Chi-Yu Lu
IPC分类号： H04L12/28
CPC分类号： H04L12/5602 , H04L2012/5651 , H04L2012/5679
摘要： A pipeline scheduler provides a minimum bandwidth guarantee by transporting cells from an input port to an output port in a two-phased approach. Cells that conform to a minimum cell rate (MCR) are selected from queues at the input port and arranged into supercells for transport to the output port, followed by nonconforming cells, to guarantee fairness by using scheduling modules to build the supercells first for conforming cells, and then for nonconforming cells. Reservation vectors are used to permit the same time slot of the next frame to be reserved by a first queue, and the same time slot of the following time frame to be held for reservation by a second queue, to ensure equal time slot access by the first and second queues over successive time frames.

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